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Table of Contents SAMOS Conference 2015Dimitrios Soudris and Luigi Carro Eds. |
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KEYNOTES |
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| Rethinking Memory System Design for Data-Intensive Computing | |
| Onur Mutlu | |
| Visual processing sparks a new class of processors | |
| Marco Jacobs | |
| Parallel Program = Operator + Schedule + Parallel Data Structure | |
| Keshav Pingali | |
SESSION 1A: Multimedia and Graphics Architectures and Processors |
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| Experiences in Speeding Up Computer Vision Applications on Mobile Computing Platforms | |
| Luna Backes, Alejandro Rico, Bjorn Franke | |
| Parallelism Extraction in Embedded Software for Android Devices | |
| Miguel Angel Aguilar, Juan Fernando Eusse, Projjol Ray, Rainer Leupers, Gerd Ascheid, Weihua Sheng, Prashant Sharma | |
| Improving Accuracy of Source Level Timing Simulation for GPUs using a Probabilistic Resource Model | |
| Christoph Gerum, Wolfgang Rosenstiel, Oliver Bringmann | |
SESSION 1B: Reconfigurable Computing |
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| High-level Synthesizable Dataflow MapReduce Accelerator for FPGA-coupled Data Centers | |
| Dionysios Diamantopoulos, Christoforos Kachris | |
| Reconfigurable computing for future vision-capable devices | |
| Miguel Bordallo Lopez, Alejandro Nieto, Olli Silvén, Jani Boutellier and David Lopez Vilarino | |
| Imposing Coarse-Grained Reconfiguration to General Purpose Processors | |
| M. Duric, M. Stanic, I. Ratkovic, O. Palomar, O. Unsal, A. Cristal, M. Valero, A. Smith | |
SESSION 3A: System-Level Design, Simulation, and Verification |
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| Learning-based Analytical Cross-Platform Performance Prediction | |
| Xinnian Zheng, Pradeep Ravikumar, Lizy K. John, Andreas Gerstlauer | |
| Bridging the Semantic Gap Between Heterogeneous Modeling Formalisms and FMI | |
| Stavros Tripakis | |
| A Power Estimation Technique for Cycle-Accurate Higher-Abstraction SystemC-based CPU Models | |
| Efstathios Sotiriou-Xanthopoulos, G. Shalina Percy Delicia, Peter Figuli, Kostas Siozios, George Economakos, Jurgen Becker | |
SESSION 3B: Design Space Exploration Strategies |
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| Platform-aware Dynamic Data Type Refinement Methodology for Radix Tree Data Structures | |
| Thomas Papastergiou, Lazaros Papadopoulos, Dimitrios Soudris | |
| FNOCEE: A Framework for NoC Evaluation by FPGA-based Emulation | |
| Daniel Pfefferkorn, Achim Schmider, Guillermo Paya-Vaya, Martin Neuenhahn, Holger Blume | |
| Framework for Parameter Analysis of FPGA-based Image Processing Architectures | |
| Marc Reichenbach, Benjamin Pfundt, Dietmar Fey | |
SESSION 3C: System-Level Design, Simulation, and Verification |
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| Efficient Dual-ISA Support in a Retargetable, Asynchronous Dynamic Binary Translator | |
| Tom Spink, Harry Wagstaff, Bjorn Franke, Nigel Topham | |
| Efficient Distribution of Triggered Synchronous Block Diagrams on Asynchronous Platforms | |
| Yang Yang, Stavros Tripakis, Alberto Sangiovanni-Vincentelli | |
| HEVC In-Loop Filters GPU Parallelization in Embedded Systems | |
| Diego F. de Souza, Aleksandar Ilic, Nuno Roma, Leonel Sousa | |
SESSION 3D: Design Space Exploration Strategies |
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| Tervel: A Unification of Descriptor-based Techniques for Non-blocking Programming | |
| Steven Feldman, Pierre LaBorde, Damian Dechev | |
| Physical Design Aware System Level Synthesis of Hardware | |
| Nasim Farahini, Ahmed Hemani, Hassan Sohofi, Shuo Li | |
| A High-Level DRAM Timing, Power and Area Exploration Tool | |
| Omar Naji, Christian Weis, Matthias Jung, Norbert When, Andreas Hansson | |
SESSION 3E: MP-SoC |
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| Towards Self-adaptive MPSoC Systems with Adaptivity Throttling | |
| Wei Quan, Andy D. Pimentel | |
| An Interval Algebra for Multiprocessor Resource Allocation | |
| Leandro Soares Indrusiak, Piotr Dziurzanski | |
| Application Autotuning to Support Runtime Adaptivity in Multicore Architectures | |
| Davide Gadioli, Gianluca Palermo, Cristina Silvano | |
SESSION 3F: Fault-Tolerant |
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| Chip-Independent Error Correction in Main Memories | |
| Mehrtash Manoochehri, Michel Dubois | |
| Decentralized Diagnosis of Permanent Faults in Automotive E/E Architectures | |
| Peter Waszecki, Martin Lukasiewycz, Samarjit Chakraborty | |
| Hardware Task Migration Module for Improved Fault Tolerance and Predictability | |
| Shyamsundar Venkataraman, Rui Santos, Akash Kumar, Jasper Kuijsten | |
| Software Fault Tolerance for FPUs via Vectorization | |
| Zhi Chen, Ryoichi Inagaki, Alexandru Nicolau, Alexander V. Veidenbaum | |
SESSION 3G: Application- and Domain-specific Embedded Systems |
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| 3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems | |
| Pei Liu, Ahmed Hemani, Kolin Paul | |
| An FPGA-Based Systolic Array to Accelerate the BWA-MEM Genomic Mapping Algorithm | |
| Ernst Joachim Houtgast, Vlad-Mihai Sima, Koen Bertels, Zaid Al-Ars | |
| Dynamic Re-Vectorization of Binary Code | |
| Nabil Hallou, Erven Rohou, Philippe Clauss, Alain Ketterlin | |
| Generating ASIPs with Reduced Number of Connections to the Register-file | |
| Yosi Ben Asher, Irina Lipov, Vladislav Tartakovsky, Dror Tiv | |
SPECIAL SESSION: Bridging FP7 Framework and Horizon 2020: Current and future priorities of Europe |
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| AEGLE: A Big Bio-Data Analytics Framework for Integrated Health-Care Services | |
| Dimitrios Soudris, Sotirios Xydis, Christos Baloukas, Anastasia Hadzidimitriou, Ioanna Chouvarda, Kostas Stamatopoulos, Nicos Maglaveras, John Chang, Andreas Raptopoulos, David Manset, Barbara Pierscionek, Reem Kayyali, Nada Phillip, Tobias Becker, Katerina Vaporidi, Eumorphia Kondili, Dimitrios Georgopoulos, Lesley-Ann Sutton, Richard Rosenquist, Lydia Scarfo, Paolo Ghia | |
| Designing Applications for Heterogeneous Many-Core Architectures with the FlexTiles Platform | |
| Benedikt Janssen, Fynn Schwiegelshohn, Martijn Koedam, François Duhem, Leonard Masing, Stephan Werner, Christophe Huriaux, Antoine Courtay, Emilie Wheatley, Kees Goossens, Fabrice Lemonnier, Philippe Millet, Jürgen Becker, Olivier Sentieys, Michael Hubner | |
| The AXIOM project (Agile, eXtensible, fast I/O Module) | |
| Dimitris Theodoropoulos, Dionisis Pnevmatikatos, Carlos Alvarez, Eduard Ayguade, Javier Bueno, Antonio Filgueras, Daniel Jimenez-Gonzalez, Xavier Martorell, Nacho Navarro | |
| HARPA: Solutions for Dependable Performance under Physically Induced Performance Variability | |
| Dimitrios Rodopoulos, Simone Corbetta, Giuseppe Massari, Simone Libutti, Francky Catthoor, Yiannakis Sazeides, Chrysostomos Nicopoulos, Antoni Portero, Etienne Cappe, Radim Vavrik, Vit Vondrak, Dimitrios Soudris, Federico Sassi, Agnes Fritsch, William Fornaciari | |
SPECIAL SESSION: Mid-Term Results of the H-INCEPTION CATRENE project |
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| Multi-Domain Virtual Prototyping in a SystemC SIL Framework: A Heating System Case Study | |
| Nikolaos Ilieskou, Marijn Blom, Lou Somers, Michel Reniers and Twan Basten | |
| Pre-Simulation Elaboration of Heterogeneous Systems: The SystemC Multi-Disciplinary Virtual Prototyping Approach | |
| Cédric Ben Aoun, Liliana Andrade, Torsten Maehne, François Pecheux, Marie-Minerve Louërat and Alain Vachoux | |
| Multi-Domain SystemC Model of 128 Channels Time-Multiplexed Neural Interface Front-End | |
| Kiki Wirianto, Amir Zjajo, Carlo Galuzzi, Rene van Leuken | |
SPECIAL SESSION: Mid-Term Results of the ALMARVI ARTEMIS project |
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| Current Analysis Approaches and Performance Needs for Whole Slide Image Processing in Breast Cancer Diagnostics | |
| Irene Pöllänen, Billy Braithwaite, Keijo Haataja, Tiia Ikonen and Pekka Toivanen | |
| GPU Implementation of an Anisotropic Huber-L1 Dense Optical Flow Algorithm Using OpenCL | |
| Duygu Buyukaydin and Toygar Akgun | |
| Multi-Constraint Multi-Processor Resource Allocation | |
| Amir R. B. Behrouzian, Dip Goswami, Twan Basten, Marc Geilen and Hadi Alizadeh Ara | |
| Performance evaluation of image noise reduction computing on a mobile platform | |
| Jari Hannuksela, Matti Niskanen and Markus Turtinen | |
| Power Optimizations for a Transport Triggered SIMD Processor | |
| Joonas Multanen, Timo Viitanen, Henry Linjamäki, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Lauri Koskinen, Jesse Simonsson, Heikki Berg, Kalle Raiskila and Tommi Zetterman | |
| Using VLIW Softcore Processors for Image Processing Applications | |
| Joost Hoozemans, Stephan Wong and Zaid Al-Ars | |
| Video Chain Demonstrator on Xilinx Kintex7 FPGA with EdkDSP Floating Point Accelerators | |
| Jiri Kadlec | |
VIPES WORKSHOP |
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| Deterministic Event-based Control of Virtual Platforms for MPSoC Software Debugging | |
Luis Gabriel Murillo, Robert Lajos Buecs, Rainer Leupers and Gerd Ascheid |
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| ESL Power Estimation using Virtual Platforms with Black Box Processor Models |
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| Stefan Schurmans, Gereon Onnebrink, Rainer Leupers, Gerd Ascheid, Xiaotao Chen | |
| A Framework for Reducing the Modeling and Simulation Complexity of Cyberphysical Systems | |
Nikolaos Zompakis and Kostas Siozios |
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| A Scriptable, Standards-Compliant Reporting and Logging Extension for SystemC | |
| Jan Wagner, Rolf Meyer, Rainer Buchty and Mladen Berekovic | |
| A Lightweight Infrastructure for the Dynamic Creation and Configuration of Virtual Platforms | |
| Christian Sauer, Hans-Peter Loeb | |
| Parallel SystemC Simulation for ESL Design using Flexible Time Decoupling | |
| Jan Henrik Weinstock, Rainer Leupers and Gerd Ascheid | |
| A Virtual Platform for Exploring Hierarchical Interconnection for Many-Accelerator Systems | |
| Efstathios Sotiriou-Xanthopoulos, Sotirios Xydis, Kostas Siozios and George Economakos | |
| MPSoCSim: An extended OVP Simulator for Modeling and Evaluation of Network-on-Chip based heterogeneous MPSoCs | |
| Philipp Wehner, Jens Rettkowski, Tobias Kleinschmidt, Diana Gohringer | |