SAMOS 2001
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Table of Contents SAMOS Conference 2011

Luigi Carro and Andy D. Pimentel Eds.

IEEE Catalog Number: CFP1152A-PRT
ISBN: 978-1-4577-0800-8

DOI: 10.1109/SAMOS.2011.6045430--10.1109/SAMOS.2011.6045492

Front matter Author Index Search

 

Keynotes

 

 

 

Methods for Design and Implementation of Dynamic Signal Processing Systems

PAGE

i

2011-IC-01

Shuvra S. Bhattacharyya

Supercomputing: Past, Present, and a possible future

PAGE

ii

2011-IC-02

Alex Ramirez

Multicore Programming

 

 

 

On STM Concurrency Control for Multicore Embedded Real-Time Software

PAGES

1--8

 

Sherif Fahmy, Binoy Ravindran

Accelerating Collective Communication in Message Passing on Manycore System-on-Chip

PAGES

9--16

 

Stefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf

On the Impact of Dynamic Task Scheduling in Heterogeneous MPSoCs

PAGES

17--24

 

Oliver Arnold, Gerhard Fettweis

Skeleton-based Automatic Parallelization of Image Processing Algorithms for GPUs

PAGES

25--32

 

Cedric Nugteren, Henk Corporaal, Bart Mesman

Energy-Aware and Low-Power Designs

 

 

 

Power Adaptive Computing System Design in Energy Harvesting Environment

PAGES

33--40

 

Qiang Liu, Terrence Mak, Junwen Luo, Wayne Luk, Alex Yakovlev

Smart Cache: A Self Adaptive Cache Architecture for Energy Efficiency

PAGES

41--50

 

Karthik T. Sundararajan, Timothy M. Jones, Nigel Topham

Power Proportional Characteristics of an Energy Manager for Web Clusters

PAGES

51--58

 

Simon Holmbacka, Sebastien Lafond, Johan Lilius

Thermal optimization for micro-architectures through selective block replication

PAGES

59--66

 

Dionisios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris

Design Space Exploration

 

 

 

Design Metrics and Visualization Techniques for Analyzing the Performance of MOEAs in DSE

PAGES

67--76

 

Toktam Taghavi, Andy D. Pimentel

Architecture Design Space Exploration of Run-Time Scalable Issue-Width Processors

PAGES

77--84

 

Ralf Koenig, Timo Stripf, Jan Heisswolf, Jürgen Becker

TCEMC: A Co-Design Flow for Application-Specific Multicores

PAGES

85--92

 

Pekka O. Jääskeläinen, Erno Salminen, Carlos S. de la Lama, Jarmo Takala, Jose Ignacio Martinez

Multi-domain transformational design flow for embedded systems

PAGES

93--101

 

Kenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, Andre B.J. Kokkeler, Gerard J. M. Smit

Accelerators

 

 

 

Dedicated Hardware Accelerators for the Epistatic Analysis of Human Genetic Data

PAGES

102--109

 

Fabio Cancare, Alessandro Marin, Donatella Sciuto

Vector Processor Customization for FFT

PAGES

110--117

 

Bogdan Spinean, Georgi Kuzmanov, Georgi N. Gaydadjiev

FPGA Based Application Specific Processing for Sensor Nodes

PAGES

118--123

 

Teemu Nylanden, Janne Janhunen, Jari Hannuksela, Olli Silven

Parametrized Hardware Architectures for the Lucas Primality Test

PAGES

124--131

 

Adrien Le Masle, Wayne Luk, Csaba Andras Moritz

Distributed Resource Management for Concurrent Execution of Multimedia Applications on MPSoC Platforms

PAGES

132--139

 

Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal

Simulation and Modeling

 

 

 

High Level Quantitative Hardware Prediction Modeling using Statistical methods

PAGES

140--149

 

Roel Meeuws, Carlo Galuzzi, Koen Bertels

Removal of Unnecessary Context Switches from the SystemC Simulation Kernel for Fast VP Simulation

PAGES

150--156

 

Kun Lu, Daniel Muller-Gritschneder, Ulf Schlichtmann

A Novel ADL-based Compiler-Centric Software Framework for Reconfigurable Mixed-ISA Processors

PAGES

157--164

 

Timo Stripf, Ralf Koenig, Jürgen Becker

ADL-Based Specification of Implementation Styles for Functional Simulators

PAGES

165--173

 

David A. Penry, Kurtis D. Cahill

A Performance Estimation Flow for Embedded Systems with Mixed Software/Hardware Modeling

PAGES

174--181

 

Joffrey Kriegel, Alain Pegatoquet, Michel Auguin, Florian Broekaert

Calibration and Validation of Software Performance Models for Pedestrian Detection Systems

PAGES

182--189

 

Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Otto Lohlein, Jürgen Teich

Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation

PAGES

190--199

 

Oscar Almer, Igor Bohm, Tobias Edler von Koch, Bjorn Franke, Stephen Kyle, Volker Seeker 

Fully-Automatic Derivation of Exact Program-Flow Constraints for a TighterWorst-Case Execution-Time Analysis

PAGES

200--208

 

Amine Marref

Image and Video Processing

 

 

 

A Hardware Accelerated Configurable ASIP Architecture for Embedded Real-Time Video-Based Driver Assistance Applications

PAGES

209--216

 

Gregor Schewior, Holger Flatt, Carsten Dolar, Christian Banz, Holger Blume

Task-based Parallel H.264 Video Encoding for Explicit Communication Architectures

PAGES

217--224

 

Michail Alvanos, George Tzenakis, Dimitrios S. Nikolopoulos, Angelos Bilas

High Throughput and Scalable Architecture for Unified Transform Coding in Embedded H.264/AVC Video Coding Systems

PAGES

225--232

 

Tiago Dias, Sebastian Lopez, Nuno Roma, Leonel Sousa

Memory and Communication Strategies

 

 

 

Scalable ASIP Implementation and Parallelization of a MIMO Sphere Detector

PAGES

233--241

 

Esther P. Adeva, Bjorn Mennenga, Gerhard Fettweis

Using SDRAMs for two-dimensional accesses of long 2n × 2m-point FFTs and transposing

PAGES

242--248

 

Stefan Langemeyer, Peter Pirsch, Holger Blume

On-Chip Network Resource Management Design and Validation

PAGES

249--254

 

Francesco Bruschi, Antonio Miele, Vincenzo Rana

Breaking the Bandwidth Wall in Chip Multiprocessors

PAGES

255--262

 

Augusto Vega, Felipe Cabarcas, Alex Ramirez, Mateo Valero

Instruction Buffer with Limited Control Flow and Loop Nest Support

PAGES

263--269

 

Vladimír Guzma, Teemu Pitkänen, Jarmo Takala

Optimizing Wait-States in the Synthesis of Memory References with Unpredictable Latencies

PAGES

270--277

 

Yosi Ben Asher, Ron Meldiner, Nadav Rotem

A Kernel Interleaved Scheduling Method for Streaming Applications on Soft-core Vector Processors

PAGES

278--285

 

Chengwei Zheng, John McAllister, Yun Wu

Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor

PAGES

286--293

 

Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen

MOVE-Pro: a Low Power and High Code Density TTA Architecture

PAGES

294--301

 

Yifan He, Dongrui She, Bart Mesman, Henk Corporaal

SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities

 

 

 

Introduction to the Special Session on "3D Chips: Challenges and Opportunities"

PAGE

302

2011-IC-40

Tong Zhang

Analyzing the Performance and Energy Impact of 3D Memory Integration on Embedded DSPs

PAGES

303--309

 

Daniel W. Chang, Nam S. Kim, Michael Schulte

Functional Unit Sharing Between Stacked Processors in 3D Integrated Systems

PAGES

311--316

 

Demid Borodin, Winston Siauw, Sorin Dan Cotofana

On-Chip Dynamic Programming Networks Using 3D-TSV Integration

PAGES

318--324

 

Ra’ed Al-Dujaily, Terrence Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alex Yakovlev, Chi-Sang Poon

3D Specific Systems Design and CAD

PAGES

326--329

 

Paul D. Franzon, Thor Thorolfsson, W. Rhett Davis, Samson Melamed

SPECIAL SESSION 2: What's next for ESL

 

 

 

Introduction to the Special Session on "What's next for ESL"

PAGE

330

2011-IC-45

Christian Haubelt  

Challenges of Multi- and Many-Core Architectures for Electronic System-Level Design

PAGES

331--338

 

Kim Gruttner, Philipp A. Hartmann, Wolfgang Nebel   

Integrated Model-Driven Design-Space Exploration for Embedded Systems

PAGES

339--346

 

Nikola Trcka, Martijn Hendriks, Twan Basten, Marc Geilen, Lou Somers  

Trends in Embedded Software Synthesis

PAGES

347--354

 

Jeronimo Castrillon, Weihua Sheng, Rainer Leupers

Software Synthesis in the ESL Methodology for Multicore Embedded Systems

PAGES

355--362

 

Soonhoi Ha, Hyunok Oh   

SPECIAL SESSION 3: Adaptive Systems

 

 

 

Introduction to the Special Session on "Adaptive Systems"

PAGE

363

2011-IC-50

Gerard J. M. Smit   

Admission Control and Self-Configuration in the EPOC Framework

PAGES

364--371

 

Steffen Stein, Moritz Neukirchner, Rolf Ernst

Mapping of Modal Applications given Throughput and Latency Constraints

PAGES

372--379

 

Stefan J. Geuns, Joost P.H.M. Hausmans, Marco J.G. Bekooij

Heterogeneous and Runtime Parameterizable Star-Wheels Network-on-Chip

PAGES

380--387

 

Diana Gohringer, Oliver Oey, Michael Hubner, Jürgen Becker  

Adaptive resource allocation for streaming applications

PAGES

388--395

 

Timon D. ter Braak, Hermen A. Toersche, Andre B.J. Kokkeler, Gerard J. M. Smit  

Composable Power Management with Energy and Power Budgets per Application

PAGES

396--403

 

Andrew Nelson, Anca M. Molnos, Kees Goossens   

Scenario-Aware Dataflow: Modeling, Analysis and Implementation of Dynamic Applications

PAGES

404--411

 

Sander Stuijk, Marc Geilen, Bart Theelen, Twan Basten