Here, you can search for papers published in the SAMOS Workshops and SAMOS Conferences from 2001. You can search either by name, and/or by year, and/or by specific keywords in the title of the paper/session. For each document in the table, a link to download the file in pdf format is included at the end of the corresponding row. Due to copyrights agreements, it is possible to download only the files related to keynotes and beachnotes. The rest of the files can be downloaded via the Publications page (Subscription to either IEEE or Springer or both is required). If you are a registered user of the WIKI PAGE, all the publications are available for download via the corresponding links in the WIKI PAGE.
| Name | Year |
Title of the publicationa |
Author(s) of the publicationb |
Sessionc |
Download (PDF) |
|---|---|---|---|---|---|
| Avasare, Prabhat | 2001 |
Desm-E-leoign of Can, a Run-Time Reconfigurable Web Camera | Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest | Applications | |
| Bednara, Marcus | 2001 |
Generation of Distributed Loop Control | Marcus Bednara, Frank Hannig, Jürgen Teich | Compiler and Mapping Technology | |
| Bhattacharya, Bishnupriya | 2001 |
Consistency Analysis of Reconfigurable Dataflow Specifications | Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya | System-Level Design and Simulation | |
| Bhattacharyya, Shuvra S. | 2001 |
Consistency Analysis of Reconfigurable Dataflow Specifications | Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya | System-Level Design and Simulation | |
| Coene, Paul | 2001 |
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera | Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest | Applications | |
| Coffland, Joe E. | 2001 |
Towards Efficient Design Space Exploration of Heterogeneous Embedded Media Systems | Andy D. Pimentel, Simon Polstra, Frank P. Terpstra, A. W. van Halderen, Joe E. Coffland, L.O. Hertzberger | System-Level Design and Simulation | |
| Cotofana, Sorin Dan | 2001 |
Microcoded Reconfigurable Embedded Processors: Current Developments | Stephan Wong, Stamatis Vassiliadis, Sorin Dan Cotofana | Embedded Processors and Architectures | |
| Cotofana, Sorin Dan | 2001 |
A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study | Mihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees Vissers | Embedded Processors and Architectures | |
| Decneut, Stijn | 2001 |
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera | Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest | Applications | |
| Deprettere, Ed F. | 2001 |
A Methodology to Design Programmable Embedded Systems: The Y-Chart Approach | Bart Kienhuis, Ed F. Deprettere, Pieter van der Wolf, Kees Vissers | System-Level Design and Simulation | |
| Deprettere, Ed F. | 2001 |
Translating Imperative Affine Nested Loop Programs into Process Networks | Ed F. Deprettere, Edwin Rijpkema, Bart Kienhuis | Compiler and Mapping Technology | |
| Desmet, Dirk | 2001 |
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera | Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest | Applications | |
| Dey, Sujit | 2001 |
Design of an Adaptive Architecture for Energy Efficient Wireless Image Communication | Clark N. Taylor, Debashis Panigrahi, Sujit Dey | Embedded Processors and Architectures | |
| Ernst, Rolf | 2001 |
Flexibility/Cost-Tradeoffs of Platform-Based Systems | Christian Haubelt, Jürgen Teich, Kai Richter, Rolf Ernst | System-Level Design and Simulation | |
| Freimann, A. | 2001 |
Processor Architectures for Multimedia Applications | Peter Pirsch, A. Freimann, C. Klar, Jens Peter Wittenburg | Embedded Processors and Architectures | |
| Glossner, John | 2001 |
A Java-Enabled DSP | John Glossner, Michael Schulte, Stamatis Vassiliadis | Applications | |
| Hannig, Frank | 2001 |
Generation of Distributed Loop Control | Marcus Bednara, Frank Hannig, Jürgen Teich | Compiler and Mapping Technology | |
| Haubelt, Christian | 2001 |
Flexibility/Cost-Tradeoffs of Platform-Based Systems | Christian Haubelt, Jürgen Teich, Kai Richter, Rolf Ernst | System-Level Design and Simulation | |
| Hendrickx, Filip | 2001 |
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera | Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest | Applications | |
| Hertzberger, L.O. | 2001 |
Towards Efficient Design Space Exploration of Heterogeneous Embedded Media Systems | Andy D. Pimentel, Simon Polstra, Frank P. Terpstra, A. W. van Halderen, Joe E. Coffland, L.O. Hertzberger | System-Level Design and Simulation | |
| Irwin, James | 2001 |
Caches with Compositional Performance | Henk Muller, Dan Page, James Irwin, David May | Embedded Processors and Architectures | |
| Kienhuis, Bart | 2001 |
A Methodology to Design Programmable Embedded Systems: The Y-Chart Approach | Bart Kienhuis, Ed F. Deprettere, Pieter van der Wolf, Kees Vissers | System-Level Design and Simulation | |
| Kienhuis, Bart | 2001 |
Translating Imperative Affine Nested Loop Programs into Process Networks | Ed F. Deprettere, Edwin Rijpkema, Bart Kienhuis | Compiler and Mapping Technology | |
| Kisuki, T. | 2001 |
Iterative Compilation | Peter M. W. Knijnenburg, T. Kisuki, M. F. P. O’Boyle | Compiler and Mapping Technology | |
| Klar, C. | 2001 |
Processor Architectures for Multimedia Applications | Peter Pirsch, A. Freimann, C. Klar, Jens Peter Wittenburg | Embedded Processors and Architectures | |
| Knijnenburg, Peter M. W. | 2001 |
Iterative Compilation | Peter M. W. Knijnenburg, T. Kisuki, M. F. P. O’Boyle | Compiler and Mapping Technology | |
| Kuzmanov, Georgi | 2001 |
A 2D Addressing Mode for Multimedia Applications | Georgi Kuzmanov, Stamatis Vassiliadis, Jos T. J. van Eijndhoven | Applications | |
| Lieverse, Paul | 2001 |
An Overview of Methodologies and Tools in the Field of System-Level Design | Vladimir D. Zivkovic, Paul Lieverse | System-Level Design and Simulation | |
| Marescaux, Théodore | 2001 |
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera | Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest | Applications | |
| May, David | 2001 |
Caches with Compositional Performance | Henk Muller, Dan Page, James Irwin, David May | Embedded Processors and Architectures | |
| Mignolet, Jean-Yves | 2001 |
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera | Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest | Applications | |
| Muller, Henk | 2001 |
Caches with Compositional Performance | Henk Muller, Dan Page, James Irwin, David May | Embedded Processors and Architectures | |
| O’Boyle, M. F. P. | 2001 |
Iterative Compilation | Peter M. W. Knijnenburg, T. Kisuki, M. F. P. O’Boyle | Compiler and Mapping Technology | |
| Page, Dan | 2001 |
Caches with Compositional Performance | Henk Muller, Dan Page, James Irwin, David May | Embedded Processors and Architectures | |
| Panigrahi, Debashis | 2001 |
Design of an Adaptive Architecture for Energy Efficient Wireless Image Communication | Clark N. Taylor, Debashis Panigrahi, Sujit Dey | Embedded Processors and Architectures | |
| Pasko, Robert | 2001 |
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera | Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest | Applications | |
| Pimentel, Andy D. | 2001 |
Towards Efficient Design Space Exploration of Heterogeneous Embedded Media Systems | Andy D. Pimentel, Simon Polstra, Frank P. Terpstra, A. W. van Halderen, Joe E. Coffland, L.O. Hertzberger | System-Level Design and Simulation | |
| Pirsch, Peter | 2001 |
Processor Architectures for Multimedia Applications | Peter Pirsch, A. Freimann, C. Klar, Jens Peter Wittenburg | Embedded Processors and Architectures | |
| Polstra, Simon | 2001 |
Towards Efficient Design Space Exploration of Heterogeneous Embedded Media Systems | Andy D. Pimentel, Simon Polstra, Frank P. Terpstra, A. W. van Halderen, Joe E. Coffland, L.O. Hertzberger | System-Level Design and Simulation | |
| Quinton, Patrice | 2001 |
Structured Scheduling of Recurrence Equations: Theory and Practice | Patrice Quinton, Tanguy Risset | Compiler and Mapping Technology | |
| Richter, Kai | 2001 |
Flexibility/Cost-Tradeoffs of Platform-Based Systems | Christian Haubelt, Jürgen Teich, Kai Richter, Rolf Ernst | System-Level Design and Simulation | |
| Rijpkema, Edwin | 2001 |
Translating Imperative Affine Nested Loop Programs into Process Networks | Ed F. Deprettere, Edwin Rijpkema, Bart Kienhuis | Compiler and Mapping Technology | |
| Risset, Tanguy | 2001 |
Structured Scheduling of Recurrence Equations: Theory and Practice | Patrice Quinton, Tanguy Risset | Compiler and Mapping Technology | |
| Schaumont, Patrick | 2001 |
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera | Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest | Applications | |
| Schulte, Michael | 2001 |
A Java-Enabled DSP | John Glossner, Michael Schulte, Stamatis Vassiliadis | Applications | |
| Sima, Mihai | 2001 |
A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study | Mihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees Vissers | Embedded Processors and Architectures | |
| Taylor, Clark N. | 2001 |
Design of an Adaptive Architecture for Energy Efficient Wireless Image Communication | Clark N. Taylor, Debashis Panigrahi, Sujit Dey | Embedded Processors and Architectures | |
| Teich, Jürgen | 2001 |
Flexibility/Cost-Tradeoffs of Platform-Based Systems | Christian Haubelt, Jürgen Teich, Kai Richter, Rolf Ernst | System-Level Design and Simulation | |
| Teich, Jürgen | 2001 |
Exact Partitioning of Affine Dependence Algorithms | Jürgen Teich, Lothar Thiele | Compiler and Mapping Technology | |
| Teich, Jürgen | 2001 |
Generation of Distributed Loop Control | Marcus Bednara, Frank Hannig, Jürgen Teich | Compiler and Mapping Technology | |
| Terpstra, Frank P. | 2001 |
Towards Efficient Design Space Exploration of Heterogeneous Embedded Media Systems | Andy D. Pimentel, Simon Polstra, Frank P. Terpstra, A. W. van Halderen, Joe E. Coffland, L.O. Hertzberger | System-Level Design and Simulation | |
| Thiele, Lothar | 2001 |
Exact Partitioning of Affine Dependence Algorithms | Jürgen Teich, Lothar Thiele | Compiler and Mapping Technology | |
| van der Wolf, Pieter | 2001 |
A Methodology to Design Programmable Embedded Systems: The Y-Chart Approach | Bart Kienhuis, Ed F. Deprettere, Pieter van der Wolf, Kees Vissers | System-Level Design and Simulation | |
| van Eijndhoven, Jos T. J. | 2001 |
A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study | Mihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees Vissers | Embedded Processors and Architectures | |
| van Eijndhoven, Jos T. J. | 2001 |
A 2D Addressing Mode for Multimedia Applications | Georgi Kuzmanov, Stamatis Vassiliadis, Jos T. J. van Eijndhoven | Applications | |
| van Halderen, A. W. | 2001 |
Towards Efficient Design Space Exploration of Heterogeneous Embedded Media Systems | Andy D. Pimentel, Simon Polstra, Frank P. Terpstra, A. W. van Halderen, Joe E. Coffland, L.O. Hertzberger | System-Level Design and Simulation | |
| Vassiliadis, Stamatis | 2001 |
Microcoded Reconfigurable Embedded Processors: Current Developments | Stephan Wong, Stamatis Vassiliadis, Sorin Dan Cotofana | Embedded Processors and Architectures | |
| Vassiliadis, Stamatis | 2001 |
A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study | Mihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees Vissers | Embedded Processors and Architectures | |
| Vassiliadis, Stamatis | 2001 |
A 2D Addressing Mode for Multimedia Applications | Georgi Kuzmanov, Stamatis Vassiliadis, Jos T. J. van Eijndhoven | Applications | |
| Vassiliadis, Stamatis | 2001 |
A Java-Enabled DSP | John Glossner, Michael Schulte, Stamatis Vassiliadis | Applications | |
| Verkest, Diederik | 2001 |
Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera | Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest | Applications | |
| Vissers, Kees | 2001 |
A Methodology to Design Programmable Embedded Systems: The Y-Chart Approach | Bart Kienhuis, Ed F. Deprettere, Pieter van der Wolf, Kees Vissers | System-Level Design and Simulation | |
| Vissers, Kees | 2001 |
A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study | Mihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees Vissers | Embedded Processors and Architectures | |
| Wittenburg, Jens Peter | 2001 |
Processor Architectures for Multimedia Applications | Peter Pirsch, A. Freimann, C. Klar, Jens Peter Wittenburg | Embedded Processors and Architectures | |
| Wong, Stephan | 2001 |
Microcoded Reconfigurable Embedded Processors: Current Developments | Stephan Wong, Stamatis Vassiliadis, Sorin Dan Cotofana | Embedded Processors and Architectures | |
| Zivkovic, Vladimir D. | 2001 |
An Overview of Methodologies and Tools in the Field of System-Level Design | Vladimir D. Zivkovic, Paul Lieverse | System-Level Design and Simulation | |
| Alliot, Sylvain | 2002 |
A Scalable platform for large scale array signal processing systems specification and prototyping | Sylvain Alliot, Ed F. Deprettere | Modeling & Simulation | |
| Bhattacharyya, Shuvra S. | 2002 |
Goal-Driven Reconfiguration of Polymorphous Architectures | Sumit Lohani, Shuvra S. Bhattacharyya | Reconfigurable Architecture | |
| Cheung, Peter Y.K. | 2002 |
Customising Flexible Instruction Processors: A Tutorial Introduction | Shay Ping Seng, Wayne Luk, Peter Y.K. Cheung | Processors | |
| Coffland, Joe E. | 2002 |
Modeling of Intra-task Parallelism in Sesame | Andy D. Pimentel, Frank P. Terpstra, Simon Polstra, Joe E. Coffland | Modeling & Simulation | |
| Cotofana, Sorin Dan | 2002 |
Future Directions of (Programmable and Reconfigurable) Embedded Processors | Stephan Wong, Stamatis Vassiliadis, Sorin Dan Cotofana | Reconfigurable Architecture | |
| Cotofana, Sorin Dan | 2002 |
Entropy Decoding on TriMedia/CPU64 | Mihai Sima, Evert-Jan Pol, Jos T. J. van Eijndhoven, Sorin Dan Cotofana, Stamatis Vassiliadis | Processors | |
| Deprettere, Ed F. | 2002 |
Realizations of the Extended Linearization Model in the Compaan Tool Chain | Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere | Modeling & Simulation | |
| Deprettere, Ed F. | 2002 |
A Scalable platform for large scale array signal processing systems specification and prototyping | Sylvain Alliot, Ed F. Deprettere | Modeling & Simulation | |
| Derrien, Steven | 2002 |
Automatic Synthesis of Efficient Interfaces from Compiled Regular Architectures | Steven Derrien, Anne-Claire Guillou, Patrice Quinton, Tanguy Risset, Charles Wagner | Modeling & Simulation | |
| Glossner, John | 2002 |
Automatic VHDL Model Generation of Parameterized FIR Filters | E. George Walters III, John Glossner, Michael Schulte | Processors | |
| Guevorkian, David | 2002 |
Highly Efficient Scalable Parallel-Pipelined Architectures for Discrete Wavelet Transforms | David Guevorkian, Petri Liuha, Aki Launiainen, Ville Lappalainen | Processors | |
| Guillou, Anne-Claire | 2002 |
Automatic Synthesis of Efficient Interfaces from Compiled Regular Architectures | Steven Derrien, Anne-Claire Guillou, Patrice Quinton, Tanguy Risset, Charles Wagner | Modeling & Simulation | |
| Hannig, Frank | 2002 |
Energy Estimation for Piecewise Regular Processor Arrays | Frank Hannig, Jürgen Teich | Modeling & Simulation | |
| Järvinen, Tuomas | 2002 |
Stride Permutation Access in Interleaved Memory Systems | Jarmo Takala, Tuomas Järvinen | Processors | |
| Kienhuis, Bart | 2002 |
Realizations of the Extended Linearization Model in the Compaan Tool Chain | Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere | Modeling & Simulation | |
| Lagadec, Loïc | 2002 |
A high level synthesis framework for reconfigurable architectures | Loïc Lagadec, Bernard Pottier, Oscar Villellas-Guillen | Reconfigurable Architecture | |
| Lappalainen, Ville | 2002 |
Highly Efficient Scalable Parallel-Pipelined Architectures for Discrete Wavelet Transforms | David Guevorkian, Petri Liuha, Aki Launiainen, Ville Lappalainen | Processors | |
| Launiainen, Aki | 2002 |
Highly Efficient Scalable Parallel-Pipelined Architectures for Discrete Wavelet Transforms | David Guevorkian, Petri Liuha, Aki Launiainen, Ville Lappalainen | Processors | |
| Liuha, Petri | 2002 |
Highly Efficient Scalable Parallel-Pipelined Architectures for Discrete Wavelet Transforms | David Guevorkian, Petri Liuha, Aki Launiainen, Ville Lappalainen | Processors | |
| Lohani, Sumit | 2002 |
Goal-Driven Reconfiguration of Polymorphous Architectures | Sumit Lohani, Shuvra S. Bhattacharyya | Reconfigurable Architecture | |
| Luk, Wayne | 2002 |
Customising Flexible Instruction Processors: A Tutorial Introduction | Shay Ping Seng, Wayne Luk, Peter Y.K. Cheung | Processors | |
| Pimentel, Andy D. | 2002 |
Modeling of Intra-task Parallelism in Sesame | Andy D. Pimentel, Frank P. Terpstra, Simon Polstra, Joe E. Coffland | Modeling & Simulation | |
| Pol, Evert-Jan | 2002 |
Entropy Decoding on TriMedia/CPU64 | Mihai Sima, Evert-Jan Pol, Jos T. J. van Eijndhoven, Sorin Dan Cotofana, Stamatis Vassiliadis | Processors | |
| Polstra, Simon | 2002 |
Modeling of Intra-task Parallelism in Sesame | Andy D. Pimentel, Frank P. Terpstra, Simon Polstra, Joe E. Coffland | Modeling & Simulation | |
| Pottier, Bernard | 2002 |
A high level synthesis framework for reconfigurable architectures | Loïc Lagadec, Bernard Pottier, Oscar Villellas-Guillen | Reconfigurable Architecture | |
| Quinton, Patrice | 2002 |
Automatic Synthesis of Efficient Interfaces from Compiled Regular Architectures | Steven Derrien, Anne-Claire Guillou, Patrice Quinton, Tanguy Risset, Charles Wagner | Modeling & Simulation | |
| Risset, Tanguy | 2002 |
Automatic Synthesis of Efficient Interfaces from Compiled Regular Architectures | Steven Derrien, Anne-Claire Guillou, Patrice Quinton, Tanguy Risset, Charles Wagner | Modeling & Simulation | |
| Schulte, Michael | 2002 |
Automatic VHDL Model Generation of Parameterized FIR Filters | E. George Walters III, John Glossner, Michael Schulte | Processors | |
| Seng, Shay Ping | 2002 |
Customising Flexible Instruction Processors: A Tutorial Introduction | Shay Ping Seng, Wayne Luk, Peter Y.K. Cheung | Processors | |
| Sima, Mihai | 2002 |
Entropy Decoding on TriMedia/CPU64 | Mihai Sima, Evert-Jan Pol, Jos T. J. van Eijndhoven, Sorin Dan Cotofana, Stamatis Vassiliadis | Processors | |
| Takala, Jarmo | 2002 |
Stride Permutation Access in Interleaved Memory Systems | Jarmo Takala, Tuomas Järvinen | Processors | |
| Teich, Jürgen | 2002 |
Energy Estimation for Piecewise Regular Processor Arrays | Frank Hannig, Jürgen Teich | Modeling & Simulation | |
| Terpstra, Frank P. | 2002 |
Modeling of Intra-task Parallelism in Sesame | Andy D. Pimentel, Frank P. Terpstra, Simon Polstra, Joe E. Coffland | Modeling & Simulation | |
| Turjan, Alexandru | 2002 |
Realizations of the Extended Linearization Model in the Compaan Tool Chain | Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere | Modeling & Simulation | |
| van Eijndhoven, Jos T. J. | 2002 |
Entropy Decoding on TriMedia/CPU64 | Mihai Sima, Evert-Jan Pol, Jos T. J. van Eijndhoven, Sorin Dan Cotofana, Stamatis Vassiliadis | Processors | |
| Vassiliadis, Stamatis | 2002 |
Future Directions of (Programmable and Reconfigurable) Embedded Processors | Stephan Wong, Stamatis Vassiliadis, Sorin Dan Cotofana | Reconfigurable Architecture | |
| Vassiliadis, Stamatis | 2002 |
Entropy Decoding on TriMedia/CPU64 | Mihai Sima, Evert-Jan Pol, Jos T. J. van Eijndhoven, Sorin Dan Cotofana, Stamatis Vassiliadis | Processors | |
| Villellas-Guillen, Oscar | 2002 |
A high level synthesis framework for reconfigurable architectures | Loïc Lagadec, Bernard Pottier, Oscar Villellas-Guillen | Reconfigurable Architecture | |
| Wagner, Charles | 2002 |
Automatic Synthesis of Efficient Interfaces from Compiled Regular Architectures | Steven Derrien, Anne-Claire Guillou, Patrice Quinton, Tanguy Risset, Charles Wagner | Modeling & Simulation | |
| Walters III, E. George | 2002 |
Automatic VHDL Model Generation of Parameterized FIR Filters | E. George Walters III, John Glossner, Michael Schulte | Processors | |
| Wong, Stephan | 2002 |
Future Directions of (Programmable and Reconfigurable) Embedded Processors | Stephan Wong, Stamatis Vassiliadis, Sorin Dan Cotofana | Reconfigurable Architecture | |
| Ascheid, Gerd | 2003 |
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs | Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Architectures and Implementation | |
| Ayguadé, Eduard | 2003 |
Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units | Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero | Architectures and Implementation | |
| Benoit, Pascal | 2003 |
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon | Architectures and Implementation | |
| Bertels, Koen | 2003 |
The Molen Programming Paradigm | Stamatis Vassiliadis, Georgi N. Gaydadjiev, Koen Bertels, Elena Moscu Panainte | Reconfigurable Computing | |
| Blanc, Frédéric | 2003 |
RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems | Stéphane Chevobbe, Nicolas Ventroux, Frédéric Blanc, Thierry Collette | Reconfigurable Computing | |
| Cambon, Gaston | 2003 |
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon | Architectures and Implementation | |
| Chevobbe, Stéphane | 2003 |
RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems | Stéphane Chevobbe, Nicolas Ventroux, Frédéric Blanc, Thierry Collette | Reconfigurable Computing | |
| Cichon, Gordon | 2003 |
MOUSE: A Shortcut from Matlab Source to SIMD DSP Assembly Code | Gordon Cichon, Gerhard Fettweis | Compilers, System Modeling, and Simulation | |
| Collette, Thierry | 2003 |
RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems | Stéphane Chevobbe, Nicolas Ventroux, Frédéric Blanc, Thierry Collette | Reconfigurable Computing | |
| Cotofana, Sorin Dan | 2003 |
High-Level Energy Estimation for ARM-Based SOCs | Dan Crisu, Sorin Dan Cotofana, Stamatis Vassiliadis, Petri Liuha | Compilers, System Modeling, and Simulation | |
| Crisu, Dan | 2003 |
High-Level Energy Estimation for ARM-Based SOCs | Dan Crisu, Sorin Dan Cotofana, Stamatis Vassiliadis, Petri Liuha | Compilers, System Modeling, and Simulation | |
| Demigny, Didier | 2003 |
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon | Architectures and Implementation | |
| Dimakopulos, Vassilios V. | 2003 |
CoDeL: Automatically Synthesizing Network Interface Controllers | Radhakrishnan Sivakumar, Vassilios V. Dimakopulos, Nikitas J. Dimopoulos | Architectures and Implementation | |
| Dimopoulos, Nikitas J. | 2003 |
CoDeL: Automatically Synthesizing Network Interface Controllers | Radhakrishnan Sivakumar, Vassilios V. Dimakopulos, Nikitas J. Dimopoulos | Architectures and Implementation | |
| Doerper, Malte | 2003 |
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs | Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Architectures and Implementation | |
| Erbas, Cagkan | 2003 |
IDF Models for Trace Transformations: A Case Study in Computational Refinement | Cagkan Erbas, Simon Polstra, Andy D. Pimentel | Compilers, System Modeling, and Simulation | |
| Fabiani, Erwan | 2003 |
Intermediate Level Components for Reconfigurable Platforms | Erwan Fabiani, Christophe Gouyen, Bernard Pottier | Reconfigurable Computing | |
| Fettweis, Gerhard | 2003 |
MOUSE: A Shortcut from Matlab Source to SIMD DSP Assembly Code | Gordon Cichon, Gerhard Fettweis | Compilers, System Modeling, and Simulation | |
| Gaydadjiev, Georgi N. | 2003 |
The Molen Programming Paradigm | Stamatis Vassiliadis, Georgi N. Gaydadjiev, Koen Bertels, Elena Moscu Panainte | Reconfigurable Computing | |
| Gaydadjiev, Georgi N. | 2003 |
Loading ρμ-Code: Design Considerations | Georgi Kuzmanov, Georgi N. Gaydadjiev, Stamatis Vassiliadis | Reconfigurable Computing | |
| Gossens, Stefan | 2003 |
An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs | Ulrich Heinkel, Claus Mayer, Charles Webb, Hans Sahm, Werner Haas, Stefan Gossens | Architectures and Implementation | |
| Gouyen, Christophe | 2003 |
Intermediate Level Components for Reconfigurable Platforms | Erwan Fabiani, Christophe Gouyen, Bernard Pottier | Reconfigurable Computing | |
| Gries, Ulrich | 2003 |
A Cost-Efficient RISC Processor Platform for Real Time Audio Applications | Jens Peter Wittenburg, Ulrich Schreiber, Ulrich Gries, Markus Schneider, Tim Niggemeier | Reconfigurable Computing | |
| Guevorkian, David | 2003 |
A Family of Accelerators for Matrix-Vector Arithmetics Based on High-Radix Multiplier Structures | David Guevorkian, Petri Liuha, Aki Launiainen, Ville Lappalainen | Architectures and Implementation | |
| Haas, Werner | 2003 |
An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs | Ulrich Heinkel, Claus Mayer, Charles Webb, Hans Sahm, Werner Haas, Stefan Gossens | Architectures and Implementation | |
| Hämäläinen, Timo D. | 2003 |
Comparison of Data Dependence Analysis Tests | Miia Viitanen, Timo D. Hämäläinen | Compilers, System Modeling, and Simulation | |
| Haubelt, Christian | 2003 |
Basic OS Support for Distributed Reconfigurable Hardware | Christian Haubelt, Dirk Koch, Jürgen Teich | Reconfigurable Computing | |
| Heinkel, Ulrich | 2003 |
An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs | Ulrich Heinkel, Claus Mayer, Charles Webb, Hans Sahm, Werner Haas, Stefan Gossens | Architectures and Implementation | |
| Järvinen, Tuomas | 2003 |
Register-Based Permutation Networks for Stride Permutations | Tuomas Järvinen, Jarmo Takala | Architectures and Implementation | |
| Kempf, Torsten | 2003 |
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs | Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Architectures and Implementation | |
| Koch, Dirk | 2003 |
Basic OS Support for Distributed Reconfigurable Hardware | Christian Haubelt, Dirk Koch, Jürgen Teich | Reconfigurable Computing | |
| Kogel, Tim | 2003 |
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs | Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Architectures and Implementation | |
| Kuzmanov, Georgi | 2003 |
Loading ρμ-Code: Design Considerations | Georgi Kuzmanov, Georgi N. Gaydadjiev, Stamatis Vassiliadis | Reconfigurable Computing | |
| Langerwerf, Javier Martín | 2003 |
Performance Estimation of Streaming Media Applications for Reconfigurable Platforms | Carsten Reuter, Javier Martín Langerwerf, Hans-Joachim Stolberg, Peter Pirsch | Reconfigurable Computing | |
| Lappalainen, Ville | 2003 |
A Family of Accelerators for Matrix-Vector Arithmetics Based on High-Radix Multiplier Structures | David Guevorkian, Petri Liuha, Aki Launiainen, Ville Lappalainen | Architectures and Implementation | |
| Launiainen, Aki | 2003 |
A Family of Accelerators for Matrix-Vector Arithmetics Based on High-Radix Multiplier Structures | David Guevorkian, Petri Liuha, Aki Launiainen, Ville Lappalainen | Architectures and Implementation | |
| Leupers, Rainer | 2003 |
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs | Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Architectures and Implementation | |
| Liuha, Petri | 2003 |
A Family of Accelerators for Matrix-Vector Arithmetics Based on High-Radix Multiplier Structures | David Guevorkian, Petri Liuha, Aki Launiainen, Ville Lappalainen | Architectures and Implementation | |
| Liuha, Petri | 2003 |
High-Level Energy Estimation for ARM-Based SOCs | Dan Crisu, Sorin Dan Cotofana, Stamatis Vassiliadis, Petri Liuha | Compilers, System Modeling, and Simulation | |
| Llosa, Josep | 2003 |
Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units | Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero | Architectures and Implementation | |
| Luk, Wayne | 2003 |
Customising Processors: Design-Time and Run-Time Opportunities | Wayne Luk | Reconfigurable Computing | |
| Mayer, Claus | 2003 |
An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs | Ulrich Heinkel, Claus Mayer, Charles Webb, Hans Sahm, Werner Haas, Stefan Gossens | Architectures and Implementation | |
| Meyr, Heinrich | 2003 |
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs | Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Architectures and Implementation | |
| Moscu Panainte, Elena | 2003 |
The Molen Programming Paradigm | Stamatis Vassiliadis, Georgi N. Gaydadjiev, Koen Bertels, Elena Moscu Panainte | Reconfigurable Computing | |
| Niggemeier, Tim | 2003 |
A Cost-Efficient RISC Processor Platform for Real Time Audio Applications | Jens Peter Wittenburg, Ulrich Schreiber, Ulrich Gries, Markus Schneider, Tim Niggemeier | Reconfigurable Computing | |
| Pericàs, Miquel | 2003 |
Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units | Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero | Architectures and Implementation | |
| Pimentel, Andy D. | 2003 |
IDF Models for Trace Transformations: A Case Study in Computational Refinement | Cagkan Erbas, Simon Polstra, Andy D. Pimentel | Compilers, System Modeling, and Simulation | |
| Pirsch, Peter | 2003 |
Performance Estimation of Streaming Media Applications for Reconfigurable Platforms | Carsten Reuter, Javier Martín Langerwerf, Hans-Joachim Stolberg, Peter Pirsch | Reconfigurable Computing | |
| Polstra, Simon | 2003 |
IDF Models for Trace Transformations: A Case Study in Computational Refinement | Cagkan Erbas, Simon Polstra, Andy D. Pimentel | Compilers, System Modeling, and Simulation | |
| Pottier, Bernard | 2003 |
Intermediate Level Components for Reconfigurable Platforms | Erwan Fabiani, Christophe Gouyen, Bernard Pottier | Reconfigurable Computing | |
| Reuter, Carsten | 2003 |
Performance Estimation of Streaming Media Applications for Reconfigurable Platforms | Carsten Reuter, Javier Martín Langerwerf, Hans-Joachim Stolberg, Peter Pirsch | Reconfigurable Computing | |
| Robert, Michel | 2003 |
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon | Architectures and Implementation | |
| Sahm, Hans | 2003 |
An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs | Ulrich Heinkel, Claus Mayer, Charles Webb, Hans Sahm, Werner Haas, Stefan Gossens | Architectures and Implementation | |
| Sassatelli, Gilles | 2003 |
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon | Architectures and Implementation | |
| Schneider, Markus | 2003 |
A Cost-Efficient RISC Processor Platform for Real Time Audio Applications | Jens Peter Wittenburg, Ulrich Schreiber, Ulrich Gries, Markus Schneider, Tim Niggemeier | Reconfigurable Computing | |
| Schreiber, Ulrich | 2003 |
A Cost-Efficient RISC Processor Platform for Real Time Audio Applications | Jens Peter Wittenburg, Ulrich Schreiber, Ulrich Gries, Markus Schneider, Tim Niggemeier | Reconfigurable Computing | |
| Sivakumar, Radhakrishnan | 2003 |
CoDeL: Automatically Synthesizing Network Interface Controllers | Radhakrishnan Sivakumar, Vassilios V. Dimakopulos, Nikitas J. Dimopoulos | Architectures and Implementation | |
| Stolberg, Hans-Joachim | 2003 |
Performance Estimation of Streaming Media Applications for Reconfigurable Platforms | Carsten Reuter, Javier Martín Langerwerf, Hans-Joachim Stolberg, Peter Pirsch | Reconfigurable Computing | |
| Takala, Jarmo | 2003 |
Register-Based Permutation Networks for Stride Permutations | Tuomas Järvinen, Jarmo Takala | Architectures and Implementation | |
| Teich, Jürgen | 2003 |
Basic OS Support for Distributed Reconfigurable Hardware | Christian Haubelt, Dirk Koch, Jürgen Teich | Reconfigurable Computing | |
| Torres, Lionel | 2003 |
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability | Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon | Architectures and Implementation | |
| Valero, Mateo | 2003 |
Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units | Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero | Architectures and Implementation | |
| Vassiliadis, Stamatis | 2003 |
The Molen Programming Paradigm | Stamatis Vassiliadis, Georgi N. Gaydadjiev, Koen Bertels, Elena Moscu Panainte | Reconfigurable Computing | |
| Vassiliadis, Stamatis | 2003 |
High-Level Energy Estimation for ARM-Based SOCs | Dan Crisu, Sorin Dan Cotofana, Stamatis Vassiliadis, Petri Liuha | Compilers, System Modeling, and Simulation | |
| Vassiliadis, Stamatis | 2003 |
Loading ρμ-Code: Design Considerations | Georgi Kuzmanov, Georgi N. Gaydadjiev, Stamatis Vassiliadis | Reconfigurable Computing | |
| Ventroux, Nicolas | 2003 |
RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems | Stéphane Chevobbe, Nicolas Ventroux, Frédéric Blanc, Thierry Collette | Reconfigurable Computing | |
| Viitanen, Miia | 2003 |
Comparison of Data Dependence Analysis Tests | Miia Viitanen, Timo D. Hämäläinen | Compilers, System Modeling, and Simulation | |
| Webb, Charles | 2003 |
An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs | Ulrich Heinkel, Claus Mayer, Charles Webb, Hans Sahm, Werner Haas, Stefan Gossens | Architectures and Implementation | |
| Wieferink, Andreas | 2003 |
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs | Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Architectures and Implementation | |
| Wittenburg, Jens Peter | 2003 |
A Cost-Efficient RISC Processor Platform for Real Time Audio Applications | Jens Peter Wittenburg, Ulrich Schreiber, Ulrich Gries, Markus Schneider, Tim Niggemeier | Reconfigurable Computing | |
| Zalamea, Javier | 2003 |
Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units | Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero | Architectures and Implementation | |
| Agarwal, Nainesh | 2004 |
Using CoDeL to Rapidly Prototype Network Processsor Extensions | Nainesh Agarwal, Nikitas J. Dimopoulos | Architectures and Implementation | |
| Alliot, Sylvain | 2004 |
On the (Re-)Use of IP-Components in Re-configurable Platforms | Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere | Reconfigurable Computing | |
| Antochi, Iosif | 2004 |
Memory Bandwidth Requirements of Tile-Based Rendering | Iosif Antochi, Ben Juurlink, Stamatis Vassiliadis, Petri Liuha | Architectures and Implementation | |
| Ascheid, Gerd | 2004 |
Early ISS Integration into Network-on-Chip Designs | Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | System Modeling and Simulation | |
| Ascheid, Gerd | 2004 |
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting | Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun | System Modeling and Simulation | |
| Beck, Antonio Carlos S. | 2004 |
Design Space Exploration with Automatic Selection of SW and HW for Embedded Applications | Júlio C. B. Mattos, Antonio Carlos S. Beck, Luigi Carro, Flávio R. Wagner | Architectures and Implementation | |
| Bertels, Koen | 2004 |
Dynamic Hardware Reconfigurations: Performance Impact for MPEG2 | Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis | Reconfigurable Computing | |
| Bhattacharyya, Shuvra S. | 2004 |
DIF: An Interchange Format for Dataflow-Based Design Tools | Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz Shahparnia, Shuvra S. Bhattacharyya | System Modeling and Simulation | |
| Bhattacharyya, Shuvra S. | 2004 |
Analysis of Dataflow Programs with Interval-Limited Data-Rates | Jürgen Teich, Shuvra S. Bhattacharyya | System Modeling and Simulation | |
| Blume, Holger | 2004 |
Performance Analysis of SoC Communication by Application of Deterministic and Stochastic Petri Nets | Holger Blume, Thorsten von Sydow, Tobias G. G. Noll | System Modeling and Simulation | |
| Braun, Gunnar | 2004 |
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting | Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun | System Modeling and Simulation | |
| Brockmeyer, Erik | 2004 |
Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications | Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis | System Modeling and Simulation | |
| Bronzel, Marcus | 2004 |
Synchronous Transfer Architecture (STA) | Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matúš, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Bronzel, Marcus | 2004 |
Generated DSP Cores for Implementation of an OFDM Communication System | Hendrik Seidel, Emil Matúš, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Cambonie, Joël | 2004 |
Compiler and System Techniques for soc Distributed Reconfigurable Accelerators | Joël Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani | Reconfigurable Computing | |
| Cardoso, João M. P. | 2004 |
Modeling Loop Unrolling: Approaches and Open Issues | João M. P. Cardoso, Pedro C. Diniz | Reconfigurable Computing | |
| Cardoso, João M. P. | 2004 |
Self-loop Pipelining and Reconfigurable Dataflow Arrays | João M. P. Cardoso | Reconfigurable Computing | |
| Carro, Luigi | 2004 |
Design Space Exploration with Automatic Selection of SW and HW for Embedded Applications | Júlio C. B. Mattos, Antonio Carlos S. Beck, Luigi Carro, Flávio R. Wagner | Architectures and Implementation | |
| Catthoor, Francky | 2004 |
Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications | Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis | System Modeling and Simulation | |
| Ceng, Jianjiang | 2004 |
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting | Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun | System Modeling and Simulation | |
| Charot, François | 2004 |
Architecture Exploration for 3G Telephony Applications Using a Hardware–Software Prototyping Platform | François Charot, Madeleine Nyamsi, Patrice Quinton, Charles Wagner | Reconfigurable Computing | |
| Cheung, Ray C. C. | 2004 |
Customising Hardware Designs for Elliptic Curve Cryptography | Nicolas Telle, Wayne Luk, Ray C. C. Cheung | Reconfigurable Computing | |
| Christiaens, Mark | 2004 |
Reconfigurable Hardware for a Scalable Wavelet Video Decoder and Its Performance Requirements | Dirk Stroobandt, Hendrik Eeckhaut, Harald Devos, Mark Christiaens, Fabio Verdicchio, Peter Schelkens | Reconfigurable Computing | |
| Cichon, Gordon | 2004 |
Synchronous Transfer Architecture (STA) | Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matúš, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Cichon, Gordon | 2004 |
Generated DSP Cores for Implementation of an OFDM Communication System | Hendrik Seidel, Emil Matúš, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Cimpian, Ioan | 2004 |
Communication Optimization in Compaan Process Networks | Ioan Cimpian, Alexandru Turjan, Ed F. Deprettere, Erwin de Kock | System Modeling and Simulation | |
| Dasygenis, Minas | 2004 |
Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications | Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis | System Modeling and Simulation | |
| de Kock, Erwin | 2004 |
Communication Optimization in Compaan Process Networks | Ioan Cimpian, Alexandru Turjan, Ed F. Deprettere, Erwin de Kock | System Modeling and Simulation | |
| Deprettere, Ed F. | 2004 |
On the (Re-)Use of IP-Components in Re-configurable Platforms | Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere | Reconfigurable Computing | |
| Deprettere, Ed F. | 2004 |
Communication Optimization in Compaan Process Networks | Ioan Cimpian, Alexandru Turjan, Ed F. Deprettere, Erwin de Kock | System Modeling and Simulation | |
| Deprettere, Ed F. | 2004 |
Constraints Derivation and Propagation for Large-Scale Embedded Systems Exploration | Lauren?iu Nicolae, Ed F. Deprettere | System Modeling and Simulation | |
| Devos, Harald | 2004 |
Reconfigurable Hardware for a Scalable Wavelet Video Decoder and Its Performance Requirements | Dirk Stroobandt, Hendrik Eeckhaut, Harald Devos, Mark Christiaens, Fabio Verdicchio, Peter Schelkens | Reconfigurable Computing | |
| Dimopoulos, Nikitas J. | 2004 |
Using CoDeL to Rapidly Prototype Network Processsor Extensions | Nainesh Agarwal, Nikitas J. Dimopoulos | Architectures and Implementation | |
| Diniz, Pedro C. | 2004 |
Design Space Exploration for Configurable Architectures and the Role of Modeling, High-Level Program Analysis and Learning Techniques | Pedro C. Diniz | Reconfigurable Computing | |
| Diniz, Pedro C. | 2004 |
Modeling Loop Unrolling: Approaches and Open Issues | João M. P. Cardoso, Pedro C. Diniz | Reconfigurable Computing | |
| Doerper, Malte | 2004 |
Early ISS Integration into Network-on-Chip Designs | Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | System Modeling and Simulation | |
| Durinck, Bart | 2004 |
Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications | Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis | System Modeling and Simulation | |
| Eeckhaut, Hendrik | 2004 |
Reconfigurable Hardware for a Scalable Wavelet Video Decoder and Its Performance Requirements | Dirk Stroobandt, Hendrik Eeckhaut, Harald Devos, Mark Christiaens, Fabio Verdicchio, Peter Schelkens | Reconfigurable Computing | |
| Feautrier, Paul | 2004 |
Scalable and Modular Scheduling | Paul Feautrier | System Modeling and Simulation | |
| Fettweis, Gerhard | 2004 |
On Enhancing SIMD-Controlled DSPs for Performing Recursive Filtering | Michael Hosemann, Gerhard Fettweis | Architectures and Implementation | |
| Fettweis, Gerhard | 2004 |
Synchronous Transfer Architecture (STA) | Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matúš, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Fettweis, Gerhard | 2004 |
Generated DSP Cores for Implementation of an OFDM Communication System | Hendrik Seidel, Emil Matúš, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Fraboulet, Antoine | 2004 |
Cycle Accurate Simulation Model Generation for SoC Prototyping | Antoine Fraboulet, Tanguy Risset, Antoine Scherrer | System Modeling and Simulation | |
| G. Noll, Tobias G. | 2004 |
Performance Analysis of SoC Communication by Application of Deterministic and Stochastic Petri Nets | Holger Blume, Thorsten von Sydow, Tobias G. G. Noll | System Modeling and Simulation | |
| Galanis, Michalis D. | 2004 |
A Novel Data-Path for Accelerating DSP Kernels | Michalis D. Galanis, G. Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis | Architectures and Implementation | |
| Gaydadjiev, Georgi N. | 2004 |
The Virtex II Pro MOLEN Processor | Georgi Kuzmanov, Georgi N. Gaydadjiev, Stamatis Vassiliadis | Reconfigurable Computing | |
| Glossner, John | 2004 |
A Low-Power Multithreaded Processor for Baseband Communication Systems | Michael Schulte, John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis | Architectures and Implementation | |
| Goutis, Costas E. | 2004 |
A Novel Data-Path for Accelerating DSP Kernels | Michalis D. Galanis, G. Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis | Architectures and Implementation | |
| Guérin, Sylvain | 2004 |
Compiler and System Techniques for soc Distributed Reconfigurable Accelerators | Joël Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani | Reconfigurable Computing | |
| Hämäläinen, Timo D. | 2004 |
HIBI v.2 Communication Network for System-on-Chip | Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementation | |
| Hämäläinen, Timo D. | 2004 |
A Communication-Centric Design Flow for HIBI-Based SoCs | Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen | System Modeling and Simulation | |
| Hannig, Frank | 2004 |
High-Speed Event-Driven RTL Compiled Simulation | Alexey Kupriyanov, Frank Hannig, Jürgen Teich | System Modeling and Simulation | |
| Hohenauer, Manuel | 2004 |
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting | Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun | System Modeling and Simulation | |
| Hosemann, Michael | 2004 |
On Enhancing SIMD-Controlled DSPs for Performing Recursive Filtering | Michael Hosemann, Gerhard Fettweis | Architectures and Implementation | |
| Hsu, Chia-Jui | 2004 |
DIF: An Interchange Format for Dataflow-Based Design Tools | Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz Shahparnia, Shuvra S. Bhattacharyya | System Modeling and Simulation | |
| Jesshope, Chris R. | 2004 |
Scalable Instruction-Level Parallelism | Chris R. Jesshope | Architectures and Implementation | |
| Juurlink, Ben | 2004 |
Memory Bandwidth Requirements of Tile-Based Rendering | Iosif Antochi, Ben Juurlink, Stamatis Vassiliadis, Petri Liuha | Architectures and Implementation | |
| Kangas, Tero | 2004 |
HIBI v.2 Communication Network for System-on-Chip | Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementation | |
| Kangas, Tero | 2004 |
A Communication-Centric Design Flow for HIBI-Based SoCs | Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen | System Modeling and Simulation | |
| Keceli, Fuat | 2004 |
DIF: An Interchange Format for Dataflow-Based Design Tools | Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz Shahparnia, Shuvra S. Bhattacharyya | System Modeling and Simulation | |
| Keryell, Ronan | 2004 |
Compiler and System Techniques for soc Distributed Reconfigurable Accelerators | Joël Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani | Reconfigurable Computing | |
| Ko, Ming-Yung | 2004 |
DIF: An Interchange Format for Dataflow-Based Design Tools | Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz Shahparnia, Shuvra S. Bhattacharyya | System Modeling and Simulation | |
| Kogel, Tim | 2004 |
Early ISS Integration into Network-on-Chip Designs | Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | System Modeling and Simulation | |
| Kupriyanov, Alexey | 2004 |
High-Speed Event-Driven RTL Compiled Simulation | Alexey Kupriyanov, Frank Hannig, Jürgen Teich | System Modeling and Simulation | |
| Kuusilinna, Kimmo | 2004 |
HIBI v.2 Communication Network for System-on-Chip | Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementation | |
| Kuusilinna, Kimmo | 2004 |
A Communication-Centric Design Flow for HIBI-Based SoCs | Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen | System Modeling and Simulation | |
| Kuzmanov, Georgi | 2004 |
The Virtex II Pro MOLEN Processor | Georgi Kuzmanov, Georgi N. Gaydadjiev, Stamatis Vassiliadis | Reconfigurable Computing | |
| Lagadec, Loïc | 2004 |
Compiler and System Techniques for soc Distributed Reconfigurable Accelerators | Joël Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani | Reconfigurable Computing | |
| Lahtinen, Vesa | 2004 |
HIBI v.2 Communication Network for System-on-Chip | Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementation | |
| Lahtinen, Vesa | 2004 |
A Communication-Centric Design Flow for HIBI-Based SoCs | Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen | System Modeling and Simulation | |
| Lemaitre, Jérôme | 2004 |
On the (Re-)Use of IP-Components in Re-configurable Platforms | Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere | Reconfigurable Computing | |
| Leupers, Rainer | 2004 |
Early ISS Integration into Network-on-Chip Designs | Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | System Modeling and Simulation | |
| Leupers, Rainer | 2004 |
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting | Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun | System Modeling and Simulation | |
| Liuha, Petri | 2004 |
Memory Bandwidth Requirements of Tile-Based Rendering | Iosif Antochi, Ben Juurlink, Stamatis Vassiliadis, Petri Liuha | Architectures and Implementation | |
| Luk, Wayne | 2004 |
Customising Hardware Designs for Elliptic Curve Cryptography | Nicolas Telle, Wayne Luk, Ray C. C. Cheung | Reconfigurable Computing | |
| Mamidi, Suman | 2004 |
A Low-Power Multithreaded Processor for Baseband Communication Systems | Michael Schulte, John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis | Architectures and Implementation | |
| Mattos, Júlio C. B. | 2004 |
Design Space Exploration with Automatic Selection of SW and HW for Embedded Applications | Júlio C. B. Mattos, Antonio Carlos S. Beck, Luigi Carro, Flávio R. Wagner | Architectures and Implementation | |
| Matúš, Emil | 2004 |
Synchronous Transfer Architecture (STA) | Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matúš, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Matúš, Emil | 2004 |
Generated DSP Cores for Implementation of an OFDM Communication System | Hendrik Seidel, Emil Matúš, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| McAllister, John | 2004 |
Embedded Context Aware Hardware Component Generation for Dataflow System Exploration | John McAllister, Roger Woods, Richard Walke | Reconfigurable Computing | |
| Meyr, Heinrich | 2004 |
Early ISS Integration into Network-on-Chip Designs | Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | System Modeling and Simulation | |
| Meyr, Heinrich | 2004 |
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting | Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun | System Modeling and Simulation | |
| Moscu Panainte, Elena | 2004 |
Dynamic Hardware Reconfigurations: Performance Impact for MPEG2 | Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis | Reconfigurable Computing | |
| Moudgill, Mayan | 2004 |
A Low-Power Multithreaded Processor for Baseband Communication Systems | Michael Schulte, John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis | Architectures and Implementation | |
| Nicolae, Lauren?iu | 2004 |
Constraints Derivation and Propagation for Large-Scale Embedded Systems Exploration | Lauren?iu Nicolae, Ed F. Deprettere | System Modeling and Simulation | |
| Nyamsi, Madeleine | 2004 |
Architecture Exploration for 3G Telephony Applications Using a Hardware–Software Prototyping Platform | François Charot, Madeleine Nyamsi, Patrice Quinton, Charles Wagner | Reconfigurable Computing | |
| Orsila, Heikki | 2004 |
A Communication-Centric Design Flow for HIBI-Based SoCs | Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen | System Modeling and Simulation | |
| Pimentel, Andy D. | 2004 |
A High-Level Programming Paradigm for SystemC | Mark Thompson, Andy D. Pimentel | System Modeling and Simulation | |
| Pottier, Bernard | 2004 |
Compiler and System Techniques for soc Distributed Reconfigurable Accelerators | Joël Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani | Reconfigurable Computing | |
| Punkka, Konsta | 2004 |
Scalable FFT Processors and Pipelined Butterfly Units | Jarmo Takala, Konsta Punkka | Architectures and Implementation | |
| Quinton, Patrice | 2004 |
Architecture Exploration for 3G Telephony Applications Using a Hardware–Software Prototyping Platform | François Charot, Madeleine Nyamsi, Patrice Quinton, Charles Wagner | Reconfigurable Computing | |
| Riihimäki, Jouni | 2004 |
HIBI v.2 Communication Network for System-on-Chip | Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementation | |
| Riihimäki, Jouni | 2004 |
A Communication-Centric Design Flow for HIBI-Based SoCs | Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen | System Modeling and Simulation | |
| Risset, Tanguy | 2004 |
Cycle Accurate Simulation Model Generation for SoC Prototyping | Antoine Fraboulet, Tanguy Risset, Antoine Scherrer | System Modeling and Simulation | |
| Robelly, Pablo | 2004 |
Synchronous Transfer Architecture (STA) | Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matúš, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Robelly, Pablo | 2004 |
Generated DSP Cores for Implementation of an OFDM Communication System | Hendrik Seidel, Emil Matúš, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Salamí, Esther | 2004 |
Initial Evaluation of Multimedia Extensions on VLIW Architectures | Esther Salamí, Mateo Valero | Architectures and Implementation | |
| Salminen, Erno | 2004 |
HIBI v.2 Communication Network for System-on-Chip | Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementation | |
| Salminen, Erno | 2004 |
A Communication-Centric Design Flow for HIBI-Based SoCs | Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen | System Modeling and Simulation | |
| Schelkens, Peter | 2004 |
Reconfigurable Hardware for a Scalable Wavelet Video Decoder and Its Performance Requirements | Dirk Stroobandt, Hendrik Eeckhaut, Harald Devos, Mark Christiaens, Fabio Verdicchio, Peter Schelkens | Reconfigurable Computing | |
| Scherrer, Antoine | 2004 |
Cycle Accurate Simulation Model Generation for SoC Prototyping | Antoine Fraboulet, Tanguy Risset, Antoine Scherrer | System Modeling and Simulation | |
| Schulte, Michael | 2004 |
A Low-Power Multithreaded Processor for Baseband Communication Systems | Michael Schulte, John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis | Architectures and Implementation | |
| Seidel, Hendrik | 2004 |
Synchronous Transfer Architecture (STA) | Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matúš, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Seidel, Hendrik | 2004 |
Generated DSP Cores for Implementation of an OFDM Communication System | Hendrik Seidel, Emil Matúš, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard Fettweis | Architectures and Implementation | |
| Sentieys, Olivier | 2004 |
Compiler and System Techniques for soc Distributed Reconfigurable Accelerators | Joël Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani | Reconfigurable Computing | |
| Shahparnia, Shahrooz | 2004 |
DIF: An Interchange Format for Dataflow-Based Design Tools | Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz Shahparnia, Shuvra S. Bhattacharyya | System Modeling and Simulation | |
| Sheng, Weihua | 2004 |
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting | Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun | System Modeling and Simulation | |
| Soudris, Dimitrios | 2004 |
A Novel Data-Path for Accelerating DSP Kernels | Michalis D. Galanis, G. Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis | Architectures and Implementation | |
| Soudris, Dimitrios | 2004 |
Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications | Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis | System Modeling and Simulation | |
| Stroobandt, Dirk | 2004 |
Reconfigurable Hardware for a Scalable Wavelet Video Decoder and Its Performance Requirements | Dirk Stroobandt, Hendrik Eeckhaut, Harald Devos, Mark Christiaens, Fabio Verdicchio, Peter Schelkens | Reconfigurable Computing | |
| Takala, Jarmo | 2004 |
Scalable FFT Processors and Pipelined Butterfly Units | Jarmo Takala, Konsta Punkka | Architectures and Implementation | |
| Teich, Jürgen | 2004 |
Analysis of Dataflow Programs with Interval-Limited Data-Rates | Jürgen Teich, Shuvra S. Bhattacharyya | System Modeling and Simulation | |
| Teich, Jürgen | 2004 |
High-Speed Event-Driven RTL Compiled Simulation | Alexey Kupriyanov, Frank Hannig, Jürgen Teich | System Modeling and Simulation | |
| Telle, Nicolas | 2004 |
Customising Hardware Designs for Elliptic Curve Cryptography | Nicolas Telle, Wayne Luk, Ray C. C. Cheung | Reconfigurable Computing | |
| Thanailakis, Antonios | 2004 |
Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications | Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis | System Modeling and Simulation | |
| Theodoridis, G. | 2004 |
A Novel Data-Path for Accelerating DSP Kernels | Michalis D. Galanis, G. Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis | Architectures and Implementation | |
| Thompson, Mark | 2004 |
A High-Level Programming Paradigm for SystemC | Mark Thompson, Andy D. Pimentel | System Modeling and Simulation | |
| Tragoudas, Spyros | 2004 |
A Novel Data-Path for Accelerating DSP Kernels | Michalis D. Galanis, G. Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis | Architectures and Implementation | |
| Turjan, Alexandru | 2004 |
Communication Optimization in Compaan Process Networks | Ioan Cimpian, Alexandru Turjan, Ed F. Deprettere, Erwin de Kock | System Modeling and Simulation | |
| Valero, Mateo | 2004 |
Initial Evaluation of Multimedia Extensions on VLIW Architectures | Esther Salamí, Mateo Valero | Architectures and Implementation | |
| Vassiliadis, Stamatis | 2004 |
The Virtex II Pro MOLEN Processor | Georgi Kuzmanov, Georgi N. Gaydadjiev, Stamatis Vassiliadis | Reconfigurable Computing | |
| Vassiliadis, Stamatis | 2004 |
Dynamic Hardware Reconfigurations: Performance Impact for MPEG2 | Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis | Reconfigurable Computing | |
| Vassiliadis, Stamatis | 2004 |
Memory Bandwidth Requirements of Tile-Based Rendering | Iosif Antochi, Ben Juurlink, Stamatis Vassiliadis, Petri Liuha | Architectures and Implementation | |
| Vassiliadis, Stamatis | 2004 |
A Low-Power Multithreaded Processor for Baseband Communication Systems | Michael Schulte, John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis | Architectures and Implementation | |
| Verdicchio, Fabio | 2004 |
Reconfigurable Hardware for a Scalable Wavelet Video Decoder and Its Performance Requirements | Dirk Stroobandt, Hendrik Eeckhaut, Harald Devos, Mark Christiaens, Fabio Verdicchio, Peter Schelkens | Reconfigurable Computing | |
| Vissers, Kees | 2004 |
Programming Extremely Flexible Platforms -- Keynote Speech | Kees Vissers | SAMOS IV - Keynote | 2004-WS-01 |
| von Sydow, Thorsten | 2004 |
Performance Analysis of SoC Communication by Application of Deterministic and Stochastic Petri Nets | Holger Blume, Thorsten von Sydow, Tobias G. G. Noll | System Modeling and Simulation | |
| Wagner, Charles | 2004 |
Architecture Exploration for 3G Telephony Applications Using a Hardware–Software Prototyping Platform | François Charot, Madeleine Nyamsi, Patrice Quinton, Charles Wagner | Reconfigurable Computing | |
| Wagner, Flávio R. | 2004 |
Design Space Exploration with Automatic Selection of SW and HW for Embedded Applications | Júlio C. B. Mattos, Antonio Carlos S. Beck, Luigi Carro, Flávio R. Wagner | Architectures and Implementation | |
| Walke, Richard | 2004 |
Embedded Context Aware Hardware Component Generation for Dataflow System Exploration | John McAllister, Roger Woods, Richard Walke | Reconfigurable Computing | |
| Weber, Bernt | 2004 |
Compiler and System Techniques for soc Distributed Reconfigurable Accelerators | Joël Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani | Reconfigurable Computing | |
| Wieferink, Andreas | 2004 |
Early ISS Integration into Network-on-Chip Designs | Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | System Modeling and Simulation | |
| Woods, Roger | 2004 |
Embedded Context Aware Hardware Component Generation for Dataflow System Exploration | John McAllister, Roger Woods, Richard Walke | Reconfigurable Computing | |
| Yazdani, Samar | 2004 |
Compiler and System Techniques for soc Distributed Reconfigurable Accelerators | Joël Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani | Reconfigurable Computing | |
| Abdelli, N. | 2005 |
DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context | P. Bomel, N. Abdelli, E. Martin, A.-M. Fouilliart, E. Boutillon, P. Kajfasz | System Level Design, Modeling and Simulation | |
| Becker, Daniel | 2005 |
Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets | Holger Blume, Thorsten von Sydow, Daniel Becker, Tobias G. Noll | System Level Design, Modeling and Simulation | |
| Beemster, Marcel | 2005 |
Generating Stream Based Code from Plain C | Marcel Beemster, Hans van Someren, Liam Fitzpatrick, Ruben van Royen | Processor Architectures, Design and Simulation | |
| Bertels, Koen | 2005 |
Interprocedural Optimization for Dynamic Hardware Configurations | Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis | Reconfigurable System Design and Implementations | |
| Blume, Holger | 2005 |
Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets | Holger Blume, Thorsten von Sydow, Daniel Becker, Tobias G. Noll | System Level Design, Modeling and Simulation | |
| Bomel, P. | 2005 |
DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context | P. Bomel, N. Abdelli, E. Martin, A.-M. Fouilliart, E. Boutillon, P. Kajfasz | System Level Design, Modeling and Simulation | |
| Bos, Herbert | 2005 |
FPL-3E: Towards Language Support for Reconfigurable Packet Processing | Mihai Lucian Cristea, Claudiu Zissulescu, Ed F. Deprettere, Herbert Bos | Reconfigurable System Design and Implementations | |
| Bossuet, Lilian | 2005 |
Configurable Computing for High-Security/High-Performance Ambient Systems | Guy Gogniat, Wayne Burleson, Lilian Bossuet | Reconfigurable System Design and Implementations | |
| Boutillon, E. | 2005 |
DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context | P. Bomel, N. Abdelli, E. Martin, A.-M. Fouilliart, E. Boutillon, P. Kajfasz | System Level Design, Modeling and Simulation | |
| Burleson, Wayne | 2005 |
Configurable Computing for High-Security/High-Performance Ambient Systems | Guy Gogniat, Wayne Burleson, Lilian Bossuet | Reconfigurable System Design and Implementations | |
| Calderón, Humberto | 2005 |
Reconfigurable Multiple Operation Array | Humberto Calderón, Stamatis Vassiliadis | Reconfigurable System Design and Implementations | |
| Cardoso, João M. P. | 2005 |
Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping | Ricardo Ferreira, João M. P. Cardoso, Andre Toledo, Horácio C. Neto | Reconfigurable System Design and Implementations | |
| Carlomagno Filho, José O. | 2005 |
Automatic ADL-Based Assembler Generation for ASIP Programming Support | Leonardo Taglietti, José O. Carlomagno Filho, Daniel C. Casarotto, Olinto J. V. Furtado, Luiz C. V. dos Santos | Processor Architectures, Design and Simulation | |
| Casarotto, Daniel C. | 2005 |
Automatic ADL-Based Assembler Generation for ASIP Programming Support | Leonardo Taglietti, José O. Carlomagno Filho, Daniel C. Casarotto, Olinto J. V. Furtado, Luiz C. V. dos Santos | Processor Architectures, Design and Simulation | |
| Catthoor, Francky | 2005 |
Moving Up to the Modeling Level for the Transformation of Data Structures in Embedded Multimedia Applications | Marijn Temmerman, Edgar G. Daylight, Francky Catthoor, Serge Demeyer, Tom Dhaene | System Level Design, Modeling and Simulation | |
| Chang, Hoseok | 2005 |
Compressed Swapping for NAND Flash Memory Based Embedded Systems | Sangduck Park, Hyunjin Lim, Hoseok Chang, Wonyong Sung | Architectures and Implementations | |
| Cho, Yookun | 2005 |
Fast Real-Time Job Selection with Resource Constraints Under Earliest Deadline First | Sangchul Han, Moonju Park, Yookun Cho | Processor Architectures, Design and Simulation | |
| Chung, Sung Woo | 2005 |
First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption | Cheol Hong Kim, Sunghoon Shim, Jong Wook Kwak, Sung Woo Chung, Chu Shik Jhon | Processor Architectures, Design and Simulation | |
| Cilio, Andrea | 2005 |
Hardware Cost Estimation for Application-Specific Processor Design | Teemu Pitkänen, Tommi Rantanen, Andrea Cilio, Jarmo Takala | Processor Architectures, Design and Simulation | |
| Cristea, Mihai Lucian | 2005 |
FPL-3E: Towards Language Support for Reconfigurable Packet Processing | Mihai Lucian Cristea, Claudiu Zissulescu, Ed F. Deprettere, Herbert Bos | Reconfigurable System Design and Implementations | |
| Daylight, Edgar G. | 2005 |
Moving Up to the Modeling Level for the Transformation of Data Structures in Embedded Multimedia Applications | Marijn Temmerman, Edgar G. Daylight, Francky Catthoor, Serge Demeyer, Tom Dhaene | System Level Design, Modeling and Simulation | |
| De Bosschere, Koen | 2005 |
Offline Phase Analysis and Optimization for Multi-configuration Processors | Frederik Vandeputte, Lieven Eeckhout, Koen De Bosschere | Processor Architectures, Design and Simulation | |
| Demeyer, Serge | 2005 |
Moving Up to the Modeling Level for the Transformation of Data Structures in Embedded Multimedia Applications | Marijn Temmerman, Edgar G. Daylight, Francky Catthoor, Serge Demeyer, Tom Dhaene | System Level Design, Modeling and Simulation | |
| Deprettere, Ed F. | 2005 |
FPL-3E: Towards Language Support for Reconfigurable Packet Processing | Mihai Lucian Cristea, Claudiu Zissulescu, Ed F. Deprettere, Herbert Bos | Reconfigurable System Design and Implementations | |
| Dhaene, Tom | 2005 |
Moving Up to the Modeling Level for the Transformation of Data Structures in Embedded Multimedia Applications | Marijn Temmerman, Edgar G. Daylight, Francky Catthoor, Serge Demeyer, Tom Dhaene | System Level Design, Modeling and Simulation | |
| Dorward, Sean | 2005 |
Sandbridge Software Tools | John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael Schulte, Stamatis Vassiliadis | Processor Architectures, Design and Simulation | |
| dos Santos, Luiz C. V. | 2005 |
Automatic ADL-Based Assembler Generation for ASIP Programming Support | Leonardo Taglietti, José O. Carlomagno Filho, Daniel C. Casarotto, Olinto J. V. Furtado, Luiz C. V. dos Santos | Processor Architectures, Design and Simulation | |
| Dutta, Hritam | 2005 |
Automatic FIR Filter Generation for FPGAs | Holger Ruckdeschel, Hritam Dutta, Frank Hannig, Jürgen Teich | Reconfigurable System Design and Implementations | |
| Eeckhout, Lieven | 2005 |
Offline Phase Analysis and Optimization for Multi-configuration Processors | Frederik Vandeputte, Lieven Eeckhout, Koen De Bosschere | Processor Architectures, Design and Simulation | |
| Eilers, Stefan | 2005 |
Mixed Virtual/Real Prototypes for Incremental System Design – A Proof of Concept | Stefan Eilers, C. Müller-Schloer | System Level Design, Modeling and Simulation | |
| Evripidou, Paraskevas | 2005 |
DDM-CMP: Data-Driven Multithreading on a Chip Multiprocessor | Kyriakos Stavrou, Paraskevas Evripidou, Pedro Trancoso | Architectures and Implementations | |
| Farfeleder, Stefan | 2005 |
Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures | Stefan Farfeleder, Andreas Krall, Nigel Horspool | Processor Architectures, Design and Simulation | |
| Ferreira, Ricardo | 2005 |
Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping | Ricardo Ferreira, João M. P. Cardoso, Andre Toledo, Horácio C. Neto | Reconfigurable System Design and Implementations | |
| Fettweis, Gerhard | 2005 |
Two-Dimensional Fast Cosine Transform for Vector-STA Architectures | J. P. Robelly, A. Lehmann, Gerhard Fettweis | Reconfigurable System Design and Implementations | |
| Fischaber, Scott | 2005 |
Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms | John McAllister, Roger Woods, D. Reilly, Scott Fischaber, R. Hasson | System Level Design, Modeling and Simulation | |
| Fitzpatrick, Liam | 2005 |
Generating Stream Based Code from Plain C | Marcel Beemster, Hans van Someren, Liam Fitzpatrick, Ruben van Royen | Processor Architectures, Design and Simulation | |
| Fong, Anthony S. | 2005 |
A Novel JAVA Processor for Embedded Devices | Yiyu Tan, Chihang Yau, Kaiman Lo, Paklun Mok, Anthony S. Fong | Processor Architectures, Design and Simulation | |
| Fouilliart, A.-M. | 2005 |
DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context | P. Bomel, N. Abdelli, E. Martin, A.-M. Fouilliart, E. Boutillon, P. Kajfasz | System Level Design, Modeling and Simulation | |
| Furtado, Olinto J. V. | 2005 |
Automatic ADL-Based Assembler Generation for ASIP Programming Support | Leonardo Taglietti, José O. Carlomagno Filho, Daniel C. Casarotto, Olinto J. V. Furtado, Luiz C. V. dos Santos | Processor Architectures, Design and Simulation | |
| Gao, Fei | 2005 |
Exploiting Intra-function Correlation with the Global History Stack | Fei Gao, Suleyman Sair | Processor Architectures, Design and Simulation | |
| Gaydadjiev, Georgi N. | 2005 |
Flux Caches: What Are They and Are They Useful? | Georgi N. Gaydadjiev, Stamatis Vassiliadis | Processor Architectures, Design and Simulation | |
| Glesner, M. | 2005 |
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques | M. Glesner, H. Hinkelmann, T. Hollstein, L. S. Indrusiak, T. Murgan, A.M. Obeid, M. Petrov, T. Pionteck, P. Zipf | Reconfigurable System Design and Implementations | |
| Glossner, John | 2005 |
CORDIC-Augmented Sandbridge Processor for Channel Equalization | Mihai Sima, John Glossner, Daniel Iancu, Hua Ye, Andrei Iancu, A. Joseph Hoane | Processor Architectures, Design and Simulation | |
| Glossner, John | 2005 |
Sandbridge Software Tools | John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael Schulte, Stamatis Vassiliadis | Processor Architectures, Design and Simulation | |
| Gogniat, Guy | 2005 |
Configurable Computing for High-Security/High-Performance Ambient Systems | Guy Gogniat, Wayne Burleson, Lilian Bossuet | Reconfigurable System Design and Implementations | |
| Goksu, Huseyin | 2005 |
Application of Very Fast Simulated Reannealing (VFSR) to Low Power Design | Ali Manzak, Huseyin Goksu | Architectures and Implementations | |
| Goudarzi, Maziar | 2005 |
The ODYSSEY Tool-Set for System-Level Synthesis of Object-Oriented Models | Maziar Goudarzi, Shaahin Hessabi | System Level Design, Modeling and Simulation | |
| Gries, Matthias | 2005 |
SystemQ: A Queuing-Based Approach to Architecture Performance Evaluation with SystemC | Sören Sonntag, Matthias Gries, Christian Sauer | System Level Design, Modeling and Simulation | |
| Guevorkian, David | 2005 |
A Radix-8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms | David Guevorkian, Petri Liuha, Aki Launiainen, Konsta Punkka, Ville Lappalainen | Architectures and Implementations | |
| Hämäläinen, Timo D. | 2005 |
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context | Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementations | |
| Hämäläinen, Timo D. | 2005 |
High Abstraction Level Design and Implementation Framework for Wireless Sensor Networks | Mauri Kuorilehto, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | System Level Design, Modeling and Simulation | |
| Hämäläinen, Timo D. | 2005 |
Design and Implementation of a WLAN Terminal Using UML 2.0 Based Design Flow | Petri Kukkala, Marko Hännikäinen, Timo D. Hämäläinen | System Level Design, Modeling and Simulation | |
| Han, Sangchul | 2005 |
Fast Real-Time Job Selection with Resource Constraints Under Earliest Deadline First | Sangchul Han, Moonju Park, Yookun Cho | Processor Architectures, Design and Simulation | |
| Hannig, Frank | 2005 |
Automatic FIR Filter Generation for FPGAs | Holger Ruckdeschel, Hritam Dutta, Frank Hannig, Jürgen Teich | Reconfigurable System Design and Implementations | |
| Hännikäinen, Marko | 2005 |
High Abstraction Level Design and Implementation Framework for Wireless Sensor Networks | Mauri Kuorilehto, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | System Level Design, Modeling and Simulation | |
| Hännikäinen, Marko | 2005 |
Design and Implementation of a WLAN Terminal Using UML 2.0 Based Design Flow | Petri Kukkala, Marko Hännikäinen, Timo D. Hämäläinen | System Level Design, Modeling and Simulation | |
| Hasson, R. | 2005 |
Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms | John McAllister, Roger Woods, D. Reilly, Scott Fischaber, R. Hasson | System Level Design, Modeling and Simulation | |
| He, Lei | 2005 |
Micro-architecture Performance Estimation by Formula | Lucanus J. Simonson, Lei He | Processor Architectures, Design and Simulation | |
| Hessabi, Shaahin | 2005 |
The ODYSSEY Tool-Set for System-Level Synthesis of Object-Oriented Models | Maziar Goudarzi, Shaahin Hessabi | System Level Design, Modeling and Simulation | |
| Hinkelmann, H. | 2005 |
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques | M. Glesner, H. Hinkelmann, T. Hollstein, L. S. Indrusiak, T. Murgan, A.M. Obeid, M. Petrov, T. Pionteck, P. Zipf | Reconfigurable System Design and Implementations | |
| Hoane, A. Joseph | 2005 |
CORDIC-Augmented Sandbridge Processor for Channel Equalization | Mihai Sima, John Glossner, Daniel Iancu, Hua Ye, Andrei Iancu, A. Joseph Hoane | Processor Architectures, Design and Simulation | |
| Hokenek, Erdem | 2005 |
Sandbridge Software Tools | John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael Schulte, Stamatis Vassiliadis | Processor Architectures, Design and Simulation | |
| Hollstein, T. | 2005 |
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques | M. Glesner, H. Hinkelmann, T. Hollstein, L. S. Indrusiak, T. Murgan, A.M. Obeid, M. Petrov, T. Pionteck, P. Zipf | Reconfigurable System Design and Implementations | |
| Hong, Xianlong | 2005 |
A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design | Yu Hu, Tong Jing, Xianlong Hong, Xiaodong Hu, Guiying Yan | Architectures and Implementations | |
| Horspool, Nigel | 2005 |
Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures | Stefan Farfeleder, Andreas Krall, Nigel Horspool | Processor Architectures, Design and Simulation | |
| Hu, Xiaodong | 2005 |
A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design | Yu Hu, Tong Jing, Xianlong Hong, Xiaodong Hu, Guiying Yan | Architectures and Implementations | |
| Hu, Yu | 2005 |
A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design | Yu Hu, Tong Jing, Xianlong Hong, Xiaodong Hu, Guiying Yan | Architectures and Implementations | |
| Iancu, Andrei | 2005 |
CORDIC-Augmented Sandbridge Processor for Channel Equalization | Mihai Sima, John Glossner, Daniel Iancu, Hua Ye, Andrei Iancu, A. Joseph Hoane | Processor Architectures, Design and Simulation | |
| Iancu, Daniel | 2005 |
CORDIC-Augmented Sandbridge Processor for Channel Equalization | Mihai Sima, John Glossner, Daniel Iancu, Hua Ye, Andrei Iancu, A. Joseph Hoane | Processor Architectures, Design and Simulation | |
| Iannucci, Bob | 2005 |
Platform Thinking in Embedded Systems | Bob Iannucci | SAMOS V - Keynote | 2005-WS-01 |
| Indrusiak, L. S. | 2005 |
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques | M. Glesner, H. Hinkelmann, T. Hollstein, L. S. Indrusiak, T. Murgan, A.M. Obeid, M. Petrov, T. Pionteck, P. Zipf | Reconfigurable System Design and Implementations | |
| Isoaho, Jouni | 2005 |
Tuning a Protocol Processor Architecture Towards DSP Operations | Jani Paakkulainen, Seppo Virtanen, Jouni Isoaho | Processor Architectures, Design and Simulation | |
| Jhang, Sung Tae | 2005 |
Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic | Sunghoon Shim, Jong Wook Kwak, Cheol Hong Kim, Sung Tae Jhang, Chu Shik Jhon | Processor Architectures, Design and Simulation | |
| Jhon, Chu Shik | 2005 |
First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption | Cheol Hong Kim, Sunghoon Shim, Jong Wook Kwak, Sung Woo Chung, Chu Shik Jhon | Processor Architectures, Design and Simulation | |
| Jhon, Chu Shik | 2005 |
Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic | Sunghoon Shim, Jong Wook Kwak, Cheol Hong Kim, Sung Tae Jhang, Chu Shik Jhon | Processor Architectures, Design and Simulation | |
| Jing, Tong | 2005 |
A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design | Yu Hu, Tong Jing, Xianlong Hong, Xiaodong Hu, Guiying Yan | Architectures and Implementations | |
| Jinturkar, Sanjay | 2005 |
Sandbridge Software Tools | John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael Schulte, Stamatis Vassiliadis | Processor Architectures, Design and Simulation | |
| Jyrkkä, Kari | 2005 |
Observations on Power-Efficiency Trends in Mobile Communication Devices | Olli Silven, Kari Jyrkkä | Processor Architectures, Design and Simulation | |
| Kajfasz, P. | 2005 |
DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context | P. Bomel, N. Abdelli, E. Martin, A.-M. Fouilliart, E. Boutillon, P. Kajfasz | System Level Design, Modeling and Simulation | |
| Kangas, Tero | 2005 |
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context | Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementations | |
| Kim, Cheol Hong | 2005 |
First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption | Cheol Hong Kim, Sunghoon Shim, Jong Wook Kwak, Sung Woo Chung, Chu Shik Jhon | Processor Architectures, Design and Simulation | |
| Kim, Cheol Hong | 2005 |
Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic | Sunghoon Shim, Jong Wook Kwak, Cheol Hong Kim, Sung Tae Jhang, Chu Shik Jhon | Processor Architectures, Design and Simulation | |
| Kim, JunSeong | 2005 |
Real-Time Stereo Vision on a Reconfigurable System | SungHwan Lee, Jongsu Yi, JunSeong Kim | Architectures and Implementations | |
| Kim, Sunil | 2005 |
Pattern Matching Acceleration for Network Intrusion Detection Systems | Sunil Kim | Architectures and Implementations | |
| Kohvakka, Mikko | 2005 |
High Abstraction Level Design and Implementation Framework for Wireless Sensor Networks | Mauri Kuorilehto, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | System Level Design, Modeling and Simulation | |
| Krall, Andreas | 2005 |
Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures | Stefan Farfeleder, Andreas Krall, Nigel Horspool | Processor Architectures, Design and Simulation | |
| Kukkala, Petri | 2005 |
Design and Implementation of a WLAN Terminal Using UML 2.0 Based Design Flow | Petri Kukkala, Marko Hännikäinen, Timo D. Hämäläinen | System Level Design, Modeling and Simulation | |
| Kuorilehto, Mauri | 2005 |
High Abstraction Level Design and Implementation Framework for Wireless Sensor Networks | Mauri Kuorilehto, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | System Level Design, Modeling and Simulation | |
| Kurdahi, Fadi J. | 2005 |
A Scalable Embedded JPEG2000 Architecture | Chunhui Zhang, Yun Long, Fadi J. Kurdahi | Architectures and Implementations | |
| Kuusilinna, Kimmo | 2005 |
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context | Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementations | |
| Kwak, Jong Wook | 2005 |
First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption | Cheol Hong Kim, Sunghoon Shim, Jong Wook Kwak, Sung Woo Chung, Chu Shik Jhon | Processor Architectures, Design and Simulation | |
| Kwak, Jong Wook | 2005 |
Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic | Sunghoon Shim, Jong Wook Kwak, Cheol Hong Kim, Sung Tae Jhang, Chu Shik Jhon | Processor Architectures, Design and Simulation | |
| Lahtinen, Vesa | 2005 |
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context | Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementations | |
| Langerwerf, Javier Martín | 2005 |
RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration | Guillermo Payá Vayá, Javier Martín Langerwerf, Peter Pirsch | Reconfigurable System Design and Implementations | |
| Lappalainen, Ville | 2005 |
A Radix-8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms | David Guevorkian, Petri Liuha, Aki Launiainen, Konsta Punkka, Ville Lappalainen | Architectures and Implementations | |
| Launiainen, Aki | 2005 |
A Radix-8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms | David Guevorkian, Petri Liuha, Aki Launiainen, Konsta Punkka, Ville Lappalainen | Architectures and Implementations | |
| Lee, SungHwan | 2005 |
Real-Time Stereo Vision on a Reconfigurable System | SungHwan Lee, Jongsu Yi, JunSeong Kim | Architectures and Implementations | |
| Lehmann, A. | 2005 |
Two-Dimensional Fast Cosine Transform for Vector-STA Architectures | J. P. Robelly, A. Lehmann, Gerhard Fettweis | Reconfigurable System Design and Implementations | |
| Li, Zeng-Zhi | 2005 |
A Programming Model for an Embedded Media Processing Architecture | Dan Zhang, Zeng-Zhi Li, Hong Song, Long Liu | Processor Architectures, Design and Simulation | |
| Lim, Hyunjin | 2005 |
Compressed Swapping for NAND Flash Memory Based Embedded Systems | Sangduck Park, Hyunjin Lim, Hoseok Chang, Wonyong Sung | Architectures and Implementations | |
| Liu, Long | 2005 |
A Programming Model for an Embedded Media Processing Architecture | Dan Zhang, Zeng-Zhi Li, Hong Song, Long Liu | Processor Architectures, Design and Simulation | |
| Liuha, Petri | 2005 |
A Radix-8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms | David Guevorkian, Petri Liuha, Aki Launiainen, Konsta Punkka, Ville Lappalainen | Architectures and Implementations | |
| Lo, Kaiman | 2005 |
A Novel JAVA Processor for Embedded Devices | Yiyu Tan, Chihang Yau, Kaiman Lo, Paklun Mok, Anthony S. Fong | Processor Architectures, Design and Simulation | |
| Long, Yun | 2005 |
A Scalable Embedded JPEG2000 Architecture | Chunhui Zhang, Yun Long, Fadi J. Kurdahi | Architectures and Implementations | |
| Manzak, Ali | 2005 |
Application of Very Fast Simulated Reannealing (VFSR) to Low Power Design | Ali Manzak, Huseyin Goksu | Architectures and Implementations | |
| Marchand, Philippe | 2005 |
A Hardware Accelerator for Controlling Access to Multiple-Unit Resources in Safety/Time-Critical Systems | Philippe Marchand, Purnendu Sinha | Architectures and Implementations | |
| Martin, E. | 2005 |
DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context | P. Bomel, N. Abdelli, E. Martin, A.-M. Fouilliart, E. Boutillon, P. Kajfasz | System Level Design, Modeling and Simulation | |
| McAllister, John | 2005 |
Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms | John McAllister, Roger Woods, D. Reilly, Scott Fischaber, R. Hasson | System Level Design, Modeling and Simulation | |
| Mok, Paklun | 2005 |
A Novel JAVA Processor for Embedded Devices | Yiyu Tan, Chihang Yau, Kaiman Lo, Paklun Mok, Anthony S. Fong | Processor Architectures, Design and Simulation | |
| Moscu Panainte, Elena | 2005 |
Interprocedural Optimization for Dynamic Hardware Configurations | Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis | Reconfigurable System Design and Implementations | |
| Moudgill, Mayan | 2005 |
Sandbridge Software Tools | John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael Schulte, Stamatis Vassiliadis | Processor Architectures, Design and Simulation | |
| Müller-Schloer, C. | 2005 |
Mixed Virtual/Real Prototypes for Incremental System Design – A Proof of Concept | Stefan Eilers, C. Müller-Schloer | System Level Design, Modeling and Simulation | |
| Murgan, T. | 2005 |
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques | M. Glesner, H. Hinkelmann, T. Hollstein, L. S. Indrusiak, T. Murgan, A.M. Obeid, M. Petrov, T. Pionteck, P. Zipf | Reconfigurable System Design and Implementations | |
| Najjar, Walid A. | 2005 |
Power Efficient Instruction Caches for Embedded Systems | Dinesh C. Suresh, Walid A. Najjar, Jun Yang | Processor Architectures, Design and Simulation | |
| Neto, Horácio C. | 2005 |
Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping | Ricardo Ferreira, João M. P. Cardoso, Andre Toledo, Horácio C. Neto | Reconfigurable System Design and Implementations | |
| Noll, Tobias G. | 2005 |
Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets | Holger Blume, Thorsten von Sydow, Daniel Becker, Tobias G. Noll | System Level Design, Modeling and Simulation | |
| Obeid, A.M. | 2005 |
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques | M. Glesner, H. Hinkelmann, T. Hollstein, L. S. Indrusiak, T. Murgan, A.M. Obeid, M. Petrov, T. Pionteck, P. Zipf | Reconfigurable System Design and Implementations | |
| Paakkulainen, Jani | 2005 |
Tuning a Protocol Processor Architecture Towards DSP Operations | Jani Paakkulainen, Seppo Virtanen, Jouni Isoaho | Processor Architectures, Design and Simulation | |
| Park, Moonju | 2005 |
Fast Real-Time Job Selection with Resource Constraints Under Earliest Deadline First | Sangchul Han, Moonju Park, Yookun Cho | Processor Architectures, Design and Simulation | |
| Park, Sangduck | 2005 |
Compressed Swapping for NAND Flash Memory Based Embedded Systems | Sangduck Park, Hyunjin Lim, Hoseok Chang, Wonyong Sung | Architectures and Implementations | |
| Payá Vayá, Guillermo | 2005 |
RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration | Guillermo Payá Vayá, Javier Martín Langerwerf, Peter Pirsch | Reconfigurable System Design and Implementations | |
| Petrov, M. | 2005 |
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques | M. Glesner, H. Hinkelmann, T. Hollstein, L. S. Indrusiak, T. Murgan, A.M. Obeid, M. Petrov, T. Pionteck, P. Zipf | Reconfigurable System Design and Implementations | |
| Pimentel, Andy D. | 2005 |
A Case for Visualization-Integrated System-Level Design Space Exploration | Andy D. Pimentel | System Level Design, Modeling and Simulation | |
| Pionteck, T. | 2005 |
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques | M. Glesner, H. Hinkelmann, T. Hollstein, L. S. Indrusiak, T. Murgan, A.M. Obeid, M. Petrov, T. Pionteck, P. Zipf | Reconfigurable System Design and Implementations | |
| Pirsch, Peter | 2005 |
RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration | Guillermo Payá Vayá, Javier Martín Langerwerf, Peter Pirsch | Reconfigurable System Design and Implementations | |
| Pitkänen, Teemu | 2005 |
Hardware Cost Estimation for Application-Specific Processor Design | Teemu Pitkänen, Tommi Rantanen, Andrea Cilio, Jarmo Takala | Processor Architectures, Design and Simulation | |
| Plosila, Juha | 2005 |
Formal Specification of a Protocol Processor | Tomi Westerlund, Juha Plosila | Processor Architectures, Design and Simulation | |
| Punkka, Konsta | 2005 |
A Radix-8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms | David Guevorkian, Petri Liuha, Aki Launiainen, Konsta Punkka, Ville Lappalainen | Architectures and Implementations | |
| Rantanen, Tommi | 2005 |
Hardware Cost Estimation for Application-Specific Processor Design | Teemu Pitkänen, Tommi Rantanen, Andrea Cilio, Jarmo Takala | Processor Architectures, Design and Simulation | |
| Reilly, D. | 2005 |
Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms | John McAllister, Roger Woods, D. Reilly, Scott Fischaber, R. Hasson | System Level Design, Modeling and Simulation | |
| Riihimäki, Jouni | 2005 |
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context | Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementations | |
| Robelly, J. P. | 2005 |
Two-Dimensional Fast Cosine Transform for Vector-STA Architectures | J. P. Robelly, A. Lehmann, Gerhard Fettweis | Reconfigurable System Design and Implementations | |
| Ruckdeschel, Holger | 2005 |
Automatic FIR Filter Generation for FPGAs | Holger Ruckdeschel, Hritam Dutta, Frank Hannig, Jürgen Teich | Reconfigurable System Design and Implementations | |
| Sair, Suleyman | 2005 |
Exploiting Intra-function Correlation with the Global History Stack | Fei Gao, Suleyman Sair | Processor Architectures, Design and Simulation | |
| Salminen, Erno | 2005 |
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context | Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen | Architectures and Implementations | |
| Sauer, Christian | 2005 |
SystemQ: A Queuing-Based Approach to Architecture Performance Evaluation with SystemC | Sören Sonntag, Matthias Gries, Christian Sauer | System Level Design, Modeling and Simulation | |
| Schulte, Michael | 2005 |
Sandbridge Software Tools | John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael Schulte, Stamatis Vassiliadis | Processor Architectures, Design and Simulation | |
| Shim, Sunghoon | 2005 |
First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption | Cheol Hong Kim, Sunghoon Shim, Jong Wook Kwak, Sung Woo Chung, Chu Shik Jhon | Processor Architectures, Design and Simulation | |
| Shim, Sunghoon | 2005 |
Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic | Sunghoon Shim, Jong Wook Kwak, Cheol Hong Kim, Sung Tae Jhang, Chu Shik Jhon | Processor Architectures, Design and Simulation | |
| Silven, Olli | 2005 |
Observations on Power-Efficiency Trends in Mobile Communication Devices | Olli Silven, Kari Jyrkkä | Processor Architectures, Design and Simulation | |
| Sima, Mihai | 2005 |
CORDIC-Augmented Sandbridge Processor for Channel Equalization | Mihai Sima, John Glossner, Daniel Iancu, Hua Ye, Andrei Iancu, A. Joseph Hoane | Processor Architectures, Design and Simulation | |
| Simonson, Lucanus J. | 2005 |
Micro-architecture Performance Estimation by Formula | Lucanus J. Simonson, Lei He | Processor Architectures, Design and Simulation | |
| Sinha, Purnendu | 2005 |
A Hardware Accelerator for Controlling Access to Multiple-Unit Resources in Safety/Time-Critical Systems | Philippe Marchand, Purnendu Sinha | Architectures and Implementations | |
| Song, Hong | 2005 |
A Programming Model for an Embedded Media Processing Architecture | Dan Zhang, Zeng-Zhi Li, Hong Song, Long Liu | Processor Architectures, Design and Simulation | |
| Sonntag, Sören | 2005 |
SystemQ: A Queuing-Based Approach to Architecture Performance Evaluation with SystemC | Sören Sonntag, Matthias Gries, Christian Sauer | System Level Design, Modeling and Simulation | |
| Stavrou, Kyriakos | 2005 |
DDM-CMP: Data-Driven Multithreading on a Chip Multiprocessor | Kyriakos Stavrou, Paraskevas Evripidou, Pedro Trancoso | Architectures and Implementations | |
| Sung, Wonyong | 2005 |
Compressed Swapping for NAND Flash Memory Based Embedded Systems | Sangduck Park, Hyunjin Lim, Hoseok Chang, Wonyong Sung | Architectures and Implementations | |
| Suresh, Dinesh C. | 2005 |
Power Efficient Instruction Caches for Embedded Systems | Dinesh C. Suresh, Walid A. Najjar, Jun Yang | Processor Architectures, Design and Simulation | |
| Taglietti, Leonardo | 2005 |
Automatic ADL-Based Assembler Generation for ASIP Programming Support | Leonardo Taglietti, José O. Carlomagno Filho, Daniel C. Casarotto, Olinto J. V. Furtado, Luiz C. V. dos Santos | Processor Architectures, Design and Simulation | |
| Takala, Jarmo | 2005 |
Hardware Cost Estimation for Application-Specific Processor Design | Teemu Pitkänen, Tommi Rantanen, Andrea Cilio, Jarmo Takala | Processor Architectures, Design and Simulation | |
| Tan, Yiyu | 2005 |
A Novel JAVA Processor for Embedded Devices | Yiyu Tan, Chihang Yau, Kaiman Lo, Paklun Mok, Anthony S. Fong | Processor Architectures, Design and Simulation | |
| Teich, Jürgen | 2005 |
Automatic FIR Filter Generation for FPGAs | Holger Ruckdeschel, Hritam Dutta, Frank Hannig, Jürgen Teich | Reconfigurable System Design and Implementations | |
| Temmerman, Marijn | 2005 |
Moving Up to the Modeling Level for the Transformation of Data Structures in Embedded Multimedia Applications | Marijn Temmerman, Edgar G. Daylight, Francky Catthoor, Serge Demeyer, Tom Dhaene | System Level Design, Modeling and Simulation | |
| Toledo, Andre | 2005 |
Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping | Ricardo Ferreira, João M. P. Cardoso, Andre Toledo, Horácio C. Neto | Reconfigurable System Design and Implementations | |
| Trancoso, Pedro | 2005 |
DDM-CMP: Data-Driven Multithreading on a Chip Multiprocessor | Kyriakos Stavrou, Paraskevas Evripidou, Pedro Trancoso | Architectures and Implementations | |
| van Royen, Ruben | 2005 |
Generating Stream Based Code from Plain C | Marcel Beemster, Hans van Someren, Liam Fitzpatrick, Ruben van Royen | Processor Architectures, Design and Simulation | |
| van Someren, Hans | 2005 |
Generating Stream Based Code from Plain C | Marcel Beemster, Hans van Someren, Liam Fitzpatrick, Ruben van Royen | Processor Architectures, Design and Simulation | |
| Vandeputte, Frederik | 2005 |
Offline Phase Analysis and Optimization for Multi-configuration Processors | Frederik Vandeputte, Lieven Eeckhout, Koen De Bosschere | Processor Architectures, Design and Simulation | |
| Vassiliadis, Stamatis | 2005 |
Interprocedural Optimization for Dynamic Hardware Configurations | Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis | Reconfigurable System Design and Implementations | |
| Vassiliadis, Stamatis | 2005 |
Reconfigurable Multiple Operation Array | Humberto Calderón, Stamatis Vassiliadis | Reconfigurable System Design and Implementations | |
| Vassiliadis, Stamatis | 2005 |
Flux Caches: What Are They and Are They Useful? | Georgi N. Gaydadjiev, Stamatis Vassiliadis | Processor Architectures, Design and Simulation | |
| Vassiliadis, Stamatis | 2005 |
Sandbridge Software Tools | John Glossner, Sean Dorward, Sanjay Jinturkar, Mayan Moudgill, Erdem Hokenek, Michael Schulte, Stamatis Vassiliadis | Processor Architectures, Design and Simulation | |
| Virtanen, Seppo | 2005 |
Tuning a Protocol Processor Architecture Towards DSP Operations | Jani Paakkulainen, Seppo Virtanen, Jouni Isoaho | Processor Architectures, Design and Simulation | |
| von Sydow, Thorsten | 2005 |
Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets | Holger Blume, Thorsten von Sydow, Daniel Becker, Tobias G. Noll | System Level Design, Modeling and Simulation | |
| Westerlund, Tomi | 2005 |
Formal Specification of a Protocol Processor | Tomi Westerlund, Juha Plosila | Processor Architectures, Design and Simulation | |
| Woods, Roger | 2005 |
Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms | John McAllister, Roger Woods, D. Reilly, Scott Fischaber, R. Hasson | System Level Design, Modeling and Simulation | |
| Yan, Guiying | 2005 |
A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design | Yu Hu, Tong Jing, Xianlong Hong, Xiaodong Hu, Guiying Yan | Architectures and Implementations | |
| Yang, Jun | 2005 |
Power Efficient Instruction Caches for Embedded Systems | Dinesh C. Suresh, Walid A. Najjar, Jun Yang | Processor Architectures, Design and Simulation | |
| Yau, Chihang | 2005 |
A Novel JAVA Processor for Embedded Devices | Yiyu Tan, Chihang Yau, Kaiman Lo, Paklun Mok, Anthony S. Fong | Processor Architectures, Design and Simulation | |
| Ye, Hua | 2005 |
CORDIC-Augmented Sandbridge Processor for Channel Equalization | Mihai Sima, John Glossner, Daniel Iancu, Hua Ye, Andrei Iancu, A. Joseph Hoane | Processor Architectures, Design and Simulation | |
| Yi, Jongsu | 2005 |
Real-Time Stereo Vision on a Reconfigurable System | SungHwan Lee, Jongsu Yi, JunSeong Kim | Architectures and Implementations | |
| Zhang, Chunhui | 2005 |
A Scalable Embedded JPEG2000 Architecture | Chunhui Zhang, Yun Long, Fadi J. Kurdahi | Architectures and Implementations | |
| Zhang, Dan | 2005 |
A Programming Model for an Embedded Media Processing Architecture | Dan Zhang, Zeng-Zhi Li, Hong Song, Long Liu | Processor Architectures, Design and Simulation | |
| Zipf, P. | 2005 |
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques | M. Glesner, H. Hinkelmann, T. Hollstein, L. S. Indrusiak, T. Murgan, A.M. Obeid, M. Petrov, T. Pionteck, P. Zipf | Reconfigurable System Design and Implementations | |
| Zissulescu, Claudiu | 2005 |
FPL-3E: Towards Language Support for Reconfigurable Packet Processing | Mihai Lucian Cristea, Claudiu Zissulescu, Ed F. Deprettere, Herbert Bos | Reconfigurable System Design and Implementations | |
| Agarwal, Nainesh | 2006 |
Efficient Automated Clock Gating Using CoDeL | Nainesh Agarwal, Nikitas J. Dimopoulos | System Design and Modeling | |
| Agis, Rodrigo | 2006 |
Real-Time Embedded System for Rear-View Mirror Overtaking Car Monitoring | Javier Díaz, Eduardo Ros, Sonia Mota, Rodrigo Agis | Architectures and Implementations | |
| Alho, Timo | 2006 |
Security in Wireless Sensor Networks: Considerations and Experiments | Panu Hämäläinen, Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensor Networks | |
| Antonopoulos, Alexandros | 2006 |
Preventing Denial-of-Service Attacks in Shared CMP Caches | Georgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras, Alexandros Antonopoulos, Dimitrios Serpanos | Dependable Computing | |
| Arpinen, Tero | 2006 |
Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform | Mikko Setälä, Petri Kukkala, Tero Arpinen, Marko Hännikäinen, Timo D. Hämäläinen | System Design and Modeling | |
| Auguin, Michel | 2006 |
Energy Optimization of a Multi-bank Main Memory | Hanene Ben Fradj, Sébastien Icart, Cécile Belleudy, Michel Auguin | Processor Design | |
| Baniasadi, Amirali | 2006 |
Reducing Execution Unit Leakage Power in Embedded Processors | Houman Homayoun, Amirali Baniasadi | Processor Design | |
| Beck, Antonio Carlos S. | 2006 |
Advantages of Java Processors in Cache Performance and Power for Embedded Applications | Antonio Carlos S. Beck, Mateus B. Rutzig, Luigi Carro | Processor Design | |
| Becker, Daniel | 2006 |
Hybrid Functional and Instruction Level Power Modeling for Embedded Processors | Holger Blume, Daniel Becker, Martin Botteck, Jörg Brakensiek, Tobias G. Noll | Processor Design | |
| Belleudy, Cécile | 2006 |
Energy Optimization of a Multi-bank Main Memory | Hanene Ben Fradj, Sébastien Icart, Cécile Belleudy, Michel Auguin | Processor Design | |
| Benini, Luca | 2006 |
Compilation and Simulation Tool Chain for Memory Aware Energy Optimizations | Manish Verma, Lars Wehmeyer, Robert Pyka, Peter Marwedel, Luca Benini | Processor Design | |
| Berbers, Yolande | 2006 |
Towards a Transformation Chain Modeling Language | Bert Vanhooff, Stefan Van Baelen, Aram Hovsepyan, Wouter Joosen, Yolande Berbers | System Design and Modeling | |
| Berbers, Yolande | 2006 |
Key Research Challenges for Successfully Applying MDD Within Real-Time Embedded Software Development | Aram Hovsepyan, Stefan Van Baelen, Bert Vanhooff, Wouter Joosen, Yolande Berbers | System Design and Modeling | |
| Berekovi?, Mladen | 2006 |
A Scalable, Multi-thread, Multi-issue Array Processor Architecture for DSP Applications Based on Extended Tomasulo Scheme | Mladen Berekovi?, Tim Niggemeier | Processor Design | |
| Bhattacharyya, Shuvra S. | 2006 |
Energy-Driven Partitioning of Signal Processing Algorithms in Sensor Networks | Dong-Ik Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya, Neil Goldsman | Wireless Sensor Networks | |
| Blume, Holger | 2006 |
Hybrid Functional and Instruction Level Power Modeling for Embedded Processors | Holger Blume, Daniel Becker, Martin Botteck, Jörg Brakensiek, Tobias G. Noll | Processor Design | |
| Botteck, Martin | 2006 |
Hybrid Functional and Instruction Level Power Modeling for Embedded Processors | Holger Blume, Daniel Becker, Martin Botteck, Jörg Brakensiek, Tobias G. Noll | Processor Design | |
| Bountas, Dimitrios | 2006 |
CARROT – A Tool for Fast and Accurate Soft Error Rate Estimation | Dimitrios Bountas, Georgios I. Stamoulis | Dependable Computing | |
| Bradac, Zdenek | 2006 |
On Security of PAN Wireless Systems | Ondrej Hyncica, Peter Kacz, Petr Fiedler, Zdenek Bradac, Pavel Kucera, Radimir Vrba | Wireless Sensor Networks | |
| Brakensiek, Jörg | 2006 |
Hybrid Functional and Instruction Level Power Modeling for Embedded Processors | Holger Blume, Daniel Becker, Martin Botteck, Jörg Brakensiek, Tobias G. Noll | Processor Design | |
| Brinkschulte, Uwe | 2006 |
A Scheduling Strategy for a Real-Time Dependable Organic Middleware | Uwe Brinkschulte, Alexander von Renteln, Mathias Pacher | Dependable Computing | |
| Carro, Luigi | 2006 |
Advantages of Java Processors in Cache Performance and Power for Embedded Applications | Antonio Carlos S. Beck, Mateus B. Rutzig, Luigi Carro | Processor Design | |
| Chaves, Ricardo | 2006 |
Rescheduling for Optimized SHA-1 Calculation | Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis | Architectures and Implementations | |
| Cho, Kyoung-Rok | 2006 |
Design of Asynchronous Embedded Processor with New Ternary Data Encoding Scheme | Je-Hoon Lee, Eun-Ju Choi, Kyoung-Rok Cho | Architectures and Implementations | |
| Choi, Eun-Ju | 2006 |
Design of Asynchronous Embedded Processor with New Ternary Data Encoding Scheme | Je-Hoon Lee, Eun-Ju Choi, Kyoung-Rok Cho | Architectures and Implementations | |
| Choi, Jinsung | 2006 |
Reconfigurable Platform for Digital Convergence Terminals | Jinsung Choi | SAMOS VI - Keynote | 2006-WS-01 |
| Chung, Ki-Dong | 2006 |
A Flash File System to Support Fast Mounting for NAND Flash Memory Based Embedded Systems | Song-Hwa Park, Tae-Hoon Lee, Ki-Dong Chung | Architectures and Implementations | |
| Corporaal, Henk | 2006 |
Probabilistic Modelling and Evaluation of Soft Real-Time Embedded Systems | Oana Florescu, Menno de Hoon, Jeroen Voeten, Henk Corporaal | Processor Design | |
| Cotofana, Sorin Dan | 2006 |
High-Radix Addition and Multiplication in the Electron Counting Paradigm Using Single Electron Tunneling Technology | Cor Meenderinck, Sorin Dan Cotofana | Architectures and Implementations | |
| da Cunha, Adriano B. | 2006 |
Designing Wireless Sensor Nodes | Marcos A. M. Vieira, Adriano B. da Cunha, Diógenes C. da Silva | Wireless Sensor Networks | |
| da Cunha, Adriano B. | 2006 |
An Approach for the Reduction of Power Consumption in Sensor Nodes of Wireless Sensor Networks: Case Analysis of Mica2 | Adriano B. da Cunha, Diógenes C. da Silva | Wireless Sensor Networks | |
| da Silva, Diógenes C. | 2006 |
Designing Wireless Sensor Nodes | Marcos A. M. Vieira, Adriano B. da Cunha, Diógenes C. da Silva | Wireless Sensor Networks | |
| da Silva, Diógenes C. | 2006 |
An Approach for the Reduction of Power Consumption in Sensor Nodes of Wireless Sensor Networks: Case Analysis of Mica2 | Adriano B. da Cunha, Diógenes C. da Silva | Wireless Sensor Networks | |
| Dai, Rui | 2006 |
Mining Dynamic Document Spaces with Massively Parallel Embedded Processors | Jan W. M. Jacobs, Rui Dai, Gerard J. M. Smit | System Design and Modeling | |
| de Hoon, Menno | 2006 |
Probabilistic Modelling and Evaluation of Soft Real-Time Embedded Systems | Oana Florescu, Menno de Hoon, Jeroen Voeten, Henk Corporaal | Processor Design | |
| de Langen, Klaas-Jan | 2006 |
Fault-Tolerant Bus System for Airbag Sensors and Actuators | Klaas-Jan de Langen | Embedded Sensor Systems | |
| Díaz, Javier | 2006 |
Real-Time Embedded System for Rear-View Mirror Overtaking Car Monitoring | Javier Díaz, Eduardo Ros, Sonia Mota, Rodrigo Agis | Architectures and Implementations | |
| Dimopoulos, Nikitas J. | 2006 |
Efficient Automated Clock Gating Using CoDeL | Nainesh Agarwal, Nikitas J. Dimopoulos | System Design and Modeling | |
| Dutt, Nikil | 2006 |
Domain-Specific Modeling of Power Aware Distributed Real-Time Embedded Systems | Gabor Madl, Nikil Dutt | System Design and Modeling | |
| Feldhofer, Martin | 2006 |
Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box | Stefan Tillich, Martin Feldhofer, Johann Großschädl | Architectures and Implementations | |
| Fettweis, Gerhard | 2006 |
An Optimization Methodology for Memory Allocation and Task Scheduling in SoCs Via Linear Programming | Bastian Ristau, Gerhard Fettweis | System Design and Modeling | |
| Fiedler, Petr | 2006 |
On Security of PAN Wireless Systems | Ondrej Hyncica, Peter Kacz, Petr Fiedler, Zdenek Bradac, Pavel Kucera, Radimir Vrba | Wireless Sensor Networks | |
| Florescu, Oana | 2006 |
Probabilistic Modelling and Evaluation of Soft Real-Time Embedded Systems | Oana Florescu, Menno de Hoon, Jeroen Voeten, Henk Corporaal | Processor Design | |
| Fradj, Hanene Ben | 2006 |
Energy Optimization of a Multi-bank Main Memory | Hanene Ben Fradj, Sébastien Icart, Cécile Belleudy, Michel Auguin | Processor Design | |
| French, Paddy J. | 2006 |
Integrated Microsystems in Industrial Applications | Paddy J. French | Embedded Sensor Systems | |
| Gaydadjiev, Georgi N. | 2006 |
SAD Prefetching for MPEG4 Using Flux Caches | Georgi N. Gaydadjiev, Stamatis Vassiliadis | Processor Design | |
| Glossner, John | 2006 |
Software Implementation of WiMAX on the Sandbridge SandBlaster Platform | Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala | Architectures and Implementations | |
| Goldsman, Neil | 2006 |
Energy-Driven Partitioning of Signal Processing Algorithms in Sensor Networks | Dong-Ik Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya, Neil Goldsman | Wireless Sensor Networks | |
| Goratti, Leonardo | 2006 |
Preamble Sense Multiple Access (PSMA) for Impulse Radio Ultra Wideband Sensor Networks | Jussi Haapola, Leonardo Goratti, Isameldin Suliman, Alberto Rabbachin | Wireless Sensor Networks | |
| Großschädl, Johann | 2006 |
Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box | Stefan Tillich, Martin Feldhofer, Johann Großschädl | Architectures and Implementations | |
| Haapola, Jussi | 2006 |
Preamble Sense Multiple Access (PSMA) for Impulse Radio Ultra Wideband Sensor Networks | Jussi Haapola, Leonardo Goratti, Isameldin Suliman, Alberto Rabbachin | Wireless Sensor Networks | |
| Hagedoorn, Arend | 2006 |
A Solid-State 2-D Wind Sensor | K. A. A. Makinwa, Johan H. Huijsing, Arend Hagedoorn | Embedded Sensor Systems | |
| Hama, Kotaro | 2006 |
Autonomous Construction Technology of Community for Achieving High Assurance Service | Kotaro Hama, Yuji Horikoshi, Yosuke Sugiyama, Kinji Mori | Dependable Computing | |
| Hämäläinen, Panu | 2006 |
Security in Wireless Sensor Networks: Considerations and Experiments | Panu Hämäläinen, Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensor Networks | |
| Hämäläinen, Timo D. | 2006 |
Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform | Mikko Setälä, Petri Kukkala, Tero Arpinen, Marko Hännikäinen, Timo D. Hämäläinen | System Design and Modeling | |
| Hämäläinen, Timo D. | 2006 |
Design, Implementation, and Experiments on Outdoor Deployment of Wireless Sensor Network for Environmental Monitoring | Jukka Suhonen, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensor Networks | |
| Hämäläinen, Timo D. | 2006 |
Security in Wireless Sensor Networks: Considerations and Experiments | Panu Hämäläinen, Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensor Networks | |
| Haneda, Masayo | 2006 |
Code Size Reduction by Compiler Tuning | Masayo Haneda, Peter M. W. Knijnenburg, Harry A. G. Wijshoff | Processor Design | |
| Hännikäinen, Marko | 2006 |
Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform | Mikko Setälä, Petri Kukkala, Tero Arpinen, Marko Hännikäinen, Timo D. Hämäläinen | System Design and Modeling | |
| Hännikäinen, Marko | 2006 |
Design, Implementation, and Experiments on Outdoor Deployment of Wireless Sensor Network for Environmental Monitoring | Jukka Suhonen, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensor Networks | |
| Hännikäinen, Marko | 2006 |
Security in Wireless Sensor Networks: Considerations and Experiments | Panu Hämäläinen, Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensor Networks | |
| Heikkinen, Jari | 2006 |
Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier Transform | Teemu Pitkänen, Risto Mäkinen, Jari Heikkinen, Tero Partanen, Jarmo Takala | Processor Design | |
| Heikkinen, Jari | 2006 |
Effects of Program Compression | Jari Heikkinen, Jarmo Takala | Processor Design | |
| Holsmark, Rickard | 2006 |
A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures | Maurizio Palesi, Shashi Kumar, Rickard Holsmark | Architectures and Implementations | |
| Homayoun, Houman | 2006 |
Reducing Execution Unit Leakage Power in Embedded Processors | Houman Homayoun, Amirali Baniasadi | Processor Design | |
| Horikoshi, Yuji | 2006 |
Autonomous Construction Technology of Community for Achieving High Assurance Service | Kotaro Hama, Yuji Horikoshi, Yosuke Sugiyama, Kinji Mori | Dependable Computing | |
| Hovsepyan, Aram | 2006 |
Towards a Transformation Chain Modeling Language | Bert Vanhooff, Stefan Van Baelen, Aram Hovsepyan, Wouter Joosen, Yolande Berbers | System Design and Modeling | |
| Hovsepyan, Aram | 2006 |
Key Research Challenges for Successfully Applying MDD Within Real-Time Embedded Software Development | Aram Hovsepyan, Stefan Van Baelen, Bert Vanhooff, Wouter Joosen, Yolande Berbers | System Design and Modeling | |
| Huijsing, Johan H. | 2006 |
A Solid-State 2-D Wind Sensor | K. A. A. Makinwa, Johan H. Huijsing, Arend Hagedoorn | Embedded Sensor Systems | |
| Hyncica, Ondrej | 2006 |
On Security of PAN Wireless Systems | Ondrej Hyncica, Peter Kacz, Petr Fiedler, Zdenek Bradac, Pavel Kucera, Radimir Vrba | Wireless Sensor Networks | |
| Iancu, Andrei | 2006 |
Software Implementation of WiMAX on the Sandbridge SandBlaster Platform | Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala | Architectures and Implementations | |
| Iancu, Daniel | 2006 |
Software Implementation of WiMAX on the Sandbridge SandBlaster Platform | Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala | Architectures and Implementations | |
| Icart, Sébastien | 2006 |
Energy Optimization of a Multi-bank Main Memory | Hanene Ben Fradj, Sébastien Icart, Cécile Belleudy, Michel Auguin | Processor Design | |
| Iranpour, Ali | 2006 |
Memory Architecture Evaluation for Video Encoding on Enhanced Embedded Processors | Ali Iranpour, Krzysztof Kuchcinski | Processor Design | |
| Jääskeläinen, Pekka | 2006 |
Software Pipelining Support for Transport Triggered Architecture Processors | Perttu Salmela, Pekka Jääskeläinen, Tuomas Järvinen, Jarmo Takala | Processor Design | |
| Jacobs, Jan W. M. | 2006 |
Mining Dynamic Document Spaces with Massively Parallel Embedded Processors | Jan W. M. Jacobs, Rui Dai, Gerard J. M. Smit | System Design and Modeling | |
| Järvinen, Tuomas | 2006 |
Software Pipelining Support for Transport Triggered Architecture Processors | Perttu Salmela, Pekka Jääskeläinen, Tuomas Järvinen, Jarmo Takala | Processor Design | |
| Joosen, Wouter | 2006 |
Towards a Transformation Chain Modeling Language | Bert Vanhooff, Stefan Van Baelen, Aram Hovsepyan, Wouter Joosen, Yolande Berbers | System Design and Modeling | |
| Joosen, Wouter | 2006 |
Key Research Challenges for Successfully Applying MDD Within Real-Time Embedded Software Development | Aram Hovsepyan, Stefan Van Baelen, Bert Vanhooff, Wouter Joosen, Yolande Berbers | System Design and Modeling | |
| Kacz, Peter | 2006 |
On Security of PAN Wireless Systems | Ondrej Hyncica, Peter Kacz, Petr Fiedler, Zdenek Bradac, Pavel Kucera, Radimir Vrba | Wireless Sensor Networks | |
| Kaxiras, Stefanos | 2006 |
Preventing Denial-of-Service Attacks in Shared CMP Caches | Georgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras, Alexandros Antonopoulos, Dimitrios Serpanos | Dependable Computing | |
| Keramidas, Georgios | 2006 |
Preventing Denial-of-Service Attacks in Shared CMP Caches | Georgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras, Alexandros Antonopoulos, Dimitrios Serpanos | Dependable Computing | |
| Kim, Dae-Hwan | 2006 |
Integrated Instruction Scheduling and Fine-Grain Register Allocation for Embedded Processors | Dae-Hwan Kim, Hyuk-Jae Lee | Processor Design | |
| Kim, Dae-Won | 2006 |
LATONA: An Advanced Server Architecture for Ubiquitous Sensor Network | Chi-Hoon Shin, Soo-Cheol Oh, Dae-Won Kim, Sun-Wook Kim, Kyoung Park, Sung-Woon Kim | Wireless Sensor Networks | |
| Kim, Sun-Wook | 2006 |
LATONA: An Advanced Server Architecture for Ubiquitous Sensor Network | Chi-Hoon Shin, Soo-Cheol Oh, Dae-Won Kim, Sun-Wook Kim, Kyoung Park, Sung-Woon Kim | Wireless Sensor Networks | |
| Kim, Sung-Woon | 2006 |
LATONA: An Advanced Server Architecture for Ubiquitous Sensor Network | Chi-Hoon Shin, Soo-Cheol Oh, Dae-Won Kim, Sun-Wook Kim, Kyoung Park, Sung-Woon Kim | Wireless Sensor Networks | |
| Knijnenburg, Peter M. W. | 2006 |
Code Size Reduction by Compiler Tuning | Masayo Haneda, Peter M. W. Knijnenburg, Harry A. G. Wijshoff | Processor Design | |
| Ko, Dong-Ik | 2006 |
Energy-Driven Partitioning of Signal Processing Algorithms in Sensor Networks | Dong-Ik Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya, Neil Goldsman | Wireless Sensor Networks | |
| Kohvakka, Mikko | 2006 |
Design, Implementation, and Experiments on Outdoor Deployment of Wireless Sensor Network for Environmental Monitoring | Jukka Suhonen, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensor Networks | |
| Kotlyar, Vladimir | 2006 |
Software Implementation of WiMAX on the Sandbridge SandBlaster Platform | Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala | Architectures and Implementations | |
| Kucera, Pavel | 2006 |
On Security of PAN Wireless Systems | Ondrej Hyncica, Peter Kacz, Petr Fiedler, Zdenek Bradac, Pavel Kucera, Radimir Vrba | Wireless Sensor Networks | |
| Kuchcinski, Krzysztof | 2006 |
Memory Architecture Evaluation for Video Encoding on Enhanced Embedded Processors | Ali Iranpour, Krzysztof Kuchcinski | Processor Design | |
| Kukkala, Petri | 2006 |
Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform | Mikko Setälä, Petri Kukkala, Tero Arpinen, Marko Hännikäinen, Timo D. Hämäläinen | System Design and Modeling | |
| Kumar, Shashi | 2006 |
A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures | Maurizio Palesi, Shashi Kumar, Rickard Holsmark | Architectures and Implementations | |
| Kuorilehto, Mauri | 2006 |
Security in Wireless Sensor Networks: Considerations and Experiments | Panu Hämäläinen, Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensor Networks | |
| Kuzmanov, Georgi | 2006 |
Rescheduling for Optimized SHA-1 Calculation | Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis | Architectures and Implementations | |
| Lee, Hyuk-Jae | 2006 |
Integrated Instruction Scheduling and Fine-Grain Register Allocation for Embedded Processors | Dae-Hwan Kim, Hyuk-Jae Lee | Processor Design | |
| Lee, Je-Hoon | 2006 |
Design of Asynchronous Embedded Processor with New Ternary Data Encoding Scheme | Je-Hoon Lee, Eun-Ju Choi, Kyoung-Rok Cho | Architectures and Implementations | |
| Lee, Tae-Hoon | 2006 |
A Flash File System to Support Fast Mounting for NAND Flash Memory Based Embedded Systems | Song-Hwa Park, Tae-Hoon Lee, Ki-Dong Chung | Architectures and Implementations | |
| Madl, Gabor | 2006 |
Domain-Specific Modeling of Power Aware Distributed Real-Time Embedded Systems | Gabor Madl, Nikil Dutt | System Design and Modeling | |
| Mäkinen, Risto | 2006 |
Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier Transform | Teemu Pitkänen, Risto Mäkinen, Jari Heikkinen, Tero Partanen, Jarmo Takala | Processor Design | |
| Makinwa, K. A. A. | 2006 |
A Solid-State 2-D Wind Sensor | K. A. A. Makinwa, Johan H. Huijsing, Arend Hagedoorn | Embedded Sensor Systems | |
| Marwedel, Peter | 2006 |
Compilation and Simulation Tool Chain for Memory Aware Energy Optimizations | Manish Verma, Lars Wehmeyer, Robert Pyka, Peter Marwedel, Luca Benini | Processor Design | |
| Meenderinck, Cor | 2006 |
High-Radix Addition and Multiplication in the Electron Counting Paradigm Using Single Electron Tunneling Technology | Cor Meenderinck, Sorin Dan Cotofana | Architectures and Implementations | |
| Mori, Kinji | 2006 |
Autonomous Construction Technology of Community for Achieving High Assurance Service | Kotaro Hama, Yuji Horikoshi, Yosuke Sugiyama, Kinji Mori | Dependable Computing | |
| Mota, Sonia | 2006 |
Real-Time Embedded System for Rear-View Mirror Overtaking Car Monitoring | Javier Díaz, Eduardo Ros, Sonia Mota, Rodrigo Agis | Architectures and Implementations | |
| Nacer, Gary | 2006 |
Software Implementation of WiMAX on the Sandbridge SandBlaster Platform | Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala | Architectures and Implementations | |
| Niggemeier, Tim | 2006 |
A Scalable, Multi-thread, Multi-issue Array Processor Architecture for DSP Applications Based on Extended Tomasulo Scheme | Mladen Berekovi?, Tim Niggemeier | Processor Design | |
| Noll, Tobias G. | 2006 |
Hybrid Functional and Instruction Level Power Modeling for Embedded Processors | Holger Blume, Daniel Becker, Martin Botteck, Jörg Brakensiek, Tobias G. Noll | Processor Design | |
| Oh, Soo-Cheol | 2006 |
LATONA: An Advanced Server Architecture for Ubiquitous Sensor Network | Chi-Hoon Shin, Soo-Cheol Oh, Dae-Won Kim, Sun-Wook Kim, Kyoung Park, Sung-Woon Kim | Wireless Sensor Networks | |
| Oliver, Ian | 2006 |
A UML Profile for Asynchronous Hardware Design | Kim Sandström, Ian Oliver | System Design and Modeling | |
| Pacher, Mathias | 2006 |
A Scheduling Strategy for a Real-Time Dependable Organic Middleware | Uwe Brinkschulte, Alexander von Renteln, Mathias Pacher | Dependable Computing | |
| Palesi, Maurizio | 2006 |
A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures | Maurizio Palesi, Shashi Kumar, Rickard Holsmark | Architectures and Implementations | |
| Park, Kyoung | 2006 |
LATONA: An Advanced Server Architecture for Ubiquitous Sensor Network | Chi-Hoon Shin, Soo-Cheol Oh, Dae-Won Kim, Sun-Wook Kim, Kyoung Park, Sung-Woon Kim | Wireless Sensor Networks | |
| Park, Song-Hwa | 2006 |
A Flash File System to Support Fast Mounting for NAND Flash Memory Based Embedded Systems | Song-Hwa Park, Tae-Hoon Lee, Ki-Dong Chung | Architectures and Implementations | |
| Partanen, Tero | 2006 |
Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier Transform | Teemu Pitkänen, Risto Mäkinen, Jari Heikkinen, Tero Partanen, Jarmo Takala | Processor Design | |
| Petoumenos, Pavlos | 2006 |
Preventing Denial-of-Service Attacks in Shared CMP Caches | Georgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras, Alexandros Antonopoulos, Dimitrios Serpanos | Dependable Computing | |
| Pitkänen, Teemu | 2006 |
Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier Transform | Teemu Pitkänen, Risto Mäkinen, Jari Heikkinen, Tero Partanen, Jarmo Takala | Processor Design | |
| Pyka, Robert | 2006 |
Compilation and Simulation Tool Chain for Memory Aware Energy Optimizations | Manish Verma, Lars Wehmeyer, Robert Pyka, Peter Marwedel, Luca Benini | Processor Design | |
| Rabbachin, Alberto | 2006 |
Preamble Sense Multiple Access (PSMA) for Impulse Radio Ultra Wideband Sensor Networks | Jussi Haapola, Leonardo Goratti, Isameldin Suliman, Alberto Rabbachin | Wireless Sensor Networks | |
| Raekallio, Juuso | 2006 |
Interface Overheads in Embedded Multimedia Software | Tero Rintaluoma, Olli Silven, Juuso Raekallio | System Design and Modeling | |
| Rintaluoma, Tero | 2006 |
Interface Overheads in Embedded Multimedia Software | Tero Rintaluoma, Olli Silven, Juuso Raekallio | System Design and Modeling | |
| Ristau, Bastian | 2006 |
An Optimization Methodology for Memory Allocation and Task Scheduling in SoCs Via Linear Programming | Bastian Ristau, Gerhard Fettweis | System Design and Modeling | |
| Ros, Eduardo | 2006 |
Real-Time Embedded System for Rear-View Mirror Overtaking Car Monitoring | Javier Díaz, Eduardo Ros, Sonia Mota, Rodrigo Agis | Architectures and Implementations | |
| Rutzig, Mateus B. | 2006 |
Advantages of Java Processors in Cache Performance and Power for Embedded Applications | Antonio Carlos S. Beck, Mateus B. Rutzig, Luigi Carro | Processor Design | |
| Salmela, Perttu | 2006 |
Software Pipelining Support for Transport Triggered Architecture Processors | Perttu Salmela, Pekka Jääskeläinen, Tuomas Järvinen, Jarmo Takala | Processor Design | |
| Sandström, Kim | 2006 |
A UML Profile for Asynchronous Hardware Design | Kim Sandström, Ian Oliver | System Design and Modeling | |
| Senthilvelan, Murugappan | 2006 |
Software Implementation of WiMAX on the Sandbridge SandBlaster Platform | Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala | Architectures and Implementations | |
| Serpanos, Dimitrios | 2006 |
Preventing Denial-of-Service Attacks in Shared CMP Caches | Georgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras, Alexandros Antonopoulos, Dimitrios Serpanos | Dependable Computing | |
| Setälä, Mikko | 2006 |
Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform | Mikko Setälä, Petri Kukkala, Tero Arpinen, Marko Hännikäinen, Timo D. Hämäläinen | System Design and Modeling | |
| Shen, Chung-Ching | 2006 |
Energy-Driven Partitioning of Signal Processing Algorithms in Sensor Networks | Dong-Ik Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya, Neil Goldsman | Wireless Sensor Networks | |
| Shin, Chi-Hoon | 2006 |
LATONA: An Advanced Server Architecture for Ubiquitous Sensor Network | Chi-Hoon Shin, Soo-Cheol Oh, Dae-Won Kim, Sun-Wook Kim, Kyoung Park, Sung-Woon Kim | Wireless Sensor Networks | |
| Silven, Olli | 2006 |
Interface Overheads in Embedded Multimedia Software | Tero Rintaluoma, Olli Silven, Juuso Raekallio | System Design and Modeling | |
| Smit, Gerard J. M. | 2006 |
Mining Dynamic Document Spaces with Massively Parallel Embedded Processors | Jan W. M. Jacobs, Rui Dai, Gerard J. M. Smit | System Design and Modeling | |
| Sousa, Leonel | 2006 |
Rescheduling for Optimized SHA-1 Calculation | Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis | Architectures and Implementations | |
| Stamoulis, Georgios I. | 2006 |
CARROT – A Tool for Fast and Accurate Soft Error Rate Estimation | Dimitrios Bountas, Georgios I. Stamoulis | Dependable Computing | |
| Sugiyama, Yosuke | 2006 |
Autonomous Construction Technology of Community for Achieving High Assurance Service | Kotaro Hama, Yuji Horikoshi, Yosuke Sugiyama, Kinji Mori | Dependable Computing | |
| Suhonen, Jukka | 2006 |
Design, Implementation, and Experiments on Outdoor Deployment of Wireless Sensor Network for Environmental Monitoring | Jukka Suhonen, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensor Networks | |
| Suliman, Isameldin | 2006 |
Preamble Sense Multiple Access (PSMA) for Impulse Radio Ultra Wideband Sensor Networks | Jussi Haapola, Leonardo Goratti, Isameldin Suliman, Alberto Rabbachin | Wireless Sensor Networks | |
| Surducan, Emanoil | 2006 |
Software Implementation of WiMAX on the Sandbridge SandBlaster Platform | Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala | Architectures and Implementations | |
| Surducan, Vasile | 2006 |
Software Implementation of WiMAX on the Sandbridge SandBlaster Platform | Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala | Architectures and Implementations | |
| Takala, Jarmo | 2006 |
Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier Transform | Teemu Pitkänen, Risto Mäkinen, Jari Heikkinen, Tero Partanen, Jarmo Takala | Processor Design | |
| Takala, Jarmo | 2006 |
Software Pipelining Support for Transport Triggered Architecture Processors | Perttu Salmela, Pekka Jääskeläinen, Tuomas Järvinen, Jarmo Takala | Processor Design | |
| Takala, Jarmo | 2006 |
Effects of Program Compression | Jari Heikkinen, Jarmo Takala | Processor Design | |
| Takala, Jarmo | 2006 |
Software Implementation of WiMAX on the Sandbridge SandBlaster Platform | Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala | Architectures and Implementations | |
| Tillich, Stefan | 2006 |
Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box | Stefan Tillich, Martin Feldhofer, Johann Großschädl | Architectures and Implementations | |
| Tsarchopoulos, Panagiotis | 2006 |
European Research in Embedded Systems | Panagiotis Tsarchopoulos | SAMOS VI - Keynote | 2006-WS-02 |
| Van Baelen, Stefan | 2006 |
Towards a Transformation Chain Modeling Language | Bert Vanhooff, Stefan Van Baelen, Aram Hovsepyan, Wouter Joosen, Yolande Berbers | System Design and Modeling | |
| Van Baelen, Stefan | 2006 |
Key Research Challenges for Successfully Applying MDD Within Real-Time Embedded Software Development | Aram Hovsepyan, Stefan Van Baelen, Bert Vanhooff, Wouter Joosen, Yolande Berbers | System Design and Modeling | |
| Vanhooff, Bert | 2006 |
Towards a Transformation Chain Modeling Language | Bert Vanhooff, Stefan Van Baelen, Aram Hovsepyan, Wouter Joosen, Yolande Berbers | System Design and Modeling | |
| Vanhooff, Bert | 2006 |
Key Research Challenges for Successfully Applying MDD Within Real-Time Embedded Software Development | Aram Hovsepyan, Stefan Van Baelen, Bert Vanhooff, Wouter Joosen, Yolande Berbers | System Design and Modeling | |
| Vassiliadis, Stamatis | 2006 |
SAD Prefetching for MPEG4 Using Flux Caches | Georgi N. Gaydadjiev, Stamatis Vassiliadis | Processor Design | |
| Vassiliadis, Stamatis | 2006 |
Rescheduling for Optimized SHA-1 Calculation | Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis | Architectures and Implementations | |
| Verma, Manish | 2006 |
Compilation and Simulation Tool Chain for Memory Aware Energy Optimizations | Manish Verma, Lars Wehmeyer, Robert Pyka, Peter Marwedel, Luca Benini | Processor Design | |
| Vieira, Marcos A. M. | 2006 |
Designing Wireless Sensor Nodes | Marcos A. M. Vieira, Adriano B. da Cunha, Diógenes C. da Silva | Wireless Sensor Networks | |
| Voeten, Jeroen | 2006 |
Probabilistic Modelling and Evaluation of Soft Real-Time Embedded Systems | Oana Florescu, Menno de Hoon, Jeroen Voeten, Henk Corporaal | Processor Design | |
| von Renteln, Alexander | 2006 |
A Scheduling Strategy for a Real-Time Dependable Organic Middleware | Uwe Brinkschulte, Alexander von Renteln, Mathias Pacher | Dependable Computing | |
| Vrba, Radimir | 2006 |
On Security of PAN Wireless Systems | Ondrej Hyncica, Peter Kacz, Petr Fiedler, Zdenek Bradac, Pavel Kucera, Radimir Vrba | Wireless Sensor Networks | |
| Wehmeyer, Lars | 2006 |
Compilation and Simulation Tool Chain for Memory Aware Energy Optimizations | Manish Verma, Lars Wehmeyer, Robert Pyka, Peter Marwedel, Luca Benini | Processor Design | |
| Wijshoff, Harry A. G. | 2006 |
Code Size Reduction by Compiler Tuning | Masayo Haneda, Peter M. W. Knijnenburg, Harry A. G. Wijshoff | Processor Design | |
| Ye, Hua | 2006 |
Software Implementation of WiMAX on the Sandbridge SandBlaster Platform | Daniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala | Architectures and Implementations | |
| Yun, SangKyun | 2006 |
Hardware-Based IP Lookup Using n-Way Set Associative Memory and LPM Comparator | SangKyun Yun | Architectures and Implementations | |
| Aboelaze, M. | 2006 |
Modified Hotspot Cache Architecture: A Low Energy Fast Cache for Embedded Processors | K. Ali, M. Aboelaze, S. Datta | Energy Aware Processors | |
| Acacio, Manuel E. | 2006 |
On the Evaluation of Dense Chip-Multiprocessor Architectures | Francisco J. Villa, Manuel E. Acacio, Jose M. Garcia | Embedded Processors and Architectures | |
| Aho, Eero | 2006 |
Parallel Memory Implementation for Arbitrary Stride Accesses | Eero Aho, Jarno Vanne, Timo D. Hämäläinen | Embedded Processors and Architectures | |
| Ali, K. | 2006 |
Modified Hotspot Cache Architecture: A Low Energy Fast Cache for Embedded Processors | K. Ali, M. Aboelaze, S. Datta | Energy Aware Processors | |
| Ascia, Giuseppe | 2006 |
An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design | Giuseppe Ascia, Vincenzo Catania, Alessandro G. di Nuovo, Maurizio Palesi, Davide Patti | High Level System Design and Simulation | |
| Baniasadi, Amirali | 2006 |
Area-Aware Optimizations for Resource Constrained Branch Predictors Exploited in Embedded Processors | Babak Salamat, Amirali Baniasadi, Kaveh Jokar Deris | Energy Aware Processors | |
| Basten, Twan | 2006 |
Profiling Driven Scenario Detection and Prediction for Multimedia Applications | Stefan Valentin Gheorghita, Twan Basten, Henk Corporaal | Design Space Exploration (1) | |
| Bhattacharyya, Shuvra S. | 2006 |
Memory-constrained Block Processing Optimization for Synthesis of DSP Software | Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya | High Level System Design and Simulation | |
| Borgio, Simone | 2006 |
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA | Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo | Design Space Exploration (2) | |
| Bosisio, Davide | 2006 |
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA | Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo | Design Space Exploration (2) | |
| Brockmeyer, Erik | 2006 |
Pareto-Based Application Specification for MP-SoC Customized Run-Time Management | Ch. Ykman-Couvreur, V. Nollet, Théodore Marescaux, Erik Brockmeyer, Francky Catthoor, Henk Corporaal | Design Space Exploration (1) | |
| Catania, Vincenzo | 2006 |
An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design | Giuseppe Ascia, Vincenzo Catania, Alessandro G. di Nuovo, Maurizio Palesi, Davide Patti | High Level System Design and Simulation | |
| Catthoor, Francky | 2006 |
Pareto-Based Application Specification for MP-SoC Customized Run-Time Management | Ch. Ykman-Couvreur, V. Nollet, Théodore Marescaux, Erik Brockmeyer, Francky Catthoor, Henk Corporaal | Design Space Exploration (1) | |
| Cheung, Peter Y.K. | 2006 |
On-Chip Communication in Run-Time Assembled Reconfigurable Systems | Pete Sedcole, Peter Y.K. Cheung, George A. Constantinides, Wayne Luk | Reconfigurable Processors and Applications of Embedded Systems | |
| Constantinides, George A. | 2006 |
On-Chip Communication in Run-Time Assembled Reconfigurable Systems | Pete Sedcole, Peter Y.K. Cheung, George A. Constantinides, Wayne Luk | Reconfigurable Processors and Applications of Embedded Systems | |
| Corporaal, Henk | 2006 |
Profiling Driven Scenario Detection and Prediction for Multimedia Applications | Stefan Valentin Gheorghita, Twan Basten, Henk Corporaal | Design Space Exploration (1) | |
| Corporaal, Henk | 2006 |
Pareto-Based Application Specification for MP-SoC Customized Run-Time Management | Ch. Ykman-Couvreur, V. Nollet, Théodore Marescaux, Erik Brockmeyer, Francky Catthoor, Henk Corporaal | Design Space Exploration (1) | |
| Cotofana, Sorin Dan | 2006 |
Throughput optimization via cache partitioning for embedded multiprocessors | Anca M. Molnos, Sorin Dan Cotofana, Marc J.M. Heijligers, Jos T. J. van Eijndhoven | Reconfigurable Processors and Applications of Embedded Systems | |
| Datta, S. | 2006 |
Modified Hotspot Cache Architecture: A Low Energy Fast Cache for Embedded Processors | K. Ali, M. Aboelaze, S. Datta | Energy Aware Processors | |
| Deris, Kaveh Jokar | 2006 |
Area-Aware Optimizations for Resource Constrained Branch Predictors Exploited in Embedded Processors | Babak Salamat, Amirali Baniasadi, Kaveh Jokar Deris | Energy Aware Processors | |
| di Nuovo, Alessandro G. | 2006 |
An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design | Giuseppe Ascia, Vincenzo Catania, Alessandro G. di Nuovo, Maurizio Palesi, Davide Patti | High Level System Design and Simulation | |
| Dimitroulakos, G. | 2006 |
Performance Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path | Michalis D. Galanis, G. Dimitroulakos, Costas E. Goutis | Design Space Exploration (2) | |
| Erbas, Cagkan | 2006 |
On the Calibration of Abstract Performance Models for System-level Design Space Exploration | Andy D. Pimentel, Mark Thompson, Simon Polstra, Cagkan Erbas | Design Space Exploration (1) | |
| Ferrandi, Fabrizio | 2006 |
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA | Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo | Design Space Exploration (2) | |
| Galanis, Michalis D. | 2006 |
Performance Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path | Michalis D. Galanis, G. Dimitroulakos, Costas E. Goutis | Design Space Exploration (2) | |
| Garcia, Jose M. | 2006 |
On the Evaluation of Dense Chip-Multiprocessor Architectures | Francisco J. Villa, Manuel E. Acacio, Jose M. Garcia | Embedded Processors and Architectures | |
| Gawlowski, Dominik | 2006 |
Multi-objective Optimal Controller Synthesis for Heterogeneous Embedded Systems | Lech Jozwiak, Dominik Gawlowski, Aleksander Slusarczyk | Reconfigurable Processors and Applications of Embedded Systems | |
| Gheorghita, Stefan Valentin | 2006 |
Profiling Driven Scenario Detection and Prediction for Multimedia Applications | Stefan Valentin Gheorghita, Twan Basten, Henk Corporaal | Design Space Exploration (1) | |
| Goudarzi, Maziar | 2006 |
A Table-Based Application-Specific Prefetch Engine for Object-Oriented Embedded Systems | Shaahin Hessabi, M. Modarressi, Maziar Goudarzi, H. Javanhemmat | Embedded Processors and Architectures | |
| Goutis, Costas E. | 2006 |
Performance Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path | Michalis D. Galanis, G. Dimitroulakos, Costas E. Goutis | Design Space Exploration (2) | |
| Gurun, S. | 2006 |
SimGate: Full-System, Cycle-Close Simulation of the Stargate Sensor Network Intermediate Node | Y. Wen, S. Gurun, Chohan Navraj, R. Wolski, C. Krintz | High Level System Design and Simulation | |
| Hämäläinen, Timo D. | 2006 |
Parallel Memory Implementation for Arbitrary Stride Accesses | Eero Aho, Jarno Vanne, Timo D. Hämäläinen | Embedded Processors and Architectures | |
| Haubelt, Christian | 2006 |
Multi-Objective Topology Optimization for Networked Embedded Systems | Thilo Streichert, Christian Haubelt, Jürgen Teich | Design Space Exploration (2) | |
| Heijligers, Marc J.M. | 2006 |
Throughput optimization via cache partitioning for embedded multiprocessors | Anca M. Molnos, Sorin Dan Cotofana, Marc J.M. Heijligers, Jos T. J. van Eijndhoven | Reconfigurable Processors and Applications of Embedded Systems | |
| Herkersdorf, Andreas | 2006 |
Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications | Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf | System and Network-on-Chip Platforms | |
| Hessabi, Shaahin | 2006 |
A Table-Based Application-Specific Prefetch Engine for Object-Oriented Embedded Systems | Shaahin Hessabi, M. Modarressi, Maziar Goudarzi, H. Javanhemmat | Embedded Processors and Architectures | |
| Holler, R. | 2006 |
Accelerating RTL Simulation by Several Orders of Magnitude Using Clock Suppression | H. Muhr, R. Holler | High Level System Design and Simulation | |
| Hu, Jie | 2006 |
On the Characterization of Data Cache Vulnerability in High-Performance Embedded Microprocessors | Shuai Wang, Jie Hu, Sotirios G. Ziavras | Embedded Processors and Architectures | |
| Islam, Md. Mafijul | 2006 |
Reduction of Energy Consumption in Processors by Early Detection and Bypassing of Trivial Operations | Md. Mafijul Islam, Per Stenstrom | Energy Aware Processors | |
| Javanhemmat, H. | 2006 |
A Table-Based Application-Specific Prefetch Engine for Object-Oriented Embedded Systems | Shaahin Hessabi, M. Modarressi, Maziar Goudarzi, H. Javanhemmat | Embedded Processors and Architectures | |
| Jeschke, Hartwig | 2006 |
Chip Size Estimation for SOC Design Space Exploration | Hartwig Jeschke | Design Space Exploration (1) | |
| Jozwiak, Lech | 2006 |
Multi-objective Optimal Controller Synthesis for Heterogeneous Embedded Systems | Lech Jozwiak, Dominik Gawlowski, Aleksander Slusarczyk | Reconfigurable Processors and Applications of Embedded Systems | |
| Ko, Ming-Yung | 2006 |
Memory-constrained Block Processing Optimization for Synthesis of DSP Software | Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya | High Level System Design and Simulation | |
| Krintz, C. | 2006 |
SimGate: Full-System, Cycle-Close Simulation of the Stargate Sensor Network Intermediate Node | Y. Wen, S. Gurun, Chohan Navraj, R. Wolski, C. Krintz | High Level System Design and Simulation | |
| Lafond, Sebastien | 2006 |
Static Energy Saving Through Multi-Bank Memory Architecture | Sebastien Lafond, Johan Lilius | Energy Aware Processors | |
| Lilius, Johan | 2006 |
Static Energy Saving Through Multi-Bank Memory Architecture | Sebastien Lafond, Johan Lilius | Energy Aware Processors | |
| Luk, Wayne | 2006 |
On-Chip Communication in Run-Time Assembled Reconfigurable Systems | Pete Sedcole, Peter Y.K. Cheung, George A. Constantinides, Wayne Luk | Reconfigurable Processors and Applications of Embedded Systems | |
| Marescaux, Théodore | 2006 |
Pareto-Based Application Specification for MP-SoC Customized Run-Time Management | Ch. Ykman-Couvreur, V. Nollet, Théodore Marescaux, Erik Brockmeyer, Francky Catthoor, Henk Corporaal | Design Space Exploration (1) | |
| Meitinger, Michael | 2006 |
Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications | Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf | System and Network-on-Chip Platforms | |
| Merker, R. | 2006 |
Parameterized Mapping of Algorithms onto Processor Arrays with Sub-Word Parallelism | R. Schaffer, R. Merker | Design Space Exploration (2) | |
| Modarressi, M. | 2006 |
A Table-Based Application-Specific Prefetch Engine for Object-Oriented Embedded Systems | Shaahin Hessabi, M. Modarressi, Maziar Goudarzi, H. Javanhemmat | Embedded Processors and Architectures | |
| Molnos, Anca M. | 2006 |
Throughput optimization via cache partitioning for embedded multiprocessors | Anca M. Molnos, Sorin Dan Cotofana, Marc J.M. Heijligers, Jos T. J. van Eijndhoven | Reconfigurable Processors and Applications of Embedded Systems | |
| Monchiero, Matteo | 2006 |
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA | Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo | Design Space Exploration (2) | |
| Monchiero, Matteo | 2006 |
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa | System and Network-on-Chip Platforms | |
| Muhr, H. | 2006 |
Accelerating RTL Simulation by Several Orders of Magnitude Using Clock Suppression | H. Muhr, R. Holler | High Level System Design and Simulation | |
| Navraj, Chohan | 2006 |
SimGate: Full-System, Cycle-Close Simulation of the Stargate Sensor Network Intermediate Node | Y. Wen, S. Gurun, Chohan Navraj, R. Wolski, C. Krintz | High Level System Design and Simulation | |
| Nollet, V. | 2006 |
Pareto-Based Application Specification for MP-SoC Customized Run-Time Management | Ch. Ykman-Couvreur, V. Nollet, Théodore Marescaux, Erik Brockmeyer, Francky Catthoor, Henk Corporaal | Design Space Exploration (1) | |
| Ohlendorf, Rainer | 2006 |
Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications | Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf | System and Network-on-Chip Platforms | |
| Palermo, Gianluca | 2006 |
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa | System and Network-on-Chip Platforms | |
| Palesi, Maurizio | 2006 |
An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design | Giuseppe Ascia, Vincenzo Catania, Alessandro G. di Nuovo, Maurizio Palesi, Davide Patti | High Level System Design and Simulation | |
| Patti, Davide | 2006 |
An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design | Giuseppe Ascia, Vincenzo Catania, Alessandro G. di Nuovo, Maurizio Palesi, Davide Patti | High Level System Design and Simulation | |
| Pimentel, Andy D. | 2006 |
On the Calibration of Abstract Performance Models for System-level Design Space Exploration | Andy D. Pimentel, Mark Thompson, Simon Polstra, Cagkan Erbas | Design Space Exploration (1) | |
| Polstra, Simon | 2006 |
On the Calibration of Abstract Performance Models for System-level Design Space Exploration | Andy D. Pimentel, Mark Thompson, Simon Polstra, Cagkan Erbas | Design Space Exploration (1) | |
| Rauchfuss, Holm | 2006 |
Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications | Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf | System and Network-on-Chip Platforms | |
| Salamat, Babak | 2006 |
Area-Aware Optimizations for Resource Constrained Branch Predictors Exploited in Embedded Processors | Babak Salamat, Amirali Baniasadi, Kaveh Jokar Deris | Energy Aware Processors | |
| Santambrogio, Marco D. | 2006 |
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA | Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo | Design Space Exploration (2) | |
| Schaffer, R. | 2006 |
Parameterized Mapping of Algorithms onto Processor Arrays with Sub-Word Parallelism | R. Schaffer, R. Merker | Design Space Exploration (2) | |
| Sciuto, Donatella | 2006 |
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA | Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo | Design Space Exploration (2) | |
| Sedcole, Pete | 2006 |
On-Chip Communication in Run-Time Assembled Reconfigurable Systems | Pete Sedcole, Peter Y.K. Cheung, George A. Constantinides, Wayne Luk | Reconfigurable Processors and Applications of Embedded Systems | |
| Shen, Chung-Ching | 2006 |
Memory-constrained Block Processing Optimization for Synthesis of DSP Software | Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya | High Level System Design and Simulation | |
| Silvano, Cristina | 2006 |
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa | System and Network-on-Chip Platforms | |
| Slusarczyk, Aleksander | 2006 |
Multi-objective Optimal Controller Synthesis for Heterogeneous Embedded Systems | Lech Jozwiak, Dominik Gawlowski, Aleksander Slusarczyk | Reconfigurable Processors and Applications of Embedded Systems | |
| Sourdis, Ioannis | 2006 |
FLUX Networks: Interconnects on Demand | Stamatis Vassiliadis, Ioannis Sourdis | System and Network-on-Chip Platforms | |
| Stenstrom, Per | 2006 |
Reduction of Energy Consumption in Processors by Early Detection and Bypassing of Trivial Operations | Md. Mafijul Islam, Per Stenstrom | Energy Aware Processors | |
| Streichert, Thilo | 2006 |
Multi-Objective Topology Optimization for Networked Embedded Systems | Thilo Streichert, Christian Haubelt, Jürgen Teich | Design Space Exploration (2) | |
| Teich, Jürgen | 2006 |
Multi-Objective Topology Optimization for Networked Embedded Systems | Thilo Streichert, Christian Haubelt, Jürgen Teich | Design Space Exploration (2) | |
| Thompson, Mark | 2006 |
On the Calibration of Abstract Performance Models for System-level Design Space Exploration | Andy D. Pimentel, Mark Thompson, Simon Polstra, Cagkan Erbas | Design Space Exploration (1) | |
| Tumeo, Antonino | 2006 |
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA | Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo | Design Space Exploration (2) | |
| van Eijndhoven, Jos T. J. | 2006 |
Throughput optimization via cache partitioning for embedded multiprocessors | Anca M. Molnos, Sorin Dan Cotofana, Marc J.M. Heijligers, Jos T. J. van Eijndhoven | Reconfigurable Processors and Applications of Embedded Systems | |
| Vanne, Jarno | 2006 |
Parallel Memory Implementation for Arbitrary Stride Accesses | Eero Aho, Jarno Vanne, Timo D. Hämäläinen | Embedded Processors and Architectures | |
| Vassiliadis, Stamatis | 2006 |
FLUX Networks: Interconnects on Demand | Stamatis Vassiliadis, Ioannis Sourdis | System and Network-on-Chip Platforms | |
| Villa, Francisco J. | 2006 |
On the Evaluation of Dense Chip-Multiprocessor Architectures | Francisco J. Villa, Manuel E. Acacio, Jose M. Garcia | Embedded Processors and Architectures | |
| Villa, Oreste | 2006 |
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa | System and Network-on-Chip Platforms | |
| Wang, Shuai | 2006 |
On the Characterization of Data Cache Vulnerability in High-Performance Embedded Microprocessors | Shuai Wang, Jie Hu, Sotirios G. Ziavras | Embedded Processors and Architectures | |
| Wen, Y. | 2006 |
SimGate: Full-System, Cycle-Close Simulation of the Stargate Sensor Network Intermediate Node | Y. Wen, S. Gurun, Chohan Navraj, R. Wolski, C. Krintz | High Level System Design and Simulation | |
| Wild, Thomas | 2006 |
Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications | Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf | System and Network-on-Chip Platforms | |
| Wolski, R. | 2006 |
SimGate: Full-System, Cycle-Close Simulation of the Stargate Sensor Network Intermediate Node | Y. Wen, S. Gurun, Chohan Navraj, R. Wolski, C. Krintz | High Level System Design and Simulation | |
| Ykman-Couvreur, Ch. | 2006 |
Pareto-Based Application Specification for MP-SoC Customized Run-Time Management | Ch. Ykman-Couvreur, V. Nollet, Théodore Marescaux, Erik Brockmeyer, Francky Catthoor, Henk Corporaal | Design Space Exploration (1) | |
| Ziavras, Sotirios G. | 2006 |
On the Characterization of Data Cache Vulnerability in High-Performance Embedded Microprocessors | Shuai Wang, Jie Hu, Sotirios G. Ziavras | Embedded Processors and Architectures | |
| Agarwal, Nainesh | 2007 |
Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction | Nainesh Agarwal, Nikitas J. Dimopoulos | Embedded Processors | |
| Alho, Timo | 2007 |
SensorOS: A New Operating System for Time Critical WSN Applications | Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Anderson, Willie | 2007 |
Software Is the Answer But What Is the Question? | Willie Anderson | SAMOS VII - Keynote | 2007-WS-01 |
| Ayguadé, Eduard | 2007 |
A Streaming Machine Description and Programming Model | Paul M. Carpenter, David Rodenas, Xavier Martorell, Alex Ramirez, Eduard Ayguadé | Scheduling & Programming Models | |
| Baek, Seungjae | 2007 |
Model and Validation of Block Cleaning Cost for Flash Memory | Seungjae Baek, Jongmoo Choi, Donghee Lee, Sam H. Noh | VLSI Architectures | |
| Batsuuri, Tseesuren | 2007 |
Power Efficient Co-simulation Framework for a Wireless Application Using Platform Based SoC | Tseesuren Batsuuri, Je-Hoon Lee, Kyoung-Rok Cho | SoC for SDR | |
| Benjamin, Michael G. | 2007 |
Stream Image Processing on a Dual-Core Embedded System | Michael G. Benjamin, David Kaeli | Multi-processor Architectures | |
| Berekovi?, Mladen | 2007 |
Design of 100 μW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring | Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovi?, Qin Zhao, Frank Bouwens, Jef Van Meerbergen | Wireless Sensors | |
| Bernard, Thomas A. M. | 2007 |
Strategies for Compiling μ TC to Novel Chip Multiprocessors | Thomas A. M. Bernard, Chris R. Jesshope, Peter M. W. Knijnenburg | Multi-processor Architectures | |
| Bertels, Koen | 2007 |
A Linear Complexity Algorithm for the Generation of Multiple Input Single Output Instructions of Variable Size | Carlo Galuzzi, Koen Bertels, Stamatis Vassiliadis | Embedded Processors | |
| Biest, Alexis Vander | 2007 |
A Framework Introducing Model Reversibility in SoC Design Space Exploration | Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frederic Robert | Design Space Exploration | |
| Bonzini, Paolo | 2007 |
A Study of Energy Saving in Customizable Processors | Paolo Bonzini, Dilek Harmanci, Laura Pozzi | Embedded Processors | |
| Boubekeur, Menouer | 2007 |
SC2SCFL: Automated SystemC to SystemCFL Translation | Ka Lok Man, Andrea Fedeli, Michele Mercaldi, Menouer Boubekeur, Michel Schellekens | System Modeling and Simulation | |
| Bougard, Bruno | 2007 |
Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals | Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor | SoC for SDR | |
| Bouwens, Frank | 2007 |
Design of 100 μW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring | Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovi?, Qin Zhao, Frank Bouwens, Jef Van Meerbergen | Wireless Sensors | |
| Calderón, Humberto | 2007 |
High-Bandwidth Address Generation Unit | Humberto Calderón, Carlo Galuzzi, Georgi N. Gaydadjiev, Stamatis Vassiliadis | Processor Components | |
| Carlomagno Filho, José O. | 2007 |
An Automatically-Retargetable Time-Constraint-Driven Instruction Scheduler for Post-compiling Optimization of Embedded Code | José O. Carlomagno Filho, Luiz F. P. Santos, Luiz C. V. dos Santos | Scheduling & Programming Models | |
| Carpenter, Paul M. | 2007 |
A Streaming Machine Description and Programming Model | Paul M. Carpenter, David Rodenas, Xavier Martorell, Alex Ramirez, Eduard Ayguadé | Scheduling & Programming Models | |
| Carvalho, Felipe G. | 2007 |
A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems | Max R. Schultz, Alexandre K. I. Mendonça, Felipe G. Carvalho, Olinto J. V. Furtado, Luiz C. V. Santos | System Modeling and Simulation | |
| Catthoor, Francky | 2007 |
Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals | Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor | SoC for SDR | |
| Chakrabarti, Chaitali | 2007 |
The Next Generation Challenge for Software Defined Radio | Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti, Krisztián Flautner | SoC for SDR | |
| Chen, Chao | 2007 |
VLSI Architecture for MRF Based Stereo Matching | Sungchan Park, Chao Chen, Hong Jeong | VLSI Architectures | |
| Cho, Kyoung-Rok | 2007 |
On-Chip Bus Modeling for Power and Performance Estimation | Je-Hoon Lee, Young-Shin Cho, Seok-Man Kim, Kyoung-Rok Cho | Design Space Exploration | |
| Cho, Kyoung-Rok | 2007 |
Power Efficient Co-simulation Framework for a Wireless Application Using Platform Based SoC | Tseesuren Batsuuri, Je-Hoon Lee, Kyoung-Rok Cho | SoC for SDR | |
| Cho, Young-Shin | 2007 |
On-Chip Bus Modeling for Power and Performance Estimation | Je-Hoon Lee, Young-Shin Cho, Seok-Man Kim, Kyoung-Rok Cho | Design Space Exploration | |
| Choi, Jongmoo | 2007 |
Model and Validation of Block Cleaning Cost for Flash Memory | Seungjae Baek, Jongmoo Choi, Donghee Lee, Sam H. Noh | VLSI Architectures | |
| Christiaens, Mark | 2007 |
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder | Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mark Christiaens, Dirk Stroobandt | Reconfigurable Architectures | |
| Corsonello, Pasquale | 2007 |
MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing | Marco Lanuzza, Stefania Perri, Pasquale Corsonello | Reconfigurable Architectures | |
| de Langen, Pepijn | 2007 |
Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors | Pepijn de Langen, Ben Juurlink | VLSI Architectures | |
| De Nil, Michael | 2007 |
Design of 100 μW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring | Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovi?, Qin Zhao, Frank Bouwens, Jef Van Meerbergen | Wireless Sensors | |
| Devos, Harald | 2007 |
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder | Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mark Christiaens, Dirk Stroobandt | Reconfigurable Architectures | |
| Dimopoulos, Nikitas J. | 2007 |
Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction | Nainesh Agarwal, Nikitas J. Dimopoulos | Embedded Processors | |
| dos Santos, Luiz C. V. | 2007 |
An Automatically-Retargetable Time-Constraint-Driven Instruction Scheduler for Post-compiling Optimization of Embedded Code | José O. Carlomagno Filho, Luiz F. P. Santos, Luiz C. V. dos Santos | Scheduling & Programming Models | |
| Dragomirescu, Daniela | 2007 |
System Architecture Modeling of an UWB Receiver for Wireless Sensor Network | Aubin Lecointre, Daniela Dragomirescu, Robert Plana | Wireless Sensors | |
| Eeckhaut, Hendrik | 2007 |
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder | Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mark Christiaens, Dirk Stroobandt | Reconfigurable Architectures | |
| Esser, Norbert | 2007 |
Improving TriMedia Cache Performance by Profile Guided Code Reordering | Norbert Esser, Renga Sundararajan, Joachim Trescher | Scheduling & Programming Models | |
| Faes, Philippe | 2007 |
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder | Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mark Christiaens, Dirk Stroobandt | Reconfigurable Architectures | |
| Fedeli, Andrea | 2007 |
SC2SCFL: Automated SystemC to SystemCFL Translation | Ka Lok Man, Andrea Fedeli, Michele Mercaldi, Menouer Boubekeur, Michel Schellekens | System Modeling and Simulation | |
| Fettweis, Gerhard | 2007 |
Mapping and Performance Evaluation for Heterogeneous MP-SoCs Via Packing | Bastian Ristau, Gerhard Fettweis | Multi-processor Architectures | |
| Flatt, Holger | 2007 |
A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing | Holger Flatt, Sebastian Hesselbarth, Sebastian Flügel, Peter Pirsch | Processor Components | |
| Flautner, Krisztián | 2007 |
The Next Generation Challenge for Software Defined Radio | Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti, Krisztián Flautner | SoC for SDR | |
| Flügel, Sebastian | 2007 |
A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing | Holger Flatt, Sebastian Hesselbarth, Sebastian Flügel, Peter Pirsch | Processor Components | |
| Furtado, Olinto J. V. | 2007 |
A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems | Max R. Schultz, Alexandre K. I. Mendonça, Felipe G. Carvalho, Olinto J. V. Furtado, Luiz C. V. Santos | System Modeling and Simulation | |
| Galuzzi, Carlo | 2007 |
High-Bandwidth Address Generation Unit | Humberto Calderón, Carlo Galuzzi, Georgi N. Gaydadjiev, Stamatis Vassiliadis | Processor Components | |
| Galuzzi, Carlo | 2007 |
A Linear Complexity Algorithm for the Generation of Multiple Input Single Output Instructions of Variable Size | Carlo Galuzzi, Koen Bertels, Stamatis Vassiliadis | Embedded Processors | |
| Gaydadjiev, Georgi N. | 2007 |
High-Bandwidth Address Generation Unit | Humberto Calderón, Carlo Galuzzi, Georgi N. Gaydadjiev, Stamatis Vassiliadis | Processor Components | |
| Glossner, John | 2007 |
Trends in Low Power Handset Software Defined Radio | John Glossner, Daniel Iancu, Mayan Moudgill, Michael Schulte, Stamatis Vassiliadis | SoC for SDR | |
| Gupta, Rajesh | 2007 |
An Embedded Platform with Duty-Cycled Radio and Processing Subsystems for Wireless Sensor Networks | Zhong-Yi Jin, Curt Schurgers, Rajesh Gupta | Wireless Sensors | |
| Guzma, Vladimír | 2007 |
Resource Conflict Detection in Simulation of Function Unit Pipelines | Pekka Jääskeläinen, Vladimír Guzma, Jarmo Takala | Processor Components | |
| Ha, Soonhoi | 2007 |
Communication Architecture Simulation on the Virtual Synchronization Framework | Taewook Oh, Youngmin Yi, Soonhoi Ha | System Modeling and Simulation | |
| Hämäläinen, Panu | 2007 |
Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks | Panu Hämäläinen, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Hämäläinen, Timo D. | 2007 |
Evaluating Large System-on-Chip on Multi-FPGA Platform | Ari Kulmala, Erno Salminen, Timo D. Hämäläinen | Reconfigurable Architectures | |
| Hämäläinen, Timo D. | 2007 |
Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network | Mauri Kuorilehto, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Hämäläinen, Timo D. | 2007 |
SensorOS: A New Operating System for Time Critical WSN Applications | Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Hämäläinen, Timo D. | 2007 |
Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks | Panu Hämäläinen, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Hännikäinen, Marko | 2007 |
Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network | Mauri Kuorilehto, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Hännikäinen, Marko | 2007 |
SensorOS: A New Operating System for Time Critical WSN Applications | Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Hännikäinen, Marko | 2007 |
Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks | Panu Hämäläinen, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Harmanci, Dilek | 2007 |
A Study of Energy Saving in Customizable Processors | Paolo Bonzini, Dilek Harmanci, Laura Pozzi | Embedded Processors | |
| Hesselbarth, Sebastian | 2007 |
A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing | Holger Flatt, Sebastian Hesselbarth, Sebastian Flügel, Peter Pirsch | Processor Components | |
| Huisken, Jos | 2007 |
Integrating VLIW Processors with a Network on Chip | Jos Huisken | SAMOS VII - Keynote | 2007-WS-02 |
| Huisken, Jos | 2007 |
Design of 100 μW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring | Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovi?, Qin Zhao, Frank Bouwens, Jef Van Meerbergen | Wireless Sensors | |
| Iancu, Daniel | 2007 |
Trends in Low Power Handset Software Defined Radio | John Glossner, Daniel Iancu, Mayan Moudgill, Michael Schulte, Stamatis Vassiliadis | SoC for SDR | |
| Jääskeläinen, Pekka | 2007 |
Resource Conflict Detection in Simulation of Function Unit Pipelines | Pekka Jääskeläinen, Vladimír Guzma, Jarmo Takala | Processor Components | |
| Jacobs, Jan W. M. | 2007 |
Image Quantisation on a Massively Parallel Embedded Processor | Jan W. M. Jacobs, Leroy van Engelen, Jan Kuper, Gerard J. M. Smit | Multi-processor Architectures | |
| Jeong, Hong | 2007 |
VLSI Architecture for MRF Based Stereo Matching | Sungchan Park, Chao Chen, Hong Jeong | VLSI Architectures | |
| Jeschke, Hartwig | 2007 |
Efficiency Measures for Multimedia SOCs | Hartwig Jeschke | Design Space Exploration | |
| Jesshope, Chris R. | 2007 |
Strategies for Compiling μ TC to Novel Chip Multiprocessors | Thomas A. M. Bernard, Chris R. Jesshope, Peter M. W. Knijnenburg | Multi-processor Architectures | |
| Jin, Zhong-Yi | 2007 |
An Embedded Platform with Duty-Cycled Radio and Processing Subsystems for Wireless Sensor Networks | Zhong-Yi Jin, Curt Schurgers, Rajesh Gupta | Wireless Sensors | |
| Juurlink, Ben | 2007 |
Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors | Pepijn de Langen, Ben Juurlink | VLSI Architectures | |
| Kaeli, David | 2007 |
Stream Image Processing on a Dual-Core Embedded System | Michael G. Benjamin, David Kaeli | Multi-processor Architectures | |
| Khan, Md. Zafar Ali | 2007 |
A Comparative Study of Different FFT Architectures for Software Defined Radio | Shashank Mittal, Md. Zafar Ali Khan, M. B. Srinivas | SoC for SDR | |
| Kim, Seok-Man | 2007 |
On-Chip Bus Modeling for Power and Performance Estimation | Je-Hoon Lee, Young-Shin Cho, Seok-Man Kim, Kyoung-Rok Cho | Design Space Exploration | |
| Knijnenburg, Peter M. W. | 2007 |
Strategies for Compiling μ TC to Novel Chip Multiprocessors | Thomas A. M. Bernard, Chris R. Jesshope, Peter M. W. Knijnenburg | Multi-processor Architectures | |
| Ko, Young-Bae | 2007 |
k+ Neigh: An Energy Efficient Topology Control for Wireless Sensor Networks | Dong-Min Son, Young-Bae Ko | Wireless Sensors | |
| Kulmala, Ari | 2007 |
Evaluating Large System-on-Chip on Multi-FPGA Platform | Ari Kulmala, Erno Salminen, Timo D. Hämäläinen | Reconfigurable Architectures | |
| Kuorilehto, Mauri | 2007 |
Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network | Mauri Kuorilehto, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Kuorilehto, Mauri | 2007 |
SensorOS: A New Operating System for Time Critical WSN Applications | Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Kuper, Jan | 2007 |
Image Quantisation on a Massively Parallel Embedded Processor | Jan W. M. Jacobs, Leroy van Engelen, Jan Kuper, Gerard J. M. Smit | Multi-processor Architectures | |
| Lanuzza, Marco | 2007 |
MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing | Marco Lanuzza, Stefania Perri, Pasquale Corsonello | Reconfigurable Architectures | |
| Lecointre, Aubin | 2007 |
System Architecture Modeling of an UWB Receiver for Wireless Sensor Network | Aubin Lecointre, Daniela Dragomirescu, Robert Plana | Wireless Sensors | |
| Lee, Chia-han | 2007 |
Design Methodology for Software Radio Systems | Chia-han Lee, Wayne Wolf | SoC for SDR | |
| Lee, Donghee | 2007 |
Model and Validation of Block Cleaning Cost for Flash Memory | Seungjae Baek, Jongmoo Choi, Donghee Lee, Sam H. Noh | VLSI Architectures | |
| Lee, Hyunseok | 2007 |
The Next Generation Challenge for Software Defined Radio | Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti, Krisztián Flautner | SoC for SDR | |
| Lee, Je-Hoon | 2007 |
On-Chip Bus Modeling for Power and Performance Estimation | Je-Hoon Lee, Young-Shin Cho, Seok-Man Kim, Kyoung-Rok Cho | Design Space Exploration | |
| Lee, Je-Hoon | 2007 |
Power Efficient Co-simulation Framework for a Wireless Application Using Platform Based SoC | Tseesuren Batsuuri, Je-Hoon Lee, Kyoung-Rok Cho | SoC for SDR | |
| Lin, Yuan | 2007 |
The Next Generation Challenge for Software Defined Radio | Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti, Krisztián Flautner | SoC for SDR | |
| Liu, Dake | 2007 |
Area Efficient Fully Programmable Baseband Processors | Anders Nilsson, Dake Liu | SoC for SDR | |
| Mahlke, Scott | 2007 |
The Next Generation Challenge for Software Defined Radio | Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti, Krisztián Flautner | SoC for SDR | |
| Mäkinen, Risto | 2007 |
Parallel Memory Architecture for TTA Processor | Jarno K. Tanskanen, Teemu Pitkänen, Risto Mäkinen, Jarmo Takala | Embedded Processors | |
| Man, Ka Lok | 2007 |
SC2SCFL: Automated SystemC to SystemCFL Translation | Ka Lok Man, Andrea Fedeli, Michele Mercaldi, Menouer Boubekeur, Michel Schellekens | System Modeling and Simulation | |
| Martorell, Xavier | 2007 |
A Streaming Machine Description and Programming Model | Paul M. Carpenter, David Rodenas, Xavier Martorell, Alex Ramirez, Eduard Ayguadé | Scheduling & Programming Models | |
| Mendonça, Alexandre K. I. | 2007 |
A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems | Max R. Schultz, Alexandre K. I. Mendonça, Felipe G. Carvalho, Olinto J. V. Furtado, Luiz C. V. Santos | System Modeling and Simulation | |
| Mercaldi, Michele | 2007 |
SC2SCFL: Automated SystemC to SystemCFL Translation | Ka Lok Man, Andrea Fedeli, Michele Mercaldi, Menouer Boubekeur, Michel Schellekens | System Modeling and Simulation | |
| Milojevic, Dragomir | 2007 |
A Framework Introducing Model Reversibility in SoC Design Space Exploration | Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frederic Robert | Design Space Exploration | |
| Mische, Jörg | 2007 |
An IP Core for Embedded Java Systems | Sascha Uhrig, Jörg Mische, Theo Ungerer | Processor Components | |
| Mittal, Shashank | 2007 |
A Comparative Study of Different FFT Architectures for Software Defined Radio | Shashank Mittal, Md. Zafar Ali Khan, M. B. Srinivas | SoC for SDR | |
| Moudgill, Mayan | 2007 |
Trends in Low Power Handset Software Defined Radio | John Glossner, Daniel Iancu, Mayan Moudgill, Michael Schulte, Stamatis Vassiliadis | SoC for SDR | |
| Mudge, Trevor | 2007 |
The Next Generation Challenge for Software Defined Radio | Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti, Krisztián Flautner | SoC for SDR | |
| Nilsson, Anders | 2007 |
Area Efficient Fully Programmable Baseband Processors | Anders Nilsson, Dake Liu | SoC for SDR | |
| Noh, Sam H. | 2007 |
Model and Validation of Block Cleaning Cost for Flash Memory | Seungjae Baek, Jongmoo Choi, Donghee Lee, Sam H. Noh | VLSI Architectures | |
| Novo, David | 2007 |
Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals | Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor | SoC for SDR | |
| Oh, Taewook | 2007 |
Communication Architecture Simulation on the Virtual Synchronization Framework | Taewook Oh, Youngmin Yi, Soonhoi Ha | System Modeling and Simulation | |
| Park, Sangsoo | 2007 |
Performance Evaluation of Memory Management Configurations in Linux for an OS-Level Design Space Exploration | Sangsoo Park, Heonshik Shin | System Modeling and Simulation | |
| Park, Sungchan | 2007 |
VLSI Architecture for MRF Based Stereo Matching | Sungchan Park, Chao Chen, Hong Jeong | VLSI Architectures | |
| Partanen, Tero | 2007 |
Low-Power Twiddle Factor Unit for FFT Computation | Teemu Pitkänen, Tero Partanen, Jarmo Takala | VLSI Architectures | |
| Perri, Stefania | 2007 |
MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing | Marco Lanuzza, Stefania Perri, Pasquale Corsonello | Reconfigurable Architectures | |
| Pimentel, Andy D. | 2007 |
Towards Multi-application Workload Modeling in Sesame for System-Level Design Space Exploration | Mark Thompson, Andy D. Pimentel | Design Space Exploration | |
| Pirsch, Peter | 2007 |
A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing | Holger Flatt, Sebastian Hesselbarth, Sebastian Flügel, Peter Pirsch | Processor Components | |
| Pitkänen, Teemu | 2007 |
Parallel Memory Architecture for TTA Processor | Jarno K. Tanskanen, Teemu Pitkänen, Risto Mäkinen, Jarmo Takala | Embedded Processors | |
| Pitkänen, Teemu | 2007 |
Low-Power Twiddle Factor Unit for FFT Computation | Teemu Pitkänen, Tero Partanen, Jarmo Takala | VLSI Architectures | |
| Plana, Robert | 2007 |
System Architecture Modeling of an UWB Receiver for Wireless Sensor Network | Aubin Lecointre, Daniela Dragomirescu, Robert Plana | Wireless Sensors | |
| Pozzi, Laura | 2007 |
A Study of Energy Saving in Customizable Processors | Paolo Bonzini, Dilek Harmanci, Laura Pozzi | Embedded Processors | |
| Priewasser, Robert | 2007 |
Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals | Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor | SoC for SDR | |
| Raghavan, Praveen | 2007 |
Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals | Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor | SoC for SDR | |
| Ramirez, Alex | 2007 |
A Streaming Machine Description and Programming Model | Paul M. Carpenter, David Rodenas, Xavier Martorell, Alex Ramirez, Eduard Ayguadé | Scheduling & Programming Models | |
| Richard, Alienor | 2007 |
A Framework Introducing Model Reversibility in SoC Design Space Exploration | Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frederic Robert | Design Space Exploration | |
| Ristau, Bastian | 2007 |
Mapping and Performance Evaluation for Heterogeneous MP-SoCs Via Packing | Bastian Ristau, Gerhard Fettweis | Multi-processor Architectures | |
| Robert, Frederic | 2007 |
A Framework Introducing Model Reversibility in SoC Design Space Exploration | Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frederic Robert | Design Space Exploration | |
| Rodenas, David | 2007 |
A Streaming Machine Description and Programming Model | Paul M. Carpenter, David Rodenas, Xavier Martorell, Alex Ramirez, Eduard Ayguadé | Scheduling & Programming Models | |
| Salminen, Erno | 2007 |
Evaluating Large System-on-Chip on Multi-FPGA Platform | Ari Kulmala, Erno Salminen, Timo D. Hämäläinen | Reconfigurable Architectures | |
| Santos, Luiz C. V. | 2007 |
A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems | Max R. Schultz, Alexandre K. I. Mendonça, Felipe G. Carvalho, Olinto J. V. Furtado, Luiz C. V. Santos | System Modeling and Simulation | |
| Santos, Luiz F. P. | 2007 |
An Automatically-Retargetable Time-Constraint-Driven Instruction Scheduler for Post-compiling Optimization of Embedded Code | José O. Carlomagno Filho, Luiz F. P. Santos, Luiz C. V. dos Santos | Scheduling & Programming Models | |
| Schellekens, Michel | 2007 |
SC2SCFL: Automated SystemC to SystemCFL Translation | Ka Lok Man, Andrea Fedeli, Michele Mercaldi, Menouer Boubekeur, Michel Schellekens | System Modeling and Simulation | |
| Schulte, Michael | 2007 |
Trends in Low Power Handset Software Defined Radio | John Glossner, Daniel Iancu, Mayan Moudgill, Michael Schulte, Stamatis Vassiliadis | SoC for SDR | |
| Schultz, Max R. | 2007 |
A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems | Max R. Schultz, Alexandre K. I. Mendonça, Felipe G. Carvalho, Olinto J. V. Furtado, Luiz C. V. Santos | System Modeling and Simulation | |
| Schurgers, Curt | 2007 |
An Embedded Platform with Duty-Cycled Radio and Processing Subsystems for Wireless Sensor Networks | Zhong-Yi Jin, Curt Schurgers, Rajesh Gupta | Wireless Sensors | |
| Schuster, Thomas | 2007 |
Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals | Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor | SoC for SDR | |
| Seo, Sangwon | 2007 |
The Next Generation Challenge for Software Defined Radio | Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti, Krisztián Flautner | SoC for SDR | |
| Shin, Heonshik | 2007 |
Performance Evaluation of Memory Management Configurations in Linux for an OS-Level Design Space Exploration | Sangsoo Park, Heonshik Shin | System Modeling and Simulation | |
| Smit, Gerard J. M. | 2007 |
Image Quantisation on a Massively Parallel Embedded Processor | Jan W. M. Jacobs, Leroy van Engelen, Jan Kuper, Gerard J. M. Smit | Multi-processor Architectures | |
| Son, Dong-Min | 2007 |
k+ Neigh: An Energy Efficient Topology Control for Wireless Sensor Networks | Dong-Min Son, Young-Bae Ko | Wireless Sensors | |
| Srinivas, M. B. | 2007 |
A Comparative Study of Different FFT Architectures for Software Defined Radio | Shashank Mittal, Md. Zafar Ali Khan, M. B. Srinivas | SoC for SDR | |
| Stroobandt, Dirk | 2007 |
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder | Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mark Christiaens, Dirk Stroobandt | Reconfigurable Architectures | |
| Suhonen, Jukka | 2007 |
Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network | Mauri Kuorilehto, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen | Wireless Sensors | |
| Sundararajan, Renga | 2007 |
Improving TriMedia Cache Performance by Profile Guided Code Reordering | Norbert Esser, Renga Sundararajan, Joachim Trescher | Scheduling & Programming Models | |
| Takala, Jarmo | 2007 |
Resource Conflict Detection in Simulation of Function Unit Pipelines | Pekka Jääskeläinen, Vladimír Guzma, Jarmo Takala | Processor Components | |
| Takala, Jarmo | 2007 |
Parallel Memory Architecture for TTA Processor | Jarno K. Tanskanen, Teemu Pitkänen, Risto Mäkinen, Jarmo Takala | Embedded Processors | |
| Takala, Jarmo | 2007 |
Low-Power Twiddle Factor Unit for FFT Computation | Teemu Pitkänen, Tero Partanen, Jarmo Takala | VLSI Architectures | |
| Tanskanen, Jarno K. | 2007 |
Parallel Memory Architecture for TTA Processor | Jarno K. Tanskanen, Teemu Pitkänen, Risto Mäkinen, Jarmo Takala | Embedded Processors | |
| Thompson, Mark | 2007 |
Towards Multi-application Workload Modeling in Sesame for System-Level Design Space Exploration | Mark Thompson, Andy D. Pimentel | Design Space Exploration | |
| Trescher, Joachim | 2007 |
Improving TriMedia Cache Performance by Profile Guided Code Reordering | Norbert Esser, Renga Sundararajan, Joachim Trescher | Scheduling & Programming Models | |
| Uhrig, Sascha | 2007 |
An IP Core for Embedded Java Systems | Sascha Uhrig, Jörg Mische, Theo Ungerer | Processor Components | |
| Ungerer, Theo | 2007 |
An IP Core for Embedded Java Systems | Sascha Uhrig, Jörg Mische, Theo Ungerer | Processor Components | |
| Van der Perre, Liesbet | 2007 |
Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals | Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor | SoC for SDR | |
| van Engelen, Leroy | 2007 |
Image Quantisation on a Massively Parallel Embedded Processor | Jan W. M. Jacobs, Leroy van Engelen, Jan Kuper, Gerard J. M. Smit | Multi-processor Architectures | |
| Van Meerbergen, Jef | 2007 |
Design of 100 μW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring | Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovi?, Qin Zhao, Frank Bouwens, Jef Van Meerbergen | Wireless Sensors | |
| Vassiliadis, Stamatis | 2007 |
High-Bandwidth Address Generation Unit | Humberto Calderón, Carlo Galuzzi, Georgi N. Gaydadjiev, Stamatis Vassiliadis | Processor Components | |
| Vassiliadis, Stamatis | 2007 |
A Linear Complexity Algorithm for the Generation of Multiple Input Single Output Instructions of Variable Size | Carlo Galuzzi, Koen Bertels, Stamatis Vassiliadis | Embedded Processors | |
| Vassiliadis, Stamatis | 2007 |
Trends in Low Power Handset Software Defined Radio | John Glossner, Daniel Iancu, Mayan Moudgill, Michael Schulte, Stamatis Vassiliadis | SoC for SDR | |
| Woh, Mark | 2007 |
The Next Generation Challenge for Software Defined Radio | Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti, Krisztián Flautner | SoC for SDR | |
| Wolf, Wayne | 2007 |
Design Methodology for Software Radio Systems | Chia-han Lee, Wayne Wolf | SoC for SDR | |
| Yi, Youngmin | 2007 |
Communication Architecture Simulation on the Virtual Synchronization Framework | Taewook Oh, Youngmin Yi, Soonhoi Ha | System Modeling and Simulation | |
| Yseboodt, Lennart | 2007 |
Design of 100 μW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring | Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovi?, Qin Zhao, Frank Bouwens, Jef Van Meerbergen | Wireless Sensors | |
| Zhao, Qin | 2007 |
Design of 100 μW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring | Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovi?, Qin Zhao, Frank Bouwens, Jef Van Meerbergen | Wireless Sensors | |
| Badel, S. | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Baloukas, C. | 2007 |
Systematic Data Structure Exploration of Multimedia and Network Applications realized Embedded Systems | L. Papadopoulos, C. Baloukas, N. Zompakis, Dimitrios Soudris | Design Space Exploration | |
| Batina, L. | 2007 |
A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications | N. Mentens, K. Sakiyama, L. Batina, B. Preneel, I. Verbauwhede | Cryptography | |
| Benoit, Pascal | 2007 |
Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems | N. Saint-Jean, Pascal Benoit, Gilles Sassatelli, L. Torres, Michel Robert | Multiprocessor Architectures | |
| Bjork, M. | 2007 |
FlexCore: Utilizing Exposed Datapath Control for Effcient Computing | M. Thuresson, M. Sjalander, M. Bjork, L. Svensson, P. Larsson-Edefors, Per Stenstrom | Processor Architectures | |
| Blume, Holger | 2007 |
Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform | Holger Blume, J.v. Livonius, L. Rotenberg, Tobias G. Noll, H. Bothe, Jörg Brakensiek | Multiprocessor Architectures | |
| Borodin, Demid | 2007 |
Instruction-Level Fault Tolerance Configurability | Demid Borodin, Ben Juurlink, Stamatis Vassiliadis | Systems and Applications | |
| Bothe, H. | 2007 |
Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform | Holger Blume, J.v. Livonius, L. Rotenberg, Tobias G. Noll, H. Bothe, Jörg Brakensiek | Multiprocessor Architectures | |
| Brakensiek, Jörg | 2007 |
Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform | Holger Blume, J.v. Livonius, L. Rotenberg, Tobias G. Noll, H. Bothe, Jörg Brakensiek | Multiprocessor Architectures | |
| Branca, M. | 2007 |
An Interrupt Controller for FPGA-based Multiprocessors | Antonino Tumeo, M. Branca, L. Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto | Multiprocessor Architectures | |
| Camerini, L. | 2007 |
An Interrupt Controller for FPGA-based Multiprocessors | Antonino Tumeo, M. Branca, L. Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto | Multiprocessor Architectures | |
| Cazorla, F.J. | 2007 |
On the Problem of Minimizing Workload Execution Time in SMT processors | F.J. Cazorla, Peter M. W. Knijnenburg, R. Sakellariou, E. Fernandez, Alex Ramirez, Mateo Valero | Multiprocessor Architectures | |
| Cazorla, F.J. | 2007 |
Online Prediction of Applications Cache Utility | M. Moreto, F.J. Cazorla, Alex Ramirez, Mateo Valero | Memory Architectures and Memory Optimization | |
| Cuenca, S. | 2007 |
A Hardware/Software Architecture for Tool Path Computation. An Application to Turning Lathe Machining | S. Cuenca, A. Martinez, A. Jimeno, J.L. Sanchez | Systems and Applications | |
| Dimopoulos, V. | 2007 |
A Memory-Effcient Reconfigurable Aho-Corasick FSM Implementation for Intrusion Detection Systems | V. Dimopoulos, I. Papaefstathiou, D. Pnevmatikatos | Memory Architectures and Memory Optimization | |
| Economakos, George | 2007 |
Flexibility Inlining into Arithmetic Data-paths Exploiting A Regular Interconnection Scheme | S. Xydis, George Economakos, Kiamal Pekmestzi | Reconfigurable Architectures | |
| Eisenbarth, T. | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Fernandez, E. | 2007 |
On the Problem of Minimizing Workload Execution Time in SMT processors | F.J. Cazorla, Peter M. W. Knijnenburg, R. Sakellariou, E. Fernandez, Alex Ramirez, Mateo Valero | Multiprocessor Architectures | |
| Ferrandi, Fabrizio | 2007 |
An Interrupt Controller for FPGA-based Multiprocessors | Antonino Tumeo, M. Branca, L. Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto | Multiprocessor Architectures | |
| Ferrandi, Fabrizio | 2007 |
An Evolutionary Approach to Area-Time Optimization of FPGA designs | Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Palermo, Christian Pilato, Donatella Sciuto, Antonino Tumeo | Reconfigurable Architectures | |
| Ganghee, Lee | 2007 |
Automatic Bus Matrix Synthesis based on Hardware Interface Selection for Fast Communication Design Space Exploration | Lee Ganghee, Lee Seokhyun, Ahn Yongjin, Choi Kiyoung | Design Space Exploration | |
| Garbinato, B. | 2007 |
The Weight-Watcher Service and its Lightweight Implementation | B. Garbinato, R. Guerraoui, J. Hulaas, A. Kounine, M. Monod, J.H. Spring | Systems and Applications | |
| Großschädl, Johann | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Guerraoui, R. | 2007 |
The Weight-Watcher Service and its Lightweight Implementation | B. Garbinato, R. Guerraoui, J. Hulaas, A. Kounine, M. Monod, J.H. Spring | Systems and Applications | |
| Haubelt, Christian | 2007 |
Simulative Buffer Analysis of Local Image Processing Algorithms Described by Windowed Synchronous Data Flow | J. Keinert, Christian Haubelt, Jürgen Teich | Memory Architectures and Memory Optimization | |
| Herruzo, E. | 2007 |
Maximum and Sorted Cache Occupation Using Array Padding | E. Herruzo, E.L. Zapata, O. Plata | Memory Architectures and Memory Optimization | |
| Hulaas, J. | 2007 |
The Weight-Watcher Service and its Lightweight Implementation | B. Garbinato, R. Guerraoui, J. Hulaas, A. Kounine, M. Monod, J.H. Spring | Systems and Applications | |
| Ienne, Paolo | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Ioannou, A. | 2007 |
Prototyping Effcient Interprocessor Communication Mechanisms | V. Papaefstathiou, D. Pnevmatikatos, M. Marazakis, G. Kalokairinos, A. Ioannou, M. Papamichael, S. Kavadias, G. Mihelogiannakis, Manolis G.H. Katevenis | Processor Architectures | |
| Jimeno, A. | 2007 |
A Hardware/Software Architecture for Tool Path Computation. An Application to Turning Lathe Machining | S. Cuenca, A. Martinez, A. Jimeno, J.L. Sanchez | Systems and Applications | |
| Juurlink, Ben | 2007 |
Instruction-Level Fault Tolerance Configurability | Demid Borodin, Ben Juurlink, Stamatis Vassiliadis | Systems and Applications | |
| Kachris, Christoforos | 2007 |
Design Space Exploration of Configuration Manager for Network Processing Applications | Christoforos Kachris, Stamatis Vassiliadis | Design Space Exploration | |
| Kalokairinos, G. | 2007 |
Prototyping Effcient Interprocessor Communication Mechanisms | V. Papaefstathiou, D. Pnevmatikatos, M. Marazakis, G. Kalokairinos, A. Ioannou, M. Papamichael, S. Kavadias, G. Mihelogiannakis, Manolis G.H. Katevenis | Processor Architectures | |
| Katevenis, Manolis G.H. | 2007 |
Prototyping Effcient Interprocessor Communication Mechanisms | V. Papaefstathiou, D. Pnevmatikatos, M. Marazakis, G. Kalokairinos, A. Ioannou, M. Papamichael, S. Kavadias, G. Mihelogiannakis, Manolis G.H. Katevenis | Processor Architectures | |
| Kaufmann, A. | 2007 |
Applying Data Mapping Techniques to Vector DSPs | Peter Westermann, L. Schwoerer, A. Kaufmann | Processor Architectures | |
| Kavadias, S. | 2007 |
Prototyping Effcient Interprocessor Communication Mechanisms | V. Papaefstathiou, D. Pnevmatikatos, M. Marazakis, G. Kalokairinos, A. Ioannou, M. Papamichael, S. Kavadias, G. Mihelogiannakis, Manolis G.H. Katevenis | Processor Architectures | |
| Kehuai, Wu | 2007 |
COSMOS: A System-Level Modelling and Simulation Framework for Coprocessor-Coupled Reconfigurable Systems | Wu Kehuai, J. Madsen | Reconfigurable Architectures | |
| Keinert, J. | 2007 |
Simulative Buffer Analysis of Local Image Processing Algorithms Described by Windowed Synchronous Data Flow | J. Keinert, Christian Haubelt, Jürgen Teich | Memory Architectures and Memory Optimization | |
| Kiyoung, Choi | 2007 |
Automatic Bus Matrix Synthesis based on Hardware Interface Selection for Fast Communication Design Space Exploration | Lee Ganghee, Lee Seokhyun, Ahn Yongjin, Choi Kiyoung | Design Space Exploration | |
| Knijnenburg, Peter M. W. | 2007 |
On the Problem of Minimizing Workload Execution Time in SMT processors | F.J. Cazorla, Peter M. W. Knijnenburg, R. Sakellariou, E. Fernandez, Alex Ramirez, Mateo Valero | Multiprocessor Architectures | |
| Kounine, A. | 2007 |
The Weight-Watcher Service and its Lightweight Implementation | B. Garbinato, R. Guerraoui, J. Hulaas, A. Kounine, M. Monod, J.H. Spring | Systems and Applications | |
| Krall, A. | 2007 |
Instruction Set Encoding Optimization for Code Size Reduction | M. Med, A. Krall | Processor Architectures | |
| Lanzi, Pier Luca | 2007 |
An Evolutionary Approach to Area-Time Optimization of FPGA designs | Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Palermo, Christian Pilato, Donatella Sciuto, Antonino Tumeo | Reconfigurable Architectures | |
| Larsson-Edefors, P. | 2007 |
FlexCore: Utilizing Exposed Datapath Control for Effcient Computing | M. Thuresson, M. Sjalander, M. Bjork, L. Svensson, P. Larsson-Edefors, Per Stenstrom | Processor Architectures | |
| Leblebici, Y. | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Livonius, J.v. | 2007 |
Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform | Holger Blume, J.v. Livonius, L. Rotenberg, Tobias G. Noll, H. Bothe, Jörg Brakensiek | Multiprocessor Architectures | |
| Macchetti, M. | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Madsen, J. | 2007 |
COSMOS: A System-Level Modelling and Simulation Framework for Coprocessor-Coupled Reconfigurable Systems | Wu Kehuai, J. Madsen | Reconfigurable Architectures | |
| Marazakis, M. | 2007 |
Prototyping Effcient Interprocessor Communication Mechanisms | V. Papaefstathiou, D. Pnevmatikatos, M. Marazakis, G. Kalokairinos, A. Ioannou, M. Papamichael, S. Kavadias, G. Mihelogiannakis, Manolis G.H. Katevenis | Processor Architectures | |
| Martin-Langerwerf, J. | 2007 |
Design Space Exploration of Media Processors: A Parameterized Scheduler | Guillermo Payá Vayá, J. Martin-Langerwerf, P. Taptimthong, Peter Pirsch | Design Space Exploration | |
| Martinez, A. | 2007 |
A Hardware/Software Architecture for Tool Path Computation. An Application to Turning Lathe Machining | S. Cuenca, A. Martinez, A. Jimeno, J.L. Sanchez | Systems and Applications | |
| Med, M. | 2007 |
Instruction Set Encoding Optimization for Code Size Reduction | M. Med, A. Krall | Processor Architectures | |
| Mentens, N. | 2007 |
A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications | N. Mentens, K. Sakiyama, L. Batina, B. Preneel, I. Verbauwhede | Cryptography | |
| Mihelogiannakis, G. | 2007 |
Prototyping Effcient Interprocessor Communication Mechanisms | V. Papaefstathiou, D. Pnevmatikatos, M. Marazakis, G. Kalokairinos, A. Ioannou, M. Papamichael, S. Kavadias, G. Mihelogiannakis, Manolis G.H. Katevenis | Processor Architectures | |
| Monchiero, Matteo | 2007 |
An Interrupt Controller for FPGA-based Multiprocessors | Antonino Tumeo, M. Branca, L. Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto | Multiprocessor Architectures | |
| Monod, M. | 2007 |
The Weight-Watcher Service and its Lightweight Implementation | B. Garbinato, R. Guerraoui, J. Hulaas, A. Kounine, M. Monod, J.H. Spring | Systems and Applications | |
| Moreto, M. | 2007 |
Online Prediction of Applications Cache Utility | M. Moreto, F.J. Cazorla, Alex Ramirez, Mateo Valero | Memory Architectures and Memory Optimization | |
| Muhlbach, S. | 2007 |
Secure and Authenticated Communication in Chip-Level Microcomputer Bus Systems with Tree Parity Machines | S. Muhlbach, S. Wallner | Cryptography | |
| Nikolaidis, S. | 2007 |
The ARISE Reconfigurable Instruction Set Extensions Framework | N. Vassiliadis, G. Theodoridis, S. Nikolaidis | Reconfigurable Architectures | |
| Noll, Tobias G. | 2007 |
Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform | Holger Blume, J.v. Livonius, L. Rotenberg, Tobias G. Noll, H. Bothe, Jörg Brakensiek | Multiprocessor Architectures | |
| Paar, C. | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Palermo, Gianluca | 2007 |
An Interrupt Controller for FPGA-based Multiprocessors | Antonino Tumeo, M. Branca, L. Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto | Multiprocessor Architectures | |
| Palermo, Gianluca | 2007 |
An Evolutionary Approach to Area-Time Optimization of FPGA designs | Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Palermo, Christian Pilato, Donatella Sciuto, Antonino Tumeo | Reconfigurable Architectures | |
| Papadopoulos, L. | 2007 |
Systematic Data Structure Exploration of Multimedia and Network Applications realized Embedded Systems | L. Papadopoulos, C. Baloukas, N. Zompakis, Dimitrios Soudris | Design Space Exploration | |
| Papaefstathiou, I. | 2007 |
A Memory-Effcient Reconfigurable Aho-Corasick FSM Implementation for Intrusion Detection Systems | V. Dimopoulos, I. Papaefstathiou, D. Pnevmatikatos | Memory Architectures and Memory Optimization | |
| Papaefstathiou, V. | 2007 |
Prototyping Effcient Interprocessor Communication Mechanisms | V. Papaefstathiou, D. Pnevmatikatos, M. Marazakis, G. Kalokairinos, A. Ioannou, M. Papamichael, S. Kavadias, G. Mihelogiannakis, Manolis G.H. Katevenis | Processor Architectures | |
| Papamichael, M. | 2007 |
Prototyping Effcient Interprocessor Communication Mechanisms | V. Papaefstathiou, D. Pnevmatikatos, M. Marazakis, G. Kalokairinos, A. Ioannou, M. Papamichael, S. Kavadias, G. Mihelogiannakis, Manolis G.H. Katevenis | Processor Architectures | |
| Payá Vayá, Guillermo | 2007 |
Design Space Exploration of Media Processors: A Parameterized Scheduler | Guillermo Payá Vayá, J. Martin-Langerwerf, P. Taptimthong, Peter Pirsch | Design Space Exploration | |
| Pekmestzi, Kiamal | 2007 |
Flexibility Inlining into Arithmetic Data-paths Exploiting A Regular Interconnection Scheme | S. Xydis, George Economakos, Kiamal Pekmestzi | Reconfigurable Architectures | |
| Pilato, Christian | 2007 |
An Evolutionary Approach to Area-Time Optimization of FPGA designs | Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Palermo, Christian Pilato, Donatella Sciuto, Antonino Tumeo | Reconfigurable Architectures | |
| Pirsch, Peter | 2007 |
Design Space Exploration of Media Processors: A Parameterized Scheduler | Guillermo Payá Vayá, J. Martin-Langerwerf, P. Taptimthong, Peter Pirsch | Design Space Exploration | |
| Plata, O. | 2007 |
Maximum and Sorted Cache Occupation Using Array Padding | E. Herruzo, E.L. Zapata, O. Plata | Memory Architectures and Memory Optimization | |
| Pnevmatikatos, D. | 2007 |
Prototyping Effcient Interprocessor Communication Mechanisms | V. Papaefstathiou, D. Pnevmatikatos, M. Marazakis, G. Kalokairinos, A. Ioannou, M. Papamichael, S. Kavadias, G. Mihelogiannakis, Manolis G.H. Katevenis | Processor Architectures | |
| Pnevmatikatos, D. | 2007 |
A Memory-Effcient Reconfigurable Aho-Corasick FSM Implementation for Intrusion Detection Systems | V. Dimopoulos, I. Papaefstathiou, D. Pnevmatikatos | Memory Architectures and Memory Optimization | |
| Poschmann, A. | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Pozzi, Laura | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Preneel, B. | 2007 |
A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications | N. Mentens, K. Sakiyama, L. Batina, B. Preneel, I. Verbauwhede | Cryptography | |
| Ramirez, Alex | 2007 |
On the Problem of Minimizing Workload Execution Time in SMT processors | F.J. Cazorla, Peter M. W. Knijnenburg, R. Sakellariou, E. Fernandez, Alex Ramirez, Mateo Valero | Multiprocessor Architectures | |
| Ramirez, Alex | 2007 |
Online Prediction of Applications Cache Utility | M. Moreto, F.J. Cazorla, Alex Ramirez, Mateo Valero | Memory Architectures and Memory Optimization | |
| Regazzoni, F. | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Rintaluoma, Tero | 2007 |
Energy effciency of mobile video decoding | Tero Rintaluoma, Olli Silven | Systems and Applications | |
| Robert, Michel | 2007 |
Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems | N. Saint-Jean, Pascal Benoit, Gilles Sassatelli, L. Torres, Michel Robert | Multiprocessor Architectures | |
| Rotenberg, L. | 2007 |
Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform | Holger Blume, J.v. Livonius, L. Rotenberg, Tobias G. Noll, H. Bothe, Jörg Brakensiek | Multiprocessor Architectures | |
| Saint-Jean, N. | 2007 |
Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems | N. Saint-Jean, Pascal Benoit, Gilles Sassatelli, L. Torres, Michel Robert | Multiprocessor Architectures | |
| Sakellariou, R. | 2007 |
On the Problem of Minimizing Workload Execution Time in SMT processors | F.J. Cazorla, Peter M. W. Knijnenburg, R. Sakellariou, E. Fernandez, Alex Ramirez, Mateo Valero | Multiprocessor Architectures | |
| Sakiyama, K. | 2007 |
A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications | N. Mentens, K. Sakiyama, L. Batina, B. Preneel, I. Verbauwhede | Cryptography | |
| Sanchez, J.L. | 2007 |
A Hardware/Software Architecture for Tool Path Computation. An Application to Turning Lathe Machining | S. Cuenca, A. Martinez, A. Jimeno, J.L. Sanchez | Systems and Applications | |
| Sassatelli, Gilles | 2007 |
Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems | N. Saint-Jean, Pascal Benoit, Gilles Sassatelli, L. Torres, Michel Robert | Multiprocessor Architectures | |
| Schwoerer, L. | 2007 |
Applying Data Mapping Techniques to Vector DSPs | Peter Westermann, L. Schwoerer, A. Kaufmann | Processor Architectures | |
| Sciuto, Donatella | 2007 |
An Interrupt Controller for FPGA-based Multiprocessors | Antonino Tumeo, M. Branca, L. Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto | Multiprocessor Architectures | |
| Sciuto, Donatella | 2007 |
An Evolutionary Approach to Area-Time Optimization of FPGA designs | Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Palermo, Christian Pilato, Donatella Sciuto, Antonino Tumeo | Reconfigurable Architectures | |
| Seokhyun, Lee | 2007 |
Automatic Bus Matrix Synthesis based on Hardware Interface Selection for Fast Communication Design Space Exploration | Lee Ganghee, Lee Seokhyun, Ahn Yongjin, Choi Kiyoung | Design Space Exploration | |
| Silven, Olli | 2007 |
Energy effciency of mobile video decoding | Tero Rintaluoma, Olli Silven | Systems and Applications | |
| Sjalander, M. | 2007 |
FlexCore: Utilizing Exposed Datapath Control for Effcient Computing | M. Thuresson, M. Sjalander, M. Bjork, L. Svensson, P. Larsson-Edefors, Per Stenstrom | Processor Architectures | |
| Soudris, Dimitrios | 2007 |
Systematic Data Structure Exploration of Multimedia and Network Applications realized Embedded Systems | L. Papadopoulos, C. Baloukas, N. Zompakis, Dimitrios Soudris | Design Space Exploration | |
| Spring, J.H. | 2007 |
The Weight-Watcher Service and its Lightweight Implementation | B. Garbinato, R. Guerraoui, J. Hulaas, A. Kounine, M. Monod, J.H. Spring | Systems and Applications | |
| Stenstrom, Per | 2007 |
FlexCore: Utilizing Exposed Datapath Control for Effcient Computing | M. Thuresson, M. Sjalander, M. Bjork, L. Svensson, P. Larsson-Edefors, Per Stenstrom | Processor Architectures | |
| Svensson, L. | 2007 |
FlexCore: Utilizing Exposed Datapath Control for Effcient Computing | M. Thuresson, M. Sjalander, M. Bjork, L. Svensson, P. Larsson-Edefors, Per Stenstrom | Processor Architectures | |
| Taptimthong, P. | 2007 |
Design Space Exploration of Media Processors: A Parameterized Scheduler | Guillermo Payá Vayá, J. Martin-Langerwerf, P. Taptimthong, Peter Pirsch | Design Space Exploration | |
| Teich, Jürgen | 2007 |
Simulative Buffer Analysis of Local Image Processing Algorithms Described by Windowed Synchronous Data Flow | J. Keinert, Christian Haubelt, Jürgen Teich | Memory Architectures and Memory Optimization | |
| Theodoridis, G. | 2007 |
The ARISE Reconfigurable Instruction Set Extensions Framework | N. Vassiliadis, G. Theodoridis, S. Nikolaidis | Reconfigurable Architectures | |
| Thuresson, M. | 2007 |
FlexCore: Utilizing Exposed Datapath Control for Effcient Computing | M. Thuresson, M. Sjalander, M. Bjork, L. Svensson, P. Larsson-Edefors, Per Stenstrom | Processor Architectures | |
| Toprak, Z. | 2007 |
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies | F. Regazzoni, S. Badel, T. Eisenbarth, Johann Großschädl, A. Poschmann, Z. Toprak, M. Macchetti, Laura Pozzi, C. Paar, Y. Leblebici, Paolo Ienne | Cryptography | |
| Torres, L. | 2007 |
Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems | N. Saint-Jean, Pascal Benoit, Gilles Sassatelli, L. Torres, Michel Robert | Multiprocessor Architectures | |
| Tumeo, Antonino | 2007 |
An Interrupt Controller for FPGA-based Multiprocessors | Antonino Tumeo, M. Branca, L. Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto | Multiprocessor Architectures | |
| Tumeo, Antonino | 2007 |
An Evolutionary Approach to Area-Time Optimization of FPGA designs | Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Palermo, Christian Pilato, Donatella Sciuto, Antonino Tumeo | Reconfigurable Architectures | |
| Valero, Mateo | 2007 |
On the Problem of Minimizing Workload Execution Time in SMT processors | F.J. Cazorla, Peter M. W. Knijnenburg, R. Sakellariou, E. Fernandez, Alex Ramirez, Mateo Valero | Multiprocessor Architectures | |
| Valero, Mateo | 2007 |
Online Prediction of Applications Cache Utility | M. Moreto, F.J. Cazorla, Alex Ramirez, Mateo Valero | Memory Architectures and Memory Optimization | |
| Vassiliadis, N. | 2007 |
The ARISE Reconfigurable Instruction Set Extensions Framework | N. Vassiliadis, G. Theodoridis, S. Nikolaidis | Reconfigurable Architectures | |
| Vassiliadis, Stamatis | 2007 |
Design Space Exploration of Configuration Manager for Network Processing Applications | Christoforos Kachris, Stamatis Vassiliadis | Design Space Exploration | |
| Vassiliadis, Stamatis | 2007 |
Instruction-Level Fault Tolerance Configurability | Demid Borodin, Ben Juurlink, Stamatis Vassiliadis | Systems and Applications | |
| Verbauwhede, I. | 2007 |
A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications | N. Mentens, K. Sakiyama, L. Batina, B. Preneel, I. Verbauwhede | Cryptography | |
| Wallner, S. | 2007 |
Secure and Authenticated Communication in Chip-Level Microcomputer Bus Systems with Tree Parity Machines | S. Muhlbach, S. Wallner | Cryptography | |
| Westermann, Peter | 2007 |
Applying Data Mapping Techniques to Vector DSPs | Peter Westermann, L. Schwoerer, A. Kaufmann | Processor Architectures | |
| Xydis, S. | 2007 |
Flexibility Inlining into Arithmetic Data-paths Exploiting A Regular Interconnection Scheme | S. Xydis, George Economakos, Kiamal Pekmestzi | Reconfigurable Architectures | |
| Yongjin, Ahn | 2007 |
Automatic Bus Matrix Synthesis based on Hardware Interface Selection for Fast Communication Design Space Exploration | Lee Ganghee, Lee Seokhyun, Ahn Yongjin, Choi Kiyoung | Design Space Exploration | |
| Zapata, E.L. | 2007 |
Maximum and Sorted Cache Occupation Using Array Padding | E. Herruzo, E.L. Zapata, O. Plata | Memory Architectures and Memory Optimization | |
| Zompakis, N. | 2007 |
Systematic Data Structure Exploration of Multimedia and Network Applications realized Embedded Systems | L. Papadopoulos, C. Baloukas, N. Zompakis, Dimitrios Soudris | Design Space Exploration | |
| Apvrille, Ludovic | 2008 |
Evaluation of ASIPs Design with LISATek | Rashid Muhammad, Ludovic Apvrille, Renaud Pacalet | Special Session: System Level Design for Heterogeneous Systems | |
| Argyrides, Costas | 2008 |
Area Reliability Trade-Off in Improved Reed Muller Coding | Costas Argyrides, Stephania Loizidou, Dhiraj K. Pradhan | Application Specific | |
| Bertels, Koen | 2008 |
System-Level Design Space Exploration of Dynamic Reconfigurable Architectures | Kamana Sigdel, Mark Thompson, Andy D. Pimentel, Todor Stefanov, Koen Bertels | System Modeling and Design | |
| Bhattacharyya, Shuvra S. | 2008 |
Heterogeneous Design in Functional DIF | William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya | Special Session: System Level Design for Heterogeneous Systems | |
| Biest, Alexis Vander | 2008 |
A Multi-objective and Hierarchical Exploration Tool for SoC Performance Estimation | Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frederic Robert | SoC | |
| Biles, Stuart | 2008 |
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor | Emre Özer, Ronald G. Dreslinski, Trevor Mudge, Stuart Biles, Krisztián Flautner | Architecture | |
| Blake, Anthony | 2008 |
Scalable Architecture for Prefix Preserving Anonymization of IP Addresses | Anthony Blake, Richard Nelson | Architecture | |
| Blume, Holger | 2008 |
ASIP-eFPGA Architecture for Multioperable GNSS Receivers | Thorsten von Sydow, Holger Blume, Götz Kappen, Tobias G. Noll | Application Specific | |
| Boulet, Pierre | 2008 |
High Level Loop Transformations for Systematic Signal Processing Embedded Applications | Calin Glitia, Pierre Boulet | Special Session: System Level Design for Heterogeneous Systems | |
| Bramann, Gero | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Brodman, James | 2008 |
Design Issues in Parallel Array Languages for Shared Memory | James Brodman, Basilio B. Fraguela, María J. Garzarán, David Padua | Special Session: Programming Multicores | |
| Chen, Zhimin | 2008 |
Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT Coprocessors | Xu Guo, Zhimin Chen, Patrick Schaumont | SoC | |
| Clifford, John | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Dave, Nirav | 2008 |
802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec | Teemu Pitkänen, Vesa-Matti Hartikainen, Nirav Dave, Gopal Raghavan | New Frontiers | |
| Degner, Martin | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Deprettere, Ed F. | 2008 |
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study | Andy D. Pimentel, Todor Stefanov, Hristo Nikolov, Mark Thompson, Simon Polstra, Ed F. Deprettere | Special Session: System Level Design for Heterogeneous Systems | |
| Domínguez, Miguel Ángel | 2008 |
Climate and Biological Sensor Network | Perfecto Mariño, Fernando Pérez-Fontán, Miguel Ángel Domínguez, Santiago Otero | Sensors and Sensor Networks | |
| Dooly, Gerard | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Dreslinski, Ronald G. | 2008 |
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor | Emre Özer, Ronald G. Dreslinski, Trevor Mudge, Stuart Biles, Krisztián Flautner | Architecture | |
| Ewald, Hartmut | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Fettweis, Gerhard | 2008 |
A Real-Time Programming Model for Heterogeneous MPSoCs | Torsten Limberg, Bastian Ristau, Gerhard Fettweis | SoC | |
| Fischaber, Scott | 2008 |
Memory-Centric Hardware Synthesis from Dataflow Models | Scott Fischaber, John McAllister, Roger Woods | Special Session: System Level Design for Heterogeneous Systems | |
| Fitzpatrick, Colin | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Flautner, Krisztián | 2008 |
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor | Emre Özer, Ronald G. Dreslinski, Trevor Mudge, Stuart Biles, Krisztián Flautner | Architecture | |
| Fraguela, Basilio B. | 2008 |
Design Issues in Parallel Array Languages for Shared Memory | James Brodman, Basilio B. Fraguela, María J. Garzarán, David Padua | Special Session: Programming Multicores | |
| Garzarán, María J. | 2008 |
Design Issues in Parallel Array Languages for Shared Memory | James Brodman, Basilio B. Fraguela, María J. Garzarán, David Padua | Special Session: Programming Multicores | |
| Gaydadjiev, Georgi N. | 2008 |
Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications | Sebastian Isaza, Friman Sánchez, Georgi N. Gaydadjiev, Alex Ramirez, Mateo Valero | New Frontiers | |
| Gili, Flavio | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Glitia, Calin | 2008 |
High Level Loop Transformations for Systematic Signal Processing Embedded Applications | Calin Glitia, Pierre Boulet | Special Session: System Level Design for Heterogeneous Systems | |
| Glossner, John | 2008 |
Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction Set | Daniel Iancu, Mayan Moudgill, John Glossner, Jarmo Takala | Application Specific | |
| Gora, Michael | 2008 |
Intellectual Property Protection for Embedded Sensor Nodes | Michael Gora, Eric Simpson, Patrick Schaumont | System Modeling and Design | |
| Grattan, Ken | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Grimm, Christian | 2008 |
On the Benefit of Caching Traffic Flow Data in the Link Buffer | Konstantin Septinus, Christian Grimm, Vladislav Rumyantsev, Peter Pirsch | Architecture | |
| Guo, Xu | 2008 |
Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT Coprocessors | Xu Guo, Zhimin Chen, Patrick Schaumont | SoC | |
| Guzma, Vladimír | 2008 |
Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic | Vladimír Guzma, Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala | Architecture | |
| Hämäläinen, Timo D. | 2008 |
Application Server for Wireless Sensor Networks | Janne Rintanen, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen | Sensors and Sensor Networks | |
| Hämäläinen, Timo D. | 2008 |
Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks | Jukka Suhonen, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | Sensors and Sensor Networks | |
| Hännikäinen, Marko | 2008 |
Application Server for Wireless Sensor Networks | Janne Rintanen, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen | Sensors and Sensor Networks | |
| Hännikäinen, Marko | 2008 |
Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks | Jukka Suhonen, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | Sensors and Sensor Networks | |
| Hänninen, Ismo | 2008 |
Arithmetic Design on Quantum-Dot Cellular Automata Nanotechnology | Ismo Hänninen, Jarmo Takala | New Frontiers | |
| Hartikainen, Vesa-Matti | 2008 |
802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec | Teemu Pitkänen, Vesa-Matti Hartikainen, Nirav Dave, Gopal Raghavan | New Frontiers | |
| Iancu, Daniel | 2008 |
Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction Set | Daniel Iancu, Mayan Moudgill, John Glossner, Jarmo Takala | Application Specific | |
| Isaza, Sebastian | 2008 |
Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications | Sebastian Isaza, Friman Sánchez, Georgi N. Gaydadjiev, Alex Ramirez, Mateo Valero | New Frontiers | |
| Jääskeläinen, Pekka | 2008 |
Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic | Vladimír Guzma, Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala | Architecture | |
| Jaddoe, Stanley | 2008 |
Signature-Based Calibration of Analytical System-Level Performance Models | Stanley Jaddoe, Andy D. Pimentel | System Modeling and Design | |
| Jesshope, Chris R. | 2008 |
Introduction to Programming Multicores | Chris R. Jesshope | Special Session: Programming Multicores | |
| Jesshope, Chris R. | 2008 |
An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency | Chris R. Jesshope, Jean-Marc Philippe, Michiel van Tol | Special Session: Programming Multicores | |
| Kappen, Götz | 2008 |
ASIP-eFPGA Architecture for Multioperable GNSS Receivers | Thorsten von Sydow, Holger Blume, Götz Kappen, Tobias G. Noll | Application Specific | |
| Kellomäki, Pertti | 2008 |
Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic | Vladimír Guzma, Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala | Architecture | |
| Kiemb, Mary | 2008 |
Heterogeneous Design in Functional DIF | William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya | Special Session: System Level Design for Heterogeneous Systems | |
| Kohvakka, Mikko | 2008 |
Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks | Jukka Suhonen, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | Sensors and Sensor Networks | |
| Lewis, Elfed | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Limberg, Torsten | 2008 |
A Real-Time Programming Model for Heterogeneous MPSoCs | Torsten Limberg, Bastian Ristau, Gerhard Fettweis | SoC | |
| Lochmann, Steffen | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Loizidou, Stephania | 2008 |
Area Reliability Trade-Off in Improved Reed Muller Coding | Costas Argyrides, Stephania Loizidou, Dhiraj K. Pradhan | Application Specific | |
| Lucas, James | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Mariño, Perfecto | 2008 |
Climate and Biological Sensor Network | Perfecto Mariño, Fernando Pérez-Fontán, Miguel Ángel Domínguez, Santiago Otero | Sensors and Sensor Networks | |
| McAllister, John | 2008 |
Introduction to System Level Design for Heterogeneous Systems | John McAllister | Special Session: System Level Design for Heterogeneous Systems | |
| McAllister, John | 2008 |
Memory-Centric Hardware Synthesis from Dataflow Models | Scott Fischaber, John McAllister, Roger Woods | Special Session: System Level Design for Heterogeneous Systems | |
| Merlone-Borla, Edoardo | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Milojevic, Dragomir | 2008 |
A Multi-objective and Hierarchical Exploration Tool for SoC Performance Estimation | Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frederic Robert | SoC | |
| Moudgill, Mayan | 2008 |
Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction Set | Daniel Iancu, Mayan Moudgill, John Glossner, Jarmo Takala | Application Specific | |
| Mudge, Trevor | 2008 |
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor | Emre Özer, Ronald G. Dreslinski, Trevor Mudge, Stuart Biles, Krisztián Flautner | Architecture | |
| Muhammad, Rashid | 2008 |
Evaluation of ASIPs Design with LISATek | Rashid Muhammad, Ludovic Apvrille, Renaud Pacalet | Special Session: System Level Design for Heterogeneous Systems | |
| Nelson, Richard | 2008 |
Scalable Architecture for Prefix Preserving Anonymization of IP Addresses | Anthony Blake, Richard Nelson | Architecture | |
| Neuendorffer, Stephen | 2008 |
Streaming Systems in FPGAs | Stephen Neuendorffer, Kees Vissers | Special Session: System Level Design for Heterogeneous Systems | |
| Nikolov, Hristo | 2008 |
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study | Andy D. Pimentel, Todor Stefanov, Hristo Nikolov, Mark Thompson, Simon Polstra, Ed F. Deprettere | Special Session: System Level Design for Heterogeneous Systems | |
| Noll, Tobias G. | 2008 |
ASIP-eFPGA Architecture for Multioperable GNSS Receivers | Thorsten von Sydow, Holger Blume, Götz Kappen, Tobias G. Noll | Application Specific | |
| Otero, Santiago | 2008 |
Climate and Biological Sensor Network | Perfecto Mariño, Fernando Pérez-Fontán, Miguel Ángel Domínguez, Santiago Otero | Sensors and Sensor Networks | |
| Özer, Emre | 2008 |
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor | Emre Özer, Ronald G. Dreslinski, Trevor Mudge, Stuart Biles, Krisztián Flautner | Architecture | |
| Pacalet, Renaud | 2008 |
Evaluation of ASIPs Design with LISATek | Rashid Muhammad, Ludovic Apvrille, Renaud Pacalet | Special Session: System Level Design for Heterogeneous Systems | |
| Padua, David | 2008 |
Design Issues in Parallel Array Languages for Shared Memory | James Brodman, Basilio B. Fraguela, María J. Garzarán, David Padua | Special Session: Programming Multicores | |
| Palumbo, Francesca | 2008 |
A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs | Francesca Palumbo, Simone Secchi, Danilo Pani, Luigi Raffo | SoC | |
| Pani, Danilo | 2008 |
A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs | Francesca Palumbo, Simone Secchi, Danilo Pani, Luigi Raffo | SoC | |
| Patt, Yale | 2008 |
Can They Be Fixed: Some Thoughts After 40 Years in the Business | Yale Patt | SAMOS VIII - Beachnote | 2008-WS-01 |
| Pérez-Fontán, Fernando | 2008 |
Climate and Biological Sensor Network | Perfecto Mariño, Fernando Pérez-Fontán, Miguel Ángel Domínguez, Santiago Otero | Sensors and Sensor Networks | |
| Philippe, Jean-Marc | 2008 |
An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency | Chris R. Jesshope, Jean-Marc Philippe, Michiel van Tol | Special Session: Programming Multicores | |
| Pimentel, Andy D. | 2008 |
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study | Andy D. Pimentel, Todor Stefanov, Hristo Nikolov, Mark Thompson, Simon Polstra, Ed F. Deprettere | Special Session: System Level Design for Heterogeneous Systems | |
| Pimentel, Andy D. | 2008 |
Signature-Based Calibration of Analytical System-Level Performance Models | Stanley Jaddoe, Andy D. Pimentel | System Modeling and Design | |
| Pimentel, Andy D. | 2008 |
System-Level Design Space Exploration of Dynamic Reconfigurable Architectures | Kamana Sigdel, Mark Thompson, Andy D. Pimentel, Todor Stefanov, Koen Bertels | System Modeling and Design | |
| Pirsch, Peter | 2008 |
On the Benefit of Caching Traffic Flow Data in the Link Buffer | Konstantin Septinus, Christian Grimm, Vladislav Rumyantsev, Peter Pirsch | Architecture | |
| Pitkänen, Teemu | 2008 |
802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec | Teemu Pitkänen, Vesa-Matti Hartikainen, Nirav Dave, Gopal Raghavan | New Frontiers | |
| Plishker, William | 2008 |
Heterogeneous Design in Functional DIF | William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya | Special Session: System Level Design for Heterogeneous Systems | |
| Polstra, Simon | 2008 |
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study | Andy D. Pimentel, Todor Stefanov, Hristo Nikolov, Mark Thompson, Simon Polstra, Ed F. Deprettere | Special Session: System Level Design for Heterogeneous Systems | |
| Pradhan, Dhiraj K. | 2008 |
Area Reliability Trade-Off in Improved Reed Muller Coding | Costas Argyrides, Stephania Loizidou, Dhiraj K. Pradhan | Application Specific | |
| Raffo, Luigi | 2008 |
A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs | Francesca Palumbo, Simone Secchi, Danilo Pani, Luigi Raffo | SoC | |
| Raghavan, Gopal | 2008 |
802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec | Teemu Pitkänen, Vesa-Matti Hartikainen, Nirav Dave, Gopal Raghavan | New Frontiers | |
| Ramirez, Alex | 2008 |
Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications | Sebastian Isaza, Friman Sánchez, Georgi N. Gaydadjiev, Alex Ramirez, Mateo Valero | New Frontiers | |
| Richard, Alienor | 2008 |
A Multi-objective and Hierarchical Exploration Tool for SoC Performance Estimation | Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frederic Robert | SoC | |
| Rintanen, Janne | 2008 |
Application Server for Wireless Sensor Networks | Janne Rintanen, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen | Sensors and Sensor Networks | |
| Ristau, Bastian | 2008 |
A Real-Time Programming Model for Heterogeneous MPSoCs | Torsten Limberg, Bastian Ristau, Gerhard Fettweis | SoC | |
| Robert, Frederic | 2008 |
A Multi-objective and Hierarchical Exploration Tool for SoC Performance Estimation | Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frederic Robert | SoC | |
| Rumyantsev, Vladislav | 2008 |
On the Benefit of Caching Traffic Flow Data in the Link Buffer | Konstantin Septinus, Christian Grimm, Vladislav Rumyantsev, Peter Pirsch | Architecture | |
| Sánchez, Friman | 2008 |
Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications | Sebastian Isaza, Friman Sánchez, Georgi N. Gaydadjiev, Alex Ramirez, Mateo Valero | New Frontiers | |
| Sane, Nimish | 2008 |
Heterogeneous Design in Functional DIF | William Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya | Special Session: System Level Design for Heterogeneous Systems | |
| Schaumont, Patrick | 2008 |
Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT Coprocessors | Xu Guo, Zhimin Chen, Patrick Schaumont | SoC | |
| Schaumont, Patrick | 2008 |
Intellectual Property Protection for Embedded Sensor Nodes | Michael Gora, Eric Simpson, Patrick Schaumont | System Modeling and Design | |
| Secchi, Simone | 2008 |
A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs | Francesca Palumbo, Simone Secchi, Danilo Pani, Luigi Raffo | SoC | |
| Septinus, Konstantin | 2008 |
On the Benefit of Caching Traffic Flow Data in the Link Buffer | Konstantin Septinus, Christian Grimm, Vladislav Rumyantsev, Peter Pirsch | Architecture | |
| Sigdel, Kamana | 2008 |
System-Level Design Space Exploration of Dynamic Reconfigurable Architectures | Kamana Sigdel, Mark Thompson, Andy D. Pimentel, Todor Stefanov, Koen Bertels | System Modeling and Design | |
| Simpson, Eric | 2008 |
Intellectual Property Protection for Embedded Sensor Nodes | Michael Gora, Eric Simpson, Patrick Schaumont | System Modeling and Design | |
| Stefanov, Todor | 2008 |
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study | Andy D. Pimentel, Todor Stefanov, Hristo Nikolov, Mark Thompson, Simon Polstra, Ed F. Deprettere | Special Session: System Level Design for Heterogeneous Systems | |
| Stefanov, Todor | 2008 |
System-Level Design Space Exploration of Dynamic Reconfigurable Architectures | Kamana Sigdel, Mark Thompson, Andy D. Pimentel, Todor Stefanov, Koen Bertels | System Modeling and Design | |
| Suhonen, Jukka | 2008 |
Application Server for Wireless Sensor Networks | Janne Rintanen, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen | Sensors and Sensor Networks | |
| Suhonen, Jukka | 2008 |
Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks | Jukka Suhonen, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen | Sensors and Sensor Networks | |
| Sun, Tong | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Takala, Jarmo | 2008 |
Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction Set | Daniel Iancu, Mayan Moudgill, John Glossner, Jarmo Takala | Application Specific | |
| Takala, Jarmo | 2008 |
Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic | Vladimír Guzma, Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala | Architecture | |
| Takala, Jarmo | 2008 |
Arithmetic Design on Quantum-Dot Cellular Automata Nanotechnology | Ismo Hänninen, Jarmo Takala | New Frontiers | |
| Thompson, Mark | 2008 |
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study | Andy D. Pimentel, Todor Stefanov, Hristo Nikolov, Mark Thompson, Simon Polstra, Ed F. Deprettere | Special Session: System Level Design for Heterogeneous Systems | |
| Thompson, Mark | 2008 |
System-Level Design Space Exploration of Dynamic Reconfigurable Architectures | Kamana Sigdel, Mark Thompson, Andy D. Pimentel, Todor Stefanov, Koen Bertels | System Modeling and Design | |
| Valero, Mateo | 2008 |
Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications | Sebastian Isaza, Friman Sánchez, Georgi N. Gaydadjiev, Alex Ramirez, Mateo Valero | New Frontiers | |
| van Tol, Michiel | 2008 |
An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency | Chris R. Jesshope, Jean-Marc Philippe, Michiel van Tol | Special Session: Programming Multicores | |
| Vissers, Kees | 2008 |
Streaming Systems in FPGAs | Stephen Neuendorffer, Kees Vissers | Special Session: System Level Design for Heterogeneous Systems | |
| von Sydow, Thorsten | 2008 |
ASIP-eFPGA Architecture for Multioperable GNSS Receivers | Thorsten von Sydow, Holger Blume, Götz Kappen, Tobias G. Noll | Application Specific | |
| Woods, Roger | 2008 |
Memory-Centric Hardware Synthesis from Dataflow Models | Scott Fischaber, John McAllister, Roger Woods | Special Session: System Level Design for Heterogeneous Systems | |
| Zhao, Weizhong | 2008 |
Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors | Elfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, Ken Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili | Sensors and Sensor Networks | |
| Antikainen, Juho | 2008 |
Fine-grained Application-speci c Instruction Set Processor Design for the K-best List Sphere Detector Algorithm | Juho Antikainen, Perttu Salmela, Olli Silven, Markku Juntti, Jarmo Takala, Markus Myllylä | Processor Architecture | |
| Ballapuram, Chinnakrishnan S. | 2008 |
Improving TLB Energy for Java Applications on JVM | Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee | Memory and Caches | |
| Banerjee, Utpal | 2008 |
Comparative Architectural Characterization of SPEC CPU2000 and CPU2006 Benchmarks on the Intel Core 2 Duo Processor | Arun Kejariwal, Alexander V. Veidenbaum, Xinmin Tian, Milind Girkar, Utpal Banerjee | Processor Architecture | |
| Barre, Jonathan | 2008 |
An Architecture for the Simultaneous Execution of Hard Real-Time Threads | Jonathan Barre, Christine Rochange, Pascal Sainrat | Embedded Parallel Systems | |
| Beiu, Valeriu | 2008 |
On Brain-inspired Hybrid Topologies for Nano-architectures – A Rent’s Rule Approach – | Valeriu Beiu, Basheer A. M. Madappuram, Martin McGinnity | Network on a Chip | |
| Bernard, Thomas A. M. | 2008 |
A General Model of Concurrency and its Implementation as Many-core Dynamic RISC Processors | Thomas A. M. Bernard, K. Bousias, L. Guang, Chris R. Jesshope, M. Lankamp, M. W. van Tol, L. Zhang | Embedded Parallel Systems | |
| Bertels, Koen | 2008 |
A Clustering Method for the Identification of Convex Disconnected Multiple Input Multiple Output Instructions | Carlo Galuzzi, Dimitris Theodoropoulos, Koen Bertels | Design Space Exploration | |
| Blume, Holger | 2008 |
Perceptual Feature based Music Classification - A DSP Perspective for a New Type of Application | Holger Blume, M. Haller, Martin Botteck, W. Theimer | Applications | |
| Botteck, Martin | 2008 |
Perceptual Feature based Music Classification - A DSP Perspective for a New Type of Application | Holger Blume, M. Haller, Martin Botteck, W. Theimer | Applications | |
| Bousias, K. | 2008 |
A General Model of Concurrency and its Implementation as Many-core Dynamic RISC Processors | Thomas A. M. Bernard, K. Bousias, L. Guang, Chris R. Jesshope, M. Lankamp, M. W. van Tol, L. Zhang | Embedded Parallel Systems | |
| Busonera, Giovanni | 2008 |
Exploiting Partial Reconfiguration for Flexible Software Debugging | Giovanni Busonera, Alessandro Forin, Richard Neil Pittman | Reconfigurable Computing | |
| Chakrabarti, Chaitali | 2008 |
A Parameterized Dataflow Language Extension for Embedded Streaming Systems | Yuan Lin, Yoonseo Choi, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti | Embedded Parallel Systems | |
| Cheung, Peter Y.K. | 2008 |
Systematic Design Space Exploration for Customisable Multi-Processor Architectures | Ben Cope, Peter Y.K. Cheung, Wayne Luk | Design Space Exploration | |
| Choi, Yoonseo | 2008 |
A Parameterized Dataflow Language Extension for Embedded Streaming Systems | Yuan Lin, Yoonseo Choi, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti | Embedded Parallel Systems | |
| Chureau, Alexandre | 2008 |
An Intermediate Format for Automatic Generation of MPSoC Virtual Prototypes | Alexandre Chureau, Frederic Petrot | Multiprocessors | |
| Cope, Ben | 2008 |
Systematic Design Space Exploration for Customisable Multi-Processor Architectures | Ben Cope, Peter Y.K. Cheung, Wayne Luk | Design Space Exploration | |
| Corbetta, Simone | 2008 |
A Light–Weight Network–on–Chip Architecture for Dynamically Reconfigurable Systems | Simone Corbetta, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto | Network on a Chip | |
| Coutinho, J. G. F. | 2008 |
Reconfigurable Design with Clock Gating | W.G. Osborne, Wayne Luk, J. G. F. Coutinho, O. Mencer | Reconfigurable Computing | |
| Economakos, George | 2008 |
An Instruction Set Extension for Java Bytecodes Translation Acceleration | Isidoros Sideris, Kiamal Pekmestzi, George Economakos | Processor Architecture | |
| Eltawil, Ahmed | 2008 |
Architectural and Algorithm level Fault Tolerant Techniques for Low Power High Yield Multimedia Devices | Mohammad A. Makhzan (Avesta Sasan), Ahmed Eltawil, Fadi J. Kurdahi | Processor Architecture | |
| Ferrandi, Fabrizio | 2008 |
Ant Colony Optimization for Mapping and Scheduling in Heterogeneous Multiprocessor Systems | Antonino Tumeo, Christian Pilato, Fabrizio Ferrandi, Donatella Sciuto, Pier Luca Lanzi | Multiprocessors | |
| Forin, Alessandro | 2008 |
Exploiting Partial Reconfiguration for Flexible Software Debugging | Giovanni Busonera, Alessandro Forin, Richard Neil Pittman | Reconfigurable Computing | |
| Galuzzi, Carlo | 2008 |
A Clustering Method for the Identification of Convex Disconnected Multiple Input Multiple Output Instructions | Carlo Galuzzi, Dimitris Theodoropoulos, Koen Bertels | Design Space Exploration | |
| Garside, Jim | 2008 |
An Adaptive Bloom Filter Cache Partitioning Scheme for Multicore Architectures | Konstantinos Nikas, Matthew Horsnell, Jim Garside | Embedded Parallel Systems | |
| Gaudiot, Jean-Luc | 2008 |
A Centralized Cache Miss Driven Technique to Improve Processor Power Dissipation | Houman Homayoun, Mohammad Makhzan, Jean-Luc Gaudiot, Alexander V. Veidenbaum | Memory and Caches | |
| Gaydadjiev, Georgi N. | 2008 |
ImpBench: A novel benchmark suite for biomedical, microelectronic implants | Christos Strydis, Christoforos Kachris, Georgi N. Gaydadjiev | Applications | |
| Giefers, Heiner | 2008 |
Realizing Reconfigurable Mesh Algorithms on Softcore Arrays | Heiner Giefers, Marco Platzner | Network on a Chip | |
| Girkar, Milind | 2008 |
Comparative Architectural Characterization of SPEC CPU2000 and CPU2006 Benchmarks on the Intel Core 2 Duo Processor | Arun Kejariwal, Alexander V. Veidenbaum, Xinmin Tian, Milind Girkar, Utpal Banerjee | Processor Architecture | |
| Glass, Michael | 2008 |
Multi-Objective Routing and Topology Optimization in Networked Embedded Systems | Michael Glass, Martin Lukasiewycz, Rolf Wanka, Christian Haubelt, Jürgen Teich | Design Space Exploration | |
| Guang, L. | 2008 |
A General Model of Concurrency and its Implementation as Many-core Dynamic RISC Processors | Thomas A. M. Bernard, K. Bousias, L. Guang, Chris R. Jesshope, M. Lankamp, M. W. van Tol, L. Zhang | Embedded Parallel Systems | |
| Haller, M. | 2008 |
Perceptual Feature based Music Classification - A DSP Perspective for a New Type of Application | Holger Blume, M. Haller, Martin Botteck, W. Theimer | Applications | |
| Haubelt, Christian | 2008 |
Multi-Objective Routing and Topology Optimization in Networked Embedded Systems | Michael Glass, Martin Lukasiewycz, Rolf Wanka, Christian Haubelt, Jürgen Teich | Design Space Exploration | |
| Herkersdorf, Andreas | 2008 |
Improving Memory Subsystem Performance in Network Processors with Smart Packet Segmentation | Kimon Karras, Daniel Llorente, Thomas Wild, Andreas Herkersdorf | Memory and Caches | |
| Homayoun, Houman | 2008 |
A Centralized Cache Miss Driven Technique to Improve Processor Power Dissipation | Houman Homayoun, Mohammad Makhzan, Jean-Luc Gaudiot, Alexander V. Veidenbaum | Memory and Caches | |
| Horsnell, Matthew | 2008 |
An Adaptive Bloom Filter Cache Partitioning Scheme for Multicore Architectures | Konstantinos Nikas, Matthew Horsnell, Jim Garside | Embedded Parallel Systems | |
| Hou, Chaohuan | 2008 |
A Priority-Expression-Based Burst Scheduling of Memory Reordering Access | Jun Pang, Lei Yang, Lei Shi, Tiejun Zhang, Donghui Wang, Chaohuan Hou | Memory and Caches | |
| Janhunen, Janne | 2008 |
Software Defined Radio Implementation of K-best List Sphere Detector Algorithm | Janne Janhunen, Olli Silven, Markku Juntti, Markus Myllylä | Applications | |
| Jeremiassen, Tor | 2008 |
Challenges in Embedded System Simulation | Tor Jeremiassen | SAMOS VIII - Keynote | 2008-IC-02 |
| Jesshope, Chris R. | 2008 |
A General Model of Concurrency and its Implementation as Many-core Dynamic RISC Processors | Thomas A. M. Bernard, K. Bousias, L. Guang, Chris R. Jesshope, M. Lankamp, M. W. van Tol, L. Zhang | Embedded Parallel Systems | |
| Juntti, Markku | 2008 |
Software Defined Radio Implementation of K-best List Sphere Detector Algorithm | Janne Janhunen, Olli Silven, Markku Juntti, Markus Myllylä | Applications | |
| Juntti, Markku | 2008 |
Fine-grained Application-speci c Instruction Set Processor Design for the K-best List Sphere Detector Algorithm | Juho Antikainen, Perttu Salmela, Olli Silven, Markku Juntti, Jarmo Takala, Markus Myllylä | Processor Architecture | |
| Kachris, Christoforos | 2008 |
ImpBench: A novel benchmark suite for biomedical, microelectronic implants | Christos Strydis, Christoforos Kachris, Georgi N. Gaydadjiev | Applications | |
| Karras, Kimon | 2008 |
Improving Memory Subsystem Performance in Network Processors with Smart Packet Segmentation | Kimon Karras, Daniel Llorente, Thomas Wild, Andreas Herkersdorf | Memory and Caches | |
| Katevenis, Manolis G.H. | 2008 |
Towards Unified Mechanisms for Inter-Processor Communication | Manolis G.H. Katevenis | SAMOS VIII - Keynote | 2008-IC-03 |
| Kejariwal, Arun | 2008 |
Comparative Architectural Characterization of SPEC CPU2000 and CPU2006 Benchmarks on the Intel Core 2 Duo Processor | Arun Kejariwal, Alexander V. Veidenbaum, Xinmin Tian, Milind Girkar, Utpal Banerjee | Processor Architecture | |
| Kurdahi, Fadi J. | 2008 |
Architectural and Algorithm level Fault Tolerant Techniques for Low Power High Yield Multimedia Devices | Mohammad A. Makhzan (Avesta Sasan), Ahmed Eltawil, Fadi J. Kurdahi | Processor Architecture | |
| Lankamp, M. | 2008 |
A General Model of Concurrency and its Implementation as Many-core Dynamic RISC Processors | Thomas A. M. Bernard, K. Bousias, L. Guang, Chris R. Jesshope, M. Lankamp, M. W. van Tol, L. Zhang | Embedded Parallel Systems | |
| Lanzi, Pier Luca | 2008 |
Ant Colony Optimization for Mapping and Scheduling in Heterogeneous Multiprocessor Systems | Antonino Tumeo, Christian Pilato, Fabrizio Ferrandi, Donatella Sciuto, Pier Luca Lanzi | Multiprocessors | |
| Lee, Hsien-Hsin S. | 2008 |
Improving TLB Energy for Java Applications on JVM | Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee | Memory and Caches | |
| Lin, Yuan | 2008 |
A Parameterized Dataflow Language Extension for Embedded Streaming Systems | Yuan Lin, Yoonseo Choi, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti | Embedded Parallel Systems | |
| Llorente, Daniel | 2008 |
Improving Memory Subsystem Performance in Network Processors with Smart Packet Segmentation | Kimon Karras, Daniel Llorente, Thomas Wild, Andreas Herkersdorf | Memory and Caches | |
| Luk, Wayne | 2008 |
Systematic Design Space Exploration for Customisable Multi-Processor Architectures | Ben Cope, Peter Y.K. Cheung, Wayne Luk | Design Space Exploration | |
| Luk, Wayne | 2008 |
Reconfigurable Design with Clock Gating | W.G. Osborne, Wayne Luk, J. G. F. Coutinho, O. Mencer | Reconfigurable Computing | |
| Lukasiewycz, Martin | 2008 |
Multi-Objective Routing and Topology Optimization in Networked Embedded Systems | Michael Glass, Martin Lukasiewycz, Rolf Wanka, Christian Haubelt, Jürgen Teich | Design Space Exploration | |
| Madappuram, Basheer A. M. | 2008 |
On Brain-inspired Hybrid Topologies for Nano-architectures – A Rent’s Rule Approach – | Valeriu Beiu, Basheer A. M. Madappuram, Martin McGinnity | Network on a Chip | |
| Mahlke, Scott | 2008 |
A Parameterized Dataflow Language Extension for Embedded Streaming Systems | Yuan Lin, Yoonseo Choi, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti | Embedded Parallel Systems | |
| Makhzan (Avesta Sasan), Mohammad A. | 2008 |
Architectural and Algorithm level Fault Tolerant Techniques for Low Power High Yield Multimedia Devices | Mohammad A. Makhzan (Avesta Sasan), Ahmed Eltawil, Fadi J. Kurdahi | Processor Architecture | |
| Makhzan, Mohammad | 2008 |
A Centralized Cache Miss Driven Technique to Improve Processor Power Dissipation | Houman Homayoun, Mohammad Makhzan, Jean-Luc Gaudiot, Alexander V. Veidenbaum | Memory and Caches | |
| McGinnity, Martin | 2008 |
On Brain-inspired Hybrid Topologies for Nano-architectures – A Rent’s Rule Approach – | Valeriu Beiu, Basheer A. M. Madappuram, Martin McGinnity | Network on a Chip | |
| Mencer, O. | 2008 |
Reconfigurable Design with Clock Gating | W.G. Osborne, Wayne Luk, J. G. F. Coutinho, O. Mencer | Reconfigurable Computing | |
| Merker, Renate | 2008 |
A Cost Model for Partial Dynamic Reconfiguration | Markus Rullmann, Renate Merker | Reconfigurable Computing | |
| Mudge, Trevor | 2008 |
PicoServer - Building a Compact Energy Efficient Multiprocessor | Trevor Mudge | SAMOS VIII - Keynote | 2008-IC-01 |
| Mudge, Trevor | 2008 |
A Parameterized Dataflow Language Extension for Embedded Streaming Systems | Yuan Lin, Yoonseo Choi, Scott Mahlke, Trevor Mudge, Chaitali Chakrabarti | Embedded Parallel Systems | |
| Myllylä, Markus | 2008 |
Software Defined Radio Implementation of K-best List Sphere Detector Algorithm | Janne Janhunen, Olli Silven, Markku Juntti, Markus Myllylä | Applications | |
| Myllylä, Markus | 2008 |
Fine-grained Application-speci c Instruction Set Processor Design for the K-best List Sphere Detector Algorithm | Juho Antikainen, Perttu Salmela, Olli Silven, Markku Juntti, Jarmo Takala, Markus Myllylä | Processor Architecture | |
| Nikas, Konstantinos | 2008 |
An Adaptive Bloom Filter Cache Partitioning Scheme for Multicore Architectures | Konstantinos Nikas, Matthew Horsnell, Jim Garside | Embedded Parallel Systems | |
| Osborne, W.G. | 2008 |
Reconfigurable Design with Clock Gating | W.G. Osborne, Wayne Luk, J. G. F. Coutinho, O. Mencer | Reconfigurable Computing | |
| Palermo, Gianluca | 2008 |
An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria | Multiprocessors | |
| Pang, Jun | 2008 |
A Priority-Expression-Based Burst Scheduling of Memory Reordering Access | Jun Pang, Lei Yang, Lei Shi, Tiejun Zhang, Donghui Wang, Chaohuan Hou | Memory and Caches | |
| Pekmestzi, Kiamal | 2008 |
An Instruction Set Extension for Java Bytecodes Translation Acceleration | Isidoros Sideris, Kiamal Pekmestzi, George Economakos | Processor Architecture | |
| Petrot, Frederic | 2008 |
An Intermediate Format for Automatic Generation of MPSoC Virtual Prototypes | Alexandre Chureau, Frederic Petrot | Multiprocessors | |
| Pilato, Christian | 2008 |
Ant Colony Optimization for Mapping and Scheduling in Heterogeneous Multiprocessor Systems | Antonino Tumeo, Christian Pilato, Fabrizio Ferrandi, Donatella Sciuto, Pier Luca Lanzi | Multiprocessors | |
| Pittman, Richard Neil | 2008 |
Exploiting Partial Reconfiguration for Flexible Software Debugging | Giovanni Busonera, Alessandro Forin, Richard Neil Pittman | Reconfigurable Computing | |
| Platzner, Marco | 2008 |
Realizing Reconfigurable Mesh Algorithms on Softcore Arrays | Heiner Giefers, Marco Platzner | Network on a Chip | |
| Rana, Vincenzo | 2008 |
A Light–Weight Network–on–Chip Architecture for Dynamically Reconfigurable Systems | Simone Corbetta, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto | Network on a Chip | |
| Rochange, Christine | 2008 |
An Architecture for the Simultaneous Execution of Hard Real-Time Threads | Jonathan Barre, Christine Rochange, Pascal Sainrat | Embedded Parallel Systems | |
| Rullmann, Markus | 2008 |
A Cost Model for Partial Dynamic Reconfiguration | Markus Rullmann, Renate Merker | Reconfigurable Computing | |
| Sainrat, Pascal | 2008 |
An Architecture for the Simultaneous Execution of Hard Real-Time Threads | Jonathan Barre, Christine Rochange, Pascal Sainrat | Embedded Parallel Systems | |
| Salmela, Perttu | 2008 |
Fine-grained Application-speci c Instruction Set Processor Design for the K-best List Sphere Detector Algorithm | Juho Antikainen, Perttu Salmela, Olli Silven, Markku Juntti, Jarmo Takala, Markus Myllylä | Processor Architecture | |
| Santambrogio, Marco D. | 2008 |
A Light–Weight Network–on–Chip Architecture for Dynamically Reconfigurable Systems | Simone Corbetta, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto | Network on a Chip | |
| Sciuto, Donatella | 2008 |
A Light–Weight Network–on–Chip Architecture for Dynamically Reconfigurable Systems | Simone Corbetta, Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto | Network on a Chip | |
| Sciuto, Donatella | 2008 |
Ant Colony Optimization for Mapping and Scheduling in Heterogeneous Multiprocessor Systems | Antonino Tumeo, Christian Pilato, Fabrizio Ferrandi, Donatella Sciuto, Pier Luca Lanzi | Multiprocessors | |
| Shi, Lei | 2008 |
A Priority-Expression-Based Burst Scheduling of Memory Reordering Access | Jun Pang, Lei Yang, Lei Shi, Tiejun Zhang, Donghui Wang, Chaohuan Hou | Memory and Caches | |
| Sideris, Isidoros | 2008 |
An Instruction Set Extension for Java Bytecodes Translation Acceleration | Isidoros Sideris, Kiamal Pekmestzi, George Economakos | Processor Architecture | |
| Silvano, Cristina | 2008 |
An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria | Multiprocessors | |
| Silven, Olli | 2008 |
Software Defined Radio Implementation of K-best List Sphere Detector Algorithm | Janne Janhunen, Olli Silven, Markku Juntti, Markus Myllylä | Applications | |
| Silven, Olli | 2008 |
Fine-grained Application-speci c Instruction Set Processor Design for the K-best List Sphere Detector Algorithm | Juho Antikainen, Perttu Salmela, Olli Silven, Markku Juntti, Jarmo Takala, Markus Myllylä | Processor Architecture | |
| Stenstrom, Per | 2008 |
Efficient Management of Speculative Data in Hardware Transactional Memory Systems | M. M. Waliullah, Per Stenstrom | Multiprocessors | |
| Strydis, Christos | 2008 |
ImpBench: A novel benchmark suite for biomedical, microelectronic implants | Christos Strydis, Christoforos Kachris, Georgi N. Gaydadjiev | Applications | |
| Takala, Jarmo | 2008 |
Fine-grained Application-speci c Instruction Set Processor Design for the K-best List Sphere Detector Algorithm | Juho Antikainen, Perttu Salmela, Olli Silven, Markku Juntti, Jarmo Takala, Markus Myllylä | Processor Architecture | |
| Teich, Jürgen | 2008 |
Multi-Objective Routing and Topology Optimization in Networked Embedded Systems | Michael Glass, Martin Lukasiewycz, Rolf Wanka, Christian Haubelt, Jürgen Teich | Design Space Exploration | |
| Theimer, W. | 2008 |
Perceptual Feature based Music Classification - A DSP Perspective for a New Type of Application | Holger Blume, M. Haller, Martin Botteck, W. Theimer | Applications | |
| Theodoropoulos, Dimitris | 2008 |
A Clustering Method for the Identification of Convex Disconnected Multiple Input Multiple Output Instructions | Carlo Galuzzi, Dimitris Theodoropoulos, Koen Bertels | Design Space Exploration | |
| Tian, Xinmin | 2008 |
Comparative Architectural Characterization of SPEC CPU2000 and CPU2006 Benchmarks on the Intel Core 2 Duo Processor | Arun Kejariwal, Alexander V. Veidenbaum, Xinmin Tian, Milind Girkar, Utpal Banerjee | Processor Architecture | |
| Tumeo, Antonino | 2008 |
Ant Colony Optimization for Mapping and Scheduling in Heterogeneous Multiprocessor Systems | Antonino Tumeo, Christian Pilato, Fabrizio Ferrandi, Donatella Sciuto, Pier Luca Lanzi | Multiprocessors | |
| van Tol, M. W. | 2008 |
A General Model of Concurrency and its Implementation as Many-core Dynamic RISC Processors | Thomas A. M. Bernard, K. Bousias, L. Guang, Chris R. Jesshope, M. Lankamp, M. W. van Tol, L. Zhang | Embedded Parallel Systems | |
| Veidenbaum, Alexander V. | 2008 |
Comparative Architectural Characterization of SPEC CPU2000 and CPU2006 Benchmarks on the Intel Core 2 Duo Processor | Arun Kejariwal, Alexander V. Veidenbaum, Xinmin Tian, Milind Girkar, Utpal Banerjee | Processor Architecture | |
| Veidenbaum, Alexander V. | 2008 |
A Centralized Cache Miss Driven Technique to Improve Processor Power Dissipation | Houman Homayoun, Mohammad Makhzan, Jean-Luc Gaudiot, Alexander V. Veidenbaum | Memory and Caches | |
| Waliullah, M. M. | 2008 |
Efficient Management of Speculative Data in Hardware Transactional Memory Systems | M. M. Waliullah, Per Stenstrom | Multiprocessors | |
| Wang, Donghui | 2008 |
A Priority-Expression-Based Burst Scheduling of Memory Reordering Access | Jun Pang, Lei Yang, Lei Shi, Tiejun Zhang, Donghui Wang, Chaohuan Hou | Memory and Caches | |
| Wanka, Rolf | 2008 |
Multi-Objective Routing and Topology Optimization in Networked Embedded Systems | Michael Glass, Martin Lukasiewycz, Rolf Wanka, Christian Haubelt, Jürgen Teich | Design Space Exploration | |
| Wild, Thomas | 2008 |
Improving Memory Subsystem Performance in Network Processors with Smart Packet Segmentation | Kimon Karras, Daniel Llorente, Thomas Wild, Andreas Herkersdorf | Memory and Caches | |
| Yang, Lei | 2008 |
A Priority-Expression-Based Burst Scheduling of Memory Reordering Access | Jun Pang, Lei Yang, Lei Shi, Tiejun Zhang, Donghui Wang, Chaohuan Hou | Memory and Caches | |
| Zaccaria, Vittorio | 2008 |
An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria | Multiprocessors | |
| Zhang, L. | 2008 |
A General Model of Concurrency and its Implementation as Many-core Dynamic RISC Processors | Thomas A. M. Bernard, K. Bousias, L. Guang, Chris R. Jesshope, M. Lankamp, M. W. van Tol, L. Zhang | Embedded Parallel Systems | |
| Zhang, Tiejun | 2008 |
A Priority-Expression-Based Burst Scheduling of Memory Reordering Access | Jun Pang, Lei Yang, Lei Shi, Tiejun Zhang, Donghui Wang, Chaohuan Hou | Memory and Caches | |
| Agarwal, Aabhas S. | 2009 |
Prediction in Dynamic SDRAM Controller Policies | Ying Xu, Aabhas S. Agarwal, Brian T. Davis | VLSI Architectures Design | |
| Agarwal, Nainesh | 2009 |
Towards Automated FSMD Partitioning for Low Power Using Simulated Annealing | Nainesh Agarwal, Nikitas J. Dimopoulos | VLSI Architectures Design | |
| Ahonen, Tapani | 2009 |
Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management | Roberto Airoldi, Fabio Garzia, Tapani Ahonen, Dragomir Milojevic, Jari Nurmi | Multi/Many Cores Architectures | |
| Airoldi, Roberto | 2009 |
Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management | Roberto Airoldi, Fabio Garzia, Tapani Ahonen, Dragomir Milojevic, Jari Nurmi | Multi/Many Cores Architectures | |
| Ascheid, Gerd | 2009 |
A Generic Design Flow for Application Specific Processor Customization through Instruction-Set Extensions (ISEs) | Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Special Session 1: Instruction-Set Customization | |
| Augonnet, Cédric | 2009 |
Exploiting the Cell/BE Architecture with the StarPU Unified Runtime System | Cédric Augonnet, Samuel Thibault, Raymond Namyst, Maik Nijhuis | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Avetisyan, Arutyun | 2009 |
Implementing Blocked Sparse Matrix-Vector Multiplication on NVIDIA GPUs | Alexander Monakov, Arutyun Avetisyan | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Ayguadé, Eduard | 2009 |
The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors | Paul M. Carpenter, Alex Ramirez, Eduard Ayguadé | Architectures for Multimedia | |
| Badia, Rosa M. | 2009 |
Exploiting Locality on the Cell/B.E. through Bypassing | Pieter Bellens, Josep M. Perez, Rosa M. Badia, Jesus Labarta | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Batenburg, Kees Joost | 2009 |
Experiences with Cell-BE and GPU for Tomography | Sander van der Maar, Kees Joost Batenburg, Jan Sijbers | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Bellens, Pieter | 2009 |
Exploiting Locality on the Cell/B.E. through Bypassing | Pieter Bellens, Josep M. Perez, Rosa M. Badia, Jesus Labarta | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Blaauw, David | 2009 |
Reconfigurable Multicore Server Processors for Low Power Operation | Ronald G. Dreslinski, David Fick, David Blaauw, Dennis Sylvester, Trevor Mudge | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Boutellier, Jani | 2009 |
Programmable Accelerators for Reconfigurable Video Decoder | Tero Rintaluoma, Timo Reinikka, Joona Rouvinen, Jani Boutellier, Pekka Jääskeläinen, Olli Silven | Architectures for Multimedia | |
| Buchty, Rainer | 2009 |
An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems | Rainer Buchty, Mario Kicherer, David Kramer, Wolfgang Karl | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Carpenter, Paul M. | 2009 |
The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors | Paul M. Carpenter, Alex Ramirez, Eduard Ayguadé | Architectures for Multimedia | |
| Carro, Luigi | 2009 |
Introduction to the Future of Reconfigurable Computing and Processor Architectures | Luigi Carro, Stephan Wong | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Catthoor, Francky | 2009 |
Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study | Narasinga Rao Miniskar, Elena Hammari, Satyakiran Munaga, Stylianos Mamagkakis, Per Gunnar Kjeldsberg, Francky Catthoor | Architectures for Multimedia | |
| Charot, François | 2009 |
Constraint-Driven Identification of Application Specific Instructions in the DURASE System | Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot | Special Session 1: Instruction-Set Customization | |
| Choupani, Roya | 2009 |
Multiple Description Scalable Coding for Video Transmission over Unreliable Networks | Roya Choupani, Stephan Wong, Mehmet R. Tolun | Architectures for Multimedia | |
| Davis, Brian T. | 2009 |
Prediction in Dynamic SDRAM Controller Policies | Ying Xu, Aabhas S. Agarwal, Brian T. Davis | VLSI Architectures Design | |
| de la Lama, Carlos S. | 2009 |
Programmable and Scalable Architecture for Graphics Processing Units | Carlos S. de la Lama, Pekka Jääskeläinen, Jarmo Takala | Architectures for Multimedia | |
| Deprettere, Ed F. | 2009 |
Introduction to Mastering Cell BE and GPU Execution Platforms | Ed F. Deprettere, Ana L. Varbanescu | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Deprettere, Ed F. | 2009 |
Realizing FIFO Communication When Mapping Kahn Process Networks onto the Cell | Dmitry Nadezhkin, Sjoerd Meijer, Todor Stefanov, Ed F. Deprettere | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Dimopoulos, Nikitas J. | 2009 |
Towards Automated FSMD Partitioning for Low Power Using Simulated Annealing | Nainesh Agarwal, Nikitas J. Dimopoulos | VLSI Architectures Design | |
| Dreslinski, Ronald G. | 2009 |
Reconfigurable Multicore Server Processors for Low Power Operation | Ronald G. Dreslinski, David Fick, David Blaauw, Dennis Sylvester, Trevor Mudge | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Dutta, Hritam | 2009 |
Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors | Richard Membarth, Frank Hannig, Hritam Dutta, Jürgen Teich | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Fick, David | 2009 |
Reconfigurable Multicore Server Processors for Low Power Operation | Ronald G. Dreslinski, David Fick, David Blaauw, Dennis Sylvester, Trevor Mudge | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Floch, Antoine | 2009 |
Constraint-Driven Identification of Application Specific Instructions in the DURASE System | Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot | Special Session 1: Instruction-Set Customization | |
| Galuzzi, Carlo | 2009 |
Introduction to Instruction-Set Customization | Carlo Galuzzi | Special Session 1: Instruction-Set Customization | |
| Garzia, Fabio | 2009 |
Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management | Roberto Airoldi, Fabio Garzia, Tapani Ahonen, Dragomir Milojevic, Jari Nurmi | Multi/Many Cores Architectures | |
| Gaydadjiev, Georgi N. | 2009 |
Reconfigurable Multithreading Architectures: A Survey | Pavel G. Zaykov, Georgi Kuzmanov, Georgi N. Gaydadjiev | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Giorgi, Roberto | 2009 |
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture | Roberto Giorgi, Zdravko Popovic, Nikola Puzovic | Multi/Many Cores Architectures | |
| Hammari, Elena | 2009 |
Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study | Narasinga Rao Miniskar, Elena Hammari, Satyakiran Munaga, Stylianos Mamagkakis, Per Gunnar Kjeldsberg, Francky Catthoor | Architectures for Multimedia | |
| Hannig, Frank | 2009 |
Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors | Richard Membarth, Frank Hannig, Hritam Dutta, Jürgen Teich | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Hänninen, Ismo | 2009 |
Radix-4 Recoded Multiplier on Quantum-Dot Cellular Automata | Ismo Hänninen, Jarmo Takala | VLSI Architectures Design | |
| Heenes, Wolfgang | 2009 |
A Multiprocessor Architecture with an Omega Network for the Massively Parallel Model GCA | Christian Schäck, Wolfgang Heenes, Rolf Hoffmann | Multi/Many Cores Architectures | |
| Hoffmann, Rolf | 2009 |
A Multiprocessor Architecture with an Omega Network for the Massively Parallel Model GCA | Christian Schäck, Wolfgang Heenes, Rolf Hoffmann | Multi/Many Cores Architectures | |
| Huber, Bernhard | 2009 |
A Comparison of NoTA and GENESYS | Bernhard Huber, Roman Obermaisser | Architecture Modeling and Exploration Tools | |
| Huynh, Huynh Phung | 2009 |
Runtime Adaptive Extensible Embedded Processors — A Survey | Huynh Phung Huynh, Tulika Mitra | Special Session 1: Instruction-Set Customization | |
| Jääskeläinen, Pekka | 2009 |
Programmable and Scalable Architecture for Graphics Processing Units | Carlos S. de la Lama, Pekka Jääskeläinen, Jarmo Takala | Architectures for Multimedia | |
| Jääskeläinen, Pekka | 2009 |
Programmable Accelerators for Reconfigurable Video Decoder | Tero Rintaluoma, Timo Reinikka, Joona Rouvinen, Jani Boutellier, Pekka Jääskeläinen, Olli Silven | Architectures for Multimedia | |
| Jan, Yahya | 2009 |
CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey | Yahya Jan, Lech Jozwiak | Architectures for Multimedia | |
| Jozwiak, Lech | 2009 |
CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey | Yahya Jan, Lech Jozwiak | Architectures for Multimedia | |
| Karl, Wolfgang | 2009 |
An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems | Rainer Buchty, Mario Kicherer, David Kramer, Wolfgang Karl | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Karlström, Per | 2009 |
NoGAP: A Micro Architecture Construction Framework | Per Karlström, Dake Liu | Architecture Modeling and Exploration Tools | |
| Karuri, Kingshuk | 2009 |
A Generic Design Flow for Application Specific Processor Customization through Instruction-Set Extensions (ISEs) | Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Special Session 1: Instruction-Set Customization | |
| Kato, Shinichi | 2009 |
Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI | Shinichi Kato, Minoru Watanabe | VLSI Architectures Design | |
| Kicherer, Mario | 2009 |
An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems | Rainer Buchty, Mario Kicherer, David Kramer, Wolfgang Karl | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Kjeldsberg, Per Gunnar | 2009 |
Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study | Narasinga Rao Miniskar, Elena Hammari, Satyakiran Munaga, Stylianos Mamagkakis, Per Gunnar Kjeldsberg, Francky Catthoor | Architectures for Multimedia | |
| Kramer, David | 2009 |
An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems | Rainer Buchty, Mario Kicherer, David Kramer, Wolfgang Karl | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Kuchcinski, Krzysztof | 2009 |
Constraint-Driven Identification of Application Specific Instructions in the DURASE System | Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot | Special Session 1: Instruction-Set Customization | |
| Kuzmanov, Georgi | 2009 |
Reconfigurable Multithreading Architectures: A Survey | Pavel G. Zaykov, Georgi Kuzmanov, Georgi N. Gaydadjiev | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Labarta, Jesus | 2009 |
Exploiting Locality on the Cell/B.E. through Bypassing | Pieter Bellens, Josep M. Perez, Rosa M. Badia, Jesus Labarta | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Leupers, Rainer | 2009 |
A Generic Design Flow for Application Specific Processor Customization through Instruction-Set Extensions (ISEs) | Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Special Session 1: Instruction-Set Customization | |
| Liu, Dake | 2009 |
NoGAP: A Micro Architecture Construction Framework | Per Karlström, Dake Liu | Architecture Modeling and Exploration Tools | |
| Mamagkakis, Stylianos | 2009 |
Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study | Narasinga Rao Miniskar, Elena Hammari, Satyakiran Munaga, Stylianos Mamagkakis, Per Gunnar Kjeldsberg, Francky Catthoor | Architectures for Multimedia | |
| Martin, Kevin | 2009 |
Constraint-Driven Identification of Application Specific Instructions in the DURASE System | Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot | Special Session 1: Instruction-Set Customization | |
| Meijer, Sjoerd | 2009 |
Realizing FIFO Communication When Mapping Kahn Process Networks onto the Cell | Dmitry Nadezhkin, Sjoerd Meijer, Todor Stefanov, Ed F. Deprettere | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Membarth, Richard | 2009 |
Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors | Richard Membarth, Frank Hannig, Hritam Dutta, Jürgen Teich | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Meyr, Heinrich | 2009 |
A Generic Design Flow for Application Specific Processor Customization through Instruction-Set Extensions (ISEs) | Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr | Special Session 1: Instruction-Set Customization | |
| Milojevic, Dragomir | 2009 |
Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management | Roberto Airoldi, Fabio Garzia, Tapani Ahonen, Dragomir Milojevic, Jari Nurmi | Multi/Many Cores Architectures | |
| Miniskar, Narasinga Rao | 2009 |
Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study | Narasinga Rao Miniskar, Elena Hammari, Satyakiran Munaga, Stylianos Mamagkakis, Per Gunnar Kjeldsberg, Francky Catthoor | Architectures for Multimedia | |
| Mitra, Tulika | 2009 |
Runtime Adaptive Extensible Embedded Processors — A Survey | Huynh Phung Huynh, Tulika Mitra | Special Session 1: Instruction-Set Customization | |
| Monakov, Alexander | 2009 |
Implementing Blocked Sparse Matrix-Vector Multiplication on NVIDIA GPUs | Alexander Monakov, Arutyun Avetisyan | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Mudge, Trevor | 2009 |
Reconfigurable Multicore Server Processors for Low Power Operation | Ronald G. Dreslinski, David Fick, David Blaauw, Dennis Sylvester, Trevor Mudge | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Munaga, Satyakiran | 2009 |
Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study | Narasinga Rao Miniskar, Elena Hammari, Satyakiran Munaga, Stylianos Mamagkakis, Per Gunnar Kjeldsberg, Francky Catthoor | Architectures for Multimedia | |
| Nadezhkin, Dmitry | 2009 |
Realizing FIFO Communication When Mapping Kahn Process Networks onto the Cell | Dmitry Nadezhkin, Sjoerd Meijer, Todor Stefanov, Ed F. Deprettere | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Najjar, Walid A. | 2009 |
Reconfigurable Computing in the New Age of Parallelism | Walid A. Najjar, Jason Villarreal | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Namyst, Raymond | 2009 |
Exploiting the Cell/BE Architecture with the StarPU Unified Runtime System | Cédric Augonnet, Samuel Thibault, Raymond Namyst, Maik Nijhuis | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Nijhuis, Maik | 2009 |
Exploiting the Cell/BE Architecture with the StarPU Unified Runtime System | Cédric Augonnet, Samuel Thibault, Raymond Namyst, Maik Nijhuis | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Nurmi, Jari | 2009 |
Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management | Roberto Airoldi, Fabio Garzia, Tapani Ahonen, Dragomir Milojevic, Jari Nurmi | Multi/Many Cores Architectures | |
| Obermaisser, Roman | 2009 |
A Comparison of NoTA and GENESYS | Bernhard Huber, Roman Obermaisser | Architecture Modeling and Exploration Tools | |
| Patt, Yale | 2009 |
What Else Is Broken? Can We Fix It? | Yale Patt | SAMOS IX - Beachnote | 2009-WS-01 |
| Perez, Josep M. | 2009 |
Exploiting Locality on the Cell/B.E. through Bypassing | Pieter Bellens, Josep M. Perez, Rosa M. Badia, Jesus Labarta | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Pimentel, Andy D. | 2009 |
Visualization of Computer Architecture Simulation Data for System-Level Design Space Exploration | Toktam Taghavi, Mark Thompson, Andy D. Pimentel | Architecture Modeling and Exploration Tools | |
| Popovic, Zdravko | 2009 |
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture | Roberto Giorgi, Zdravko Popovic, Nikola Puzovic | Multi/Many Cores Architectures | |
| Pratas, Frederico | 2009 |
Applying the Stream-Based Computing Model to Design Hardware Accelerators: A Case Study | Frederico Pratas, Leonel Sousa | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Puzovic, Nikola | 2009 |
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture | Roberto Giorgi, Zdravko Popovic, Nikola Puzovic | Multi/Many Cores Architectures | |
| Ramirez, Alex | 2009 |
The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors | Paul M. Carpenter, Alex Ramirez, Eduard Ayguadé | Architectures for Multimedia | |
| Reinikka, Timo | 2009 |
Programmable Accelerators for Reconfigurable Video Decoder | Tero Rintaluoma, Timo Reinikka, Joona Rouvinen, Jani Boutellier, Pekka Jääskeläinen, Olli Silven | Architectures for Multimedia | |
| Rintaluoma, Tero | 2009 |
Programmable Accelerators for Reconfigurable Video Decoder | Tero Rintaluoma, Timo Reinikka, Joona Rouvinen, Jani Boutellier, Pekka Jääskeläinen, Olli Silven | Architectures for Multimedia | |
| Rouvinen, Joona | 2009 |
Programmable Accelerators for Reconfigurable Video Decoder | Tero Rintaluoma, Timo Reinikka, Joona Rouvinen, Jani Boutellier, Pekka Jääskeläinen, Olli Silven | Architectures for Multimedia | |
| Schäck, Christian | 2009 |
A Multiprocessor Architecture with an Omega Network for the Massively Parallel Model GCA | Christian Schäck, Wolfgang Heenes, Rolf Hoffmann | Multi/Many Cores Architectures | |
| Schröder, Hartmut | 2009 |
Modeling Scalable SIMD DSPs in LISA | Peter Westermann, Hartmut Schröder | Architecture Modeling and Exploration Tools | |
| Sijbers, Jan | 2009 |
Experiences with Cell-BE and GPU for Tomography | Sander van der Maar, Kees Joost Batenburg, Jan Sijbers | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Silven, Olli | 2009 |
Programmable Accelerators for Reconfigurable Video Decoder | Tero Rintaluoma, Timo Reinikka, Joona Rouvinen, Jani Boutellier, Pekka Jääskeläinen, Olli Silven | Architectures for Multimedia | |
| Sousa, Leonel | 2009 |
Applying the Stream-Based Computing Model to Design Hardware Accelerators: A Case Study | Frederico Pratas, Leonel Sousa | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Stefanov, Todor | 2009 |
Realizing FIFO Communication When Mapping Kahn Process Networks onto the Cell | Dmitry Nadezhkin, Sjoerd Meijer, Todor Stefanov, Ed F. Deprettere | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Sylvester, Dennis | 2009 |
Reconfigurable Multicore Server Processors for Low Power Operation | Ronald G. Dreslinski, David Fick, David Blaauw, Dennis Sylvester, Trevor Mudge | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Taghavi, Toktam | 2009 |
Visualization of Computer Architecture Simulation Data for System-Level Design Space Exploration | Toktam Taghavi, Mark Thompson, Andy D. Pimentel | Architecture Modeling and Exploration Tools | |
| Takala, Jarmo | 2009 |
Programmable and Scalable Architecture for Graphics Processing Units | Carlos S. de la Lama, Pekka Jääskeläinen, Jarmo Takala | Architectures for Multimedia | |
| Takala, Jarmo | 2009 |
Radix-4 Recoded Multiplier on Quantum-Dot Cellular Automata | Ismo Hänninen, Jarmo Takala | VLSI Architectures Design | |
| Teich, Jürgen | 2009 |
Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors | Richard Membarth, Frank Hannig, Hritam Dutta, Jürgen Teich | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Thibault, Samuel | 2009 |
Exploiting the Cell/BE Architecture with the StarPU Unified Runtime System | Cédric Augonnet, Samuel Thibault, Raymond Namyst, Maik Nijhuis | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Thompson, Mark | 2009 |
Visualization of Computer Architecture Simulation Data for System-Level Design Space Exploration | Toktam Taghavi, Mark Thompson, Andy D. Pimentel | Architecture Modeling and Exploration Tools | |
| Tolun, Mehmet R. | 2009 |
Multiple Description Scalable Coding for Video Transmission over Unreliable Networks | Roya Choupani, Stephan Wong, Mehmet R. Tolun | Architectures for Multimedia | |
| Uhrig, Sascha | 2009 |
Evaluation of Different Multithreaded and Multicore Processor Configurations for SoPC | Sascha Uhrig | Multi/Many Cores Architectures | |
| van der Maar, Sander | 2009 |
Experiences with Cell-BE and GPU for Tomography | Sander van der Maar, Kees Joost Batenburg, Jan Sijbers | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Varbanescu, Ana L. | 2009 |
Introduction to Mastering Cell BE and GPU Execution Platforms | Ed F. Deprettere, Ana L. Varbanescu | Special Session 3: Mastering Cell BE and GPU Execution Platforms |
|
| Villarreal, Jason | 2009 |
Reconfigurable Computing in the New Age of Parallelism | Walid A. Najjar, Jason Villarreal | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Watanabe, Minoru | 2009 |
Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI | Shinichi Kato, Minoru Watanabe | VLSI Architectures Design | |
| Westermann, Peter | 2009 |
Modeling Scalable SIMD DSPs in LISA | Peter Westermann, Hartmut Schröder | Architecture Modeling and Exploration Tools | |
| Wolinski, Christophe | 2009 |
Constraint-Driven Identification of Application Specific Instructions in the DURASE System | Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot | Special Session 1: Instruction-Set Customization | |
| Wong, Stephan | 2009 |
Multiple Description Scalable Coding for Video Transmission over Unreliable Networks | Roya Choupani, Stephan Wong, Mehmet R. Tolun | Architectures for Multimedia | |
| Wong, Stephan | 2009 |
Introduction to the Future of Reconfigurable Computing and Processor Architectures | Luigi Carro, Stephan Wong | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Xu, Ying | 2009 |
Prediction in Dynamic SDRAM Controller Policies | Ying Xu, Aabhas S. Agarwal, Brian T. Davis | VLSI Architectures Design | |
| Zaykov, Pavel G. | 2009 |
Reconfigurable Multithreading Architectures: A Survey | Pavel G. Zaykov, Georgi Kuzmanov, Georgi N. Gaydadjiev | Special Session 2: The Future of Reconfigurable Computing and Processor Architectures |
|
| Aliaga, R.J. | 2009 |
A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA | R.J. Aliaga, R. Gadea, R.J. Colom, J. Cerda, N. Ferrando, V. Herrero | RECONFIGURABLE SYSTEMS | |
| Ayguadé, Eduard | 2009 |
OpenMP extensions for FPGA accelerators | D. Cabrera, Xavier Martorell, Georgi N. Gaydadjiev, Eduard Ayguadé, D. Jimenez-Gonzalez | RECONFIGURABLE SYSTEMS | |
| Bachmann, C. | 2009 |
An emulation-based real-time power profiling unit for embedded software | A. Genser, C. Bachmann, J. Haid, C. Steger, R. Weiss | Simulation and Emulation Techniques | |
| Bacivarov, I. | 2009 |
Generation and calibration of compositional performance analysis models for multi-processor systems | W. Haid, M. Keller, Huang Kai, I. Bacivarov, L. Thiele | Multiprocessor Modeling and Evaluation | |
| Balzola, P. | 2009 |
Synchronization on heterogeneous multiprocessor systems | Mayan Moudgill, V. Kalashnikov, Murugappan Senthilvelan, U. Srikantiah, Li Tak-po, P. Balzola, John Glossner | Multiprocessor Communication and Synchronization | |
| Bekooij, Marco J.G. | 2009 |
Inter-task communication via overlapping read and write windows for deadlock-free execution of cyclic task graphs | T. Bijlsma, Marco J.G. Bekooij, Gerard J. M. Smit | Multiprocessor Communication and Synchronization | |
| Bengtsson, J. | 2009 |
Manycore performance analysis using timed configuration graphs | J. Bengtsson, B. Svensson | Multiprocessor Modeling and Evaluation | |
| Bijlsma, T. | 2009 |
Inter-task communication via overlapping read and write windows for deadlock-free execution of cyclic task graphs | T. Bijlsma, Marco J.G. Bekooij, Gerard J. M. Smit | Multiprocessor Communication and Synchronization | |
| Blume, Holger | 2009 |
Hardware-based synchronization framework for heterogeneous RISC/Coprocessor architectures | Holger Flatt, I. Schmadecke, M. Kargel, Holger Blume, Peter Pirsch | Multiprocessor Communication and Synchronization | |
| Cabrera, D. | 2009 |
OpenMP extensions for FPGA accelerators | D. Cabrera, Xavier Martorell, Georgi N. Gaydadjiev, Eduard Ayguadé, D. Jimenez-Gonzalez | RECONFIGURABLE SYSTEMS | |
| Casseau, E. | 2009 |
High-level synthesis for the design of FPGA-based signal processing systems | E. Casseau, B. Le Gal | RECONFIGURABLE SYSTEMS | |
| Catthoor, Francky | 2009 |
Novel energy-efficient scalable soft-output SSFE MIMO detector architectures | R. Fasthuber, Li Min, David Novo, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor | Architectures and Implementations | |
| Cerda, J. | 2009 |
A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA | R.J. Aliaga, R. Gadea, R.J. Colom, J. Cerda, N. Ferrando, V. Herrero | RECONFIGURABLE SYSTEMS | |
| Chakrabarti, Chaitali | 2009 |
Customizing wide-SIMD architectures for H.264 | S. Seo, Mark Woh, Scott Mahlke, Trevor Mudge, S. Vijay, Chaitali Chakrabarti | Architectures and Implementations | |
| Chen, Sao-Jie | 2009 |
Parallel implementation of convolution encoder for software defined radio on DSP architecture | Jui-Chieh Lin, Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, Sao-Jie Chen, Yu-Hen Hu | Architectures and Implementations | |
| Colom, R.J. | 2009 |
A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA | R.J. Aliaga, R. Gadea, R.J. Colom, J. Cerda, N. Ferrando, V. Herrero | RECONFIGURABLE SYSTEMS | |
| Corporaal, Henk | 2009 |
Performance evaluation of concurrently executing parallel applications on multi-processor systems | Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal | Multiprocessor Modeling and Evaluation | |
| Daruwalla, S. | 2009 |
Adaptive simulation sampling using an Autoregressive framework | S. Daruwalla, R. Sendag, J. Yi | Simulation and Emulation Techniques | |
| Fasthuber, R. | 2009 |
Novel energy-efficient scalable soft-output SSFE MIMO detector architectures | R. Fasthuber, Li Min, David Novo, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor | Architectures and Implementations | |
| Ferrando, N. | 2009 |
A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA | R.J. Aliaga, R. Gadea, R.J. Colom, J. Cerda, N. Ferrando, V. Herrero | RECONFIGURABLE SYSTEMS | |
| Flatt, Holger | 2009 |
Hardware-based synchronization framework for heterogeneous RISC/Coprocessor architectures | Holger Flatt, I. Schmadecke, M. Kargel, Holger Blume, Peter Pirsch | Multiprocessor Communication and Synchronization | |
| Gadea, R. | 2009 |
A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA | R.J. Aliaga, R. Gadea, R.J. Colom, J. Cerda, N. Ferrando, V. Herrero | RECONFIGURABLE SYSTEMS | |
| Garga, G. | 2009 |
High-throughput flexible constraint length Viterbi decoders on de Bruijn, shuffle-exchange and butterfly connected architectures | G. Garga, David Guevorkian, S.K. Nandy, H.S. Jamadagni | Architectures and Implementations | |
| Gaydadjiev, Georgi N. | 2009 |
OpenMP extensions for FPGA accelerators | D. Cabrera, Xavier Martorell, Georgi N. Gaydadjiev, Eduard Ayguadé, D. Jimenez-Gonzalez | RECONFIGURABLE SYSTEMS | |
| Genser, A. | 2009 |
An emulation-based real-time power profiling unit for embedded software | A. Genser, C. Bachmann, J. Haid, C. Steger, R. Weiss | Simulation and Emulation Techniques | |
| Glossner, John | 2009 |
Synchronization on heterogeneous multiprocessor systems | Mayan Moudgill, V. Kalashnikov, Murugappan Senthilvelan, U. Srikantiah, Li Tak-po, P. Balzola, John Glossner | Multiprocessor Communication and Synchronization | |
| Guevorkian, David | 2009 |
High-throughput flexible constraint length Viterbi decoders on de Bruijn, shuffle-exchange and butterfly connected architectures | G. Garga, David Guevorkian, S.K. Nandy, H.S. Jamadagni | Architectures and Implementations | |
| Ha, Soonhoi | 2009 |
A timed HW/SW coemulation technique for fast yet accurate system verification | Hoeseok Yang, Youngmin Yi, Soonhoi Ha | Simulation and Emulation Techniques | |
| Haid, J. | 2009 |
An emulation-based real-time power profiling unit for embedded software | A. Genser, C. Bachmann, J. Haid, C. Steger, R. Weiss | Simulation and Emulation Techniques | |
| Haid, W. | 2009 |
Generation and calibration of compositional performance analysis models for multi-processor systems | W. Haid, M. Keller, Huang Kai, I. Bacivarov, L. Thiele | Multiprocessor Modeling and Evaluation | |
| Herrero, V. | 2009 |
A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA | R.J. Aliaga, R. Gadea, R.J. Colom, J. Cerda, N. Ferrando, V. Herrero | RECONFIGURABLE SYSTEMS | |
| Hsiung, Pao-Ann | 2009 |
Parallel implementation of convolution encoder for software defined radio on DSP architecture | Jui-Chieh Lin, Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, Sao-Jie Chen, Yu-Hen Hu | Architectures and Implementations | |
| Hu, Yu-Hen | 2009 |
Parallel implementation of convolution encoder for software defined radio on DSP architecture | Jui-Chieh Lin, Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, Sao-Jie Chen, Yu-Hen Hu | Architectures and Implementations | |
| Jamadagni, H.S. | 2009 |
High-throughput flexible constraint length Viterbi decoders on de Bruijn, shuffle-exchange and butterfly connected architectures | G. Garga, David Guevorkian, S.K. Nandy, H.S. Jamadagni | Architectures and Implementations | |
| Jimenez-Gonzalez, D. | 2009 |
OpenMP extensions for FPGA accelerators | D. Cabrera, Xavier Martorell, Georgi N. Gaydadjiev, Eduard Ayguadé, D. Jimenez-Gonzalez | RECONFIGURABLE SYSTEMS | |
| Kai, Huang | 2009 |
Generation and calibration of compositional performance analysis models for multi-processor systems | W. Haid, M. Keller, Huang Kai, I. Bacivarov, L. Thiele | Multiprocessor Modeling and Evaluation | |
| Kalashnikov, V. | 2009 |
Synchronization on heterogeneous multiprocessor systems | Mayan Moudgill, V. Kalashnikov, Murugappan Senthilvelan, U. Srikantiah, Li Tak-po, P. Balzola, John Glossner | Multiprocessor Communication and Synchronization | |
| Kalokerinos, G. | 2009 |
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability | G. Kalokerinos, V. Papaefstathiou, G. Nikiforos, S. Kavadias, Manolis G.H. Katevenis, D. Pnevmatikatos, Yang Xiaojun | Multiprocessor Communication and Synchronization | |
| Kargel, M. | 2009 |
Hardware-based synchronization framework for heterogeneous RISC/Coprocessor architectures | Holger Flatt, I. Schmadecke, M. Kargel, Holger Blume, Peter Pirsch | Multiprocessor Communication and Synchronization | |
| Katevenis, Manolis G.H. | 2009 |
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability | G. Kalokerinos, V. Papaefstathiou, G. Nikiforos, S. Kavadias, Manolis G.H. Katevenis, D. Pnevmatikatos, Yang Xiaojun | Multiprocessor Communication and Synchronization | |
| Kavadias, S. | 2009 |
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability | G. Kalokerinos, V. Papaefstathiou, G. Nikiforos, S. Kavadias, Manolis G.H. Katevenis, D. Pnevmatikatos, Yang Xiaojun | Multiprocessor Communication and Synchronization | |
| Kaxiras, Stefanos | 2009 |
Instruction-based reuse-distance prediction for effective cache management | Pavlos Petoumenos, Georgios Keramidas, Stefanos Kaxiras | Instruction Scheduling and Microarchitecture Optimizations | |
| Keller, M. | 2009 |
Generation and calibration of compositional performance analysis models for multi-processor systems | W. Haid, M. Keller, Huang Kai, I. Bacivarov, L. Thiele | Multiprocessor Modeling and Evaluation | |
| Keramidas, Georgios | 2009 |
Instruction-based reuse-distance prediction for effective cache management | Pavlos Petoumenos, Georgios Keramidas, Stefanos Kaxiras | Instruction Scheduling and Microarchitecture Optimizations | |
| Kumar, Akash | 2009 |
Performance evaluation of concurrently executing parallel applications on multi-processor systems | Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal | Multiprocessor Modeling and Evaluation | |
| Le Gal, B. | 2009 |
High-level synthesis for the design of FPGA-based signal processing systems | E. Casseau, B. Le Gal | RECONFIGURABLE SYSTEMS | |
| Lin, Jui-Chieh | 2009 |
Parallel implementation of convolution encoder for software defined radio on DSP architecture | Jui-Chieh Lin, Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, Sao-Jie Chen, Yu-Hen Hu | Architectures and Implementations | |
| Mahlke, Scott | 2009 |
Customizing wide-SIMD architectures for H.264 | S. Seo, Mark Woh, Scott Mahlke, Trevor Mudge, S. Vijay, Chaitali Chakrabarti | Architectures and Implementations | |
| Mariani, G. | 2009 |
Multi-processor system-on-chip Design Space Exploration based on multi-level modeling techniques | G. Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria | Multiprocessor Modeling and Evaluation | |
| Martin, G. | 2009 |
“Slower than you think” — The evolution of processor and SoC architectures | G. Martin | SAMOS IX - Keynote | 2009-IC-02 |
| Martorell, Xavier | 2009 |
OpenMP extensions for FPGA accelerators | D. Cabrera, Xavier Martorell, Georgi N. Gaydadjiev, Eduard Ayguadé, D. Jimenez-Gonzalez | RECONFIGURABLE SYSTEMS | |
| Mesman, Bart | 2009 |
Performance evaluation of concurrently executing parallel applications on multi-processor systems | Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal | Multiprocessor Modeling and Evaluation | |
| Min, Li | 2009 |
Novel energy-efficient scalable soft-output SSFE MIMO detector architectures | R. Fasthuber, Li Min, David Novo, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor | Architectures and Implementations | |
| Moshovos, A. | 2009 |
A physical-level study of the compacted matrix instruction scheduler for dynamically-scheduled superscalar processors | E. Safi, A. Moshovos, A. Veneris | Instruction Scheduling and Microarchitecture Optimizations | |
| Moudgill, Mayan | 2009 |
Synchronization on heterogeneous multiprocessor systems | Mayan Moudgill, V. Kalashnikov, Murugappan Senthilvelan, U. Srikantiah, Li Tak-po, P. Balzola, John Glossner | Multiprocessor Communication and Synchronization | |
| Mudge, Trevor | 2009 |
Customizing wide-SIMD architectures for H.264 | S. Seo, Mark Woh, Scott Mahlke, Trevor Mudge, S. Vijay, Chaitali Chakrabarti | Architectures and Implementations | |
| Mujadiya, N.V. | 2009 |
Instruction scheduling for VLIW processors under variation scenario | N.V. Mujadiya | Instruction Scheduling and Microarchitecture Optimizations | |
| Nandy, S.K. | 2009 |
RETHROTTLE: Execution throttling in the REDEFINE SoC architecture | A.N. Satrawala, S.K. Nandy | Simulation and Emulation Techniques | |
| Nandy, S.K. | 2009 |
High-throughput flexible constraint length Viterbi decoders on de Bruijn, shuffle-exchange and butterfly connected architectures | G. Garga, David Guevorkian, S.K. Nandy, H.S. Jamadagni | Architectures and Implementations | |
| Nikiforos, G. | 2009 |
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability | G. Kalokerinos, V. Papaefstathiou, G. Nikiforos, S. Kavadias, Manolis G.H. Katevenis, D. Pnevmatikatos, Yang Xiaojun | Multiprocessor Communication and Synchronization | |
| Novo, David | 2009 |
Novel energy-efficient scalable soft-output SSFE MIMO detector architectures | R. Fasthuber, Li Min, David Novo, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor | Architectures and Implementations | |
| Palermo, Gianluca | 2009 |
Multi-processor system-on-chip Design Space Exploration based on multi-level modeling techniques | G. Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria | Multiprocessor Modeling and Evaluation | |
| Papadimitriou, K. | 2009 |
High-speed FPGA-based implementations of a Genetic Algorithm | M. Vavouras, K. Papadimitriou, I. Papaefstathiou | RECONFIGURABLE SYSTEMS | |
| Papaefstathiou, I. | 2009 |
High-speed FPGA-based implementations of a Genetic Algorithm | M. Vavouras, K. Papadimitriou, I. Papaefstathiou | RECONFIGURABLE SYSTEMS | |
| Papaefstathiou, V. | 2009 |
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability | G. Kalokerinos, V. Papaefstathiou, G. Nikiforos, S. Kavadias, Manolis G.H. Katevenis, D. Pnevmatikatos, Yang Xiaojun | Multiprocessor Communication and Synchronization | |
| Petoumenos, Pavlos | 2009 |
Instruction-based reuse-distance prediction for effective cache management | Pavlos Petoumenos, Georgios Keramidas, Stefanos Kaxiras | Instruction Scheduling and Microarchitecture Optimizations | |
| Pirsch, Peter | 2009 |
Hardware-based synchronization framework for heterogeneous RISC/Coprocessor architectures | Holger Flatt, I. Schmadecke, M. Kargel, Holger Blume, Peter Pirsch | Multiprocessor Communication and Synchronization | |
| Pnevmatikatos, D. | 2009 |
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability | G. Kalokerinos, V. Papaefstathiou, G. Nikiforos, S. Kavadias, Manolis G.H. Katevenis, D. Pnevmatikatos, Yang Xiaojun | Multiprocessor Communication and Synchronization | |
| Pulli, K. | 2009 |
Mobile visual computing | K. Pulli | SAMOS IX - Keynote | 2009-IC-01 |
| Raghavan, Praveen | 2009 |
Novel energy-efficient scalable soft-output SSFE MIMO detector architectures | R. Fasthuber, Li Min, David Novo, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor | Architectures and Implementations | |
| Safi, E. | 2009 |
A physical-level study of the compacted matrix instruction scheduler for dynamically-scheduled superscalar processors | E. Safi, A. Moshovos, A. Veneris | Instruction Scheduling and Microarchitecture Optimizations | |
| Satrawala, A.N. | 2009 |
RETHROTTLE: Execution throttling in the REDEFINE SoC architecture | A.N. Satrawala, S.K. Nandy | Simulation and Emulation Techniques | |
| Schmadecke, I. | 2009 |
Hardware-based synchronization framework for heterogeneous RISC/Coprocessor architectures | Holger Flatt, I. Schmadecke, M. Kargel, Holger Blume, Peter Pirsch | Multiprocessor Communication and Synchronization | |
| Sendag, R. | 2009 |
Adaptive simulation sampling using an Autoregressive framework | S. Daruwalla, R. Sendag, J. Yi | Simulation and Emulation Techniques | |
| Senthilvelan, Murugappan | 2009 |
Synchronization on heterogeneous multiprocessor systems | Mayan Moudgill, V. Kalashnikov, Murugappan Senthilvelan, U. Srikantiah, Li Tak-po, P. Balzola, John Glossner | Multiprocessor Communication and Synchronization | |
| Seo, S. | 2009 |
Customizing wide-SIMD architectures for H.264 | S. Seo, Mark Woh, Scott Mahlke, Trevor Mudge, S. Vijay, Chaitali Chakrabarti | Architectures and Implementations | |
| Shabbir, Ahsan | 2009 |
Performance evaluation of concurrently executing parallel applications on multi-processor systems | Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal | Multiprocessor Modeling and Evaluation | |
| Silvano, Cristina | 2009 |
Multi-processor system-on-chip Design Space Exploration based on multi-level modeling techniques | G. Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria | Multiprocessor Modeling and Evaluation | |
| Smit, Gerard J. M. | 2009 |
Inter-task communication via overlapping read and write windows for deadlock-free execution of cyclic task graphs | T. Bijlsma, Marco J.G. Bekooij, Gerard J. M. Smit | Multiprocessor Communication and Synchronization | |
| Srikantiah, U. | 2009 |
Synchronization on heterogeneous multiprocessor systems | Mayan Moudgill, V. Kalashnikov, Murugappan Senthilvelan, U. Srikantiah, Li Tak-po, P. Balzola, John Glossner | Multiprocessor Communication and Synchronization | |
| Steger, C. | 2009 |
An emulation-based real-time power profiling unit for embedded software | A. Genser, C. Bachmann, J. Haid, C. Steger, R. Weiss | Simulation and Emulation Techniques | |
| Svensson, B. | 2009 |
Manycore performance analysis using timed configuration graphs | J. Bengtsson, B. Svensson | Multiprocessor Modeling and Evaluation | |
| Tak-po, Li | 2009 |
Synchronization on heterogeneous multiprocessor systems | Mayan Moudgill, V. Kalashnikov, Murugappan Senthilvelan, U. Srikantiah, Li Tak-po, P. Balzola, John Glossner | Multiprocessor Communication and Synchronization | |
| Thiele, L. | 2009 |
Generation and calibration of compositional performance analysis models for multi-processor systems | W. Haid, M. Keller, Huang Kai, I. Bacivarov, L. Thiele | Multiprocessor Modeling and Evaluation | |
| Van der Perre, Liesbet | 2009 |
Novel energy-efficient scalable soft-output SSFE MIMO detector architectures | R. Fasthuber, Li Min, David Novo, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor | Architectures and Implementations | |
| Vavouras, M. | 2009 |
High-speed FPGA-based implementations of a Genetic Algorithm | M. Vavouras, K. Papadimitriou, I. Papaefstathiou | RECONFIGURABLE SYSTEMS | |
| Veneris, A. | 2009 |
A physical-level study of the compacted matrix instruction scheduler for dynamically-scheduled superscalar processors | E. Safi, A. Moshovos, A. Veneris | Instruction Scheduling and Microarchitecture Optimizations | |
| Vijay, S. | 2009 |
Customizing wide-SIMD architectures for H.264 | S. Seo, Mark Woh, Scott Mahlke, Trevor Mudge, S. Vijay, Chaitali Chakrabarti | Architectures and Implementations | |
| Weiss, R. | 2009 |
An emulation-based real-time power profiling unit for embedded software | A. Genser, C. Bachmann, J. Haid, C. Steger, R. Weiss | Simulation and Emulation Techniques | |
| Woh, Mark | 2009 |
Customizing wide-SIMD architectures for H.264 | S. Seo, Mark Woh, Scott Mahlke, Trevor Mudge, S. Vijay, Chaitali Chakrabarti | Architectures and Implementations | |
| Xiaojun, Yang | 2009 |
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability | G. Kalokerinos, V. Papaefstathiou, G. Nikiforos, S. Kavadias, Manolis G.H. Katevenis, D. Pnevmatikatos, Yang Xiaojun | Multiprocessor Communication and Synchronization | |
| Yang, Hoeseok | 2009 |
A timed HW/SW coemulation technique for fast yet accurate system verification | Hoeseok Yang, Youngmin Yi, Soonhoi Ha | Simulation and Emulation Techniques | |
| Yen, Mao-Hsu | 2009 |
Parallel implementation of convolution encoder for software defined radio on DSP architecture | Jui-Chieh Lin, Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, Sao-Jie Chen, Yu-Hen Hu | Architectures and Implementations | |
| Yi, J. | 2009 |
Adaptive simulation sampling using an Autoregressive framework | S. Daruwalla, R. Sendag, J. Yi | Simulation and Emulation Techniques | |
| Yi, Youngmin | 2009 |
A timed HW/SW coemulation technique for fast yet accurate system verification | Hoeseok Yang, Youngmin Yi, Soonhoi Ha | Simulation and Emulation Techniques | |
| Yu, Chu | 2009 |
Parallel implementation of convolution encoder for software defined radio on DSP architecture | Jui-Chieh Lin, Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, Sao-Jie Chen, Yu-Hen Hu | Architectures and Implementations | |
| Zaccaria, Vittorio | 2009 |
Multi-processor system-on-chip Design Space Exploration based on multi-level modeling techniques | G. Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria | Multiprocessor Modeling and Evaluation | |
| Alle, Mythri | 2010 |
Enhancements for Variable N-point Streaming FFT/IFFT on REDEFINE, a Runtime Reconfigurable Architecture | N.Thambi Prashank, M. Prasadarao, Avinaba Dutta, Keshavan Varadarajan, Mythri Alle, S.K. Nandy | Network-On-Chip Interconnects | |
| Alle, Mythri | 2010 |
Design Space Exploration of Systolic Realization of QR Factorization on a Runtime Reconfigurable Platform | Prasenjit Biswas, Keshavan Varadarajan, Mythri Alle, S.K. Nandy | Design Space Exploration | |
| Anagnostopoulos, Iraklis | 2010 |
Custom Multi-Threaded Dynamic Memory Management for Multiprocessor System-on-Chip Platforms | Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris, Kiamal Pekmestzi | System-Level Design | |
| Arabi, Tawfik | 2010 |
VLSI Challenges to more Energy Efficient Devices | Tawfik Arabi | SAMOS X - Keynote | 2010-IC-02 |
| Arandi, Samer | 2010 |
Programming Multi-core Architectures Using Data-Flow Techniques | Samer Arandi, Paraskevas Evripidou | MP-SoC Programming | |
| Arlati, Fabio | 2010 |
Designing and Validating Access Policies to Reconfigurable Resources in Multiprocessor Systems on Chip | Fabio Arlati, Francesco Bruschi, Donatella Sciuto | Special Session on Multicore Architectures for Embedded Systems | |
| Arnold, Oliver | 2010 |
Power Aware Heterogeneous MPSoC with Dynamic Task Scheduling and Increased Data Locality for Multiple Applications | Oliver Arnold, Gerhard Fettweis | System-Level Design | |
| Banz, Christian | 2010 |
Real-Time Stereo Vision System using Semi-Global Matching Disparity Estimation: Architecture and FPGA-Implementation | Christian Banz, Sebastian Hesselbarth, Holger Flatt, Holger Blume, Peter Pirsch | Image and Video Processing | |
| Bartzas, Alexandros | 2010 |
Custom Multi-Threaded Dynamic Memory Management for Multiprocessor System-on-Chip Platforms | Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris, Kiamal Pekmestzi | System-Level Design | |
| Becker, Jürgen | 2010 |
Message Passing Interface Support for the Runtime Adaptive Multi-Processor System-on-Chip RAMPSoC | Diana Goehringer, Michael Hubner, Laure Hugot-Derville, Jürgen Becker | Special Session on Multicore Architectures for Embedded Systems | |
| Bertozzi, Davide | 2010 |
A Library of Dual-Clock FIFOs for Cost-Effective and Flexible MPSoCs Design | Alessandro Strano, Daniele Ludovici, Davide Bertozzi | Simulation and Modeling | |
| Bhattacharyya, Shuvra S. | 2010 |
Efficient Static Buffering to Guarantee Throughput-Optimal FPGA Implementation of Synchronous Dataflow Graphs | Hojin Kee, Shuvra S. Bhattacharyya, Jacob Kornerup | Profiling and Analysis | |
| Biswas, Prasenjit | 2010 |
Design Space Exploration of Systolic Realization of QR Factorization on a Runtime Reconfigurable Platform | Prasenjit Biswas, Keshavan Varadarajan, Mythri Alle, S.K. Nandy | Design Space Exploration | |
| Blott, Michaela | 2010 |
Design of a Flexible High-speed FPGA-based Flow Monitor for Next Generation Networks | John McGlone, Roger Woods, Alan Marshall, Michaela Blott | Network Processing | |
| Blume, Holger | 2010 |
A Fully Programmable FSM-based Processing Engine for Gigabytes/s Header Parsing | Konstantin Septinus, Peter Pirsch, Holger Blume, Ulrich Mayer | Network Processing | |
| Blume, Holger | 2010 |
Real-Time Stereo Vision System using Semi-Global Matching Disparity Estimation: Architecture and FPGA-Implementation | Christian Banz, Sebastian Hesselbarth, Holger Flatt, Holger Blume, Peter Pirsch | Image and Video Processing | |
| Bohm, Igor | 2010 |
Cycle-Accurate Performance Modelling in an Ultra-Fast Just-In-Time Dynamic Binary Translation Instruction Set Simulator | Igor Bohm, Bjorn Franke, Nigel Topham | Simulation and Modeling | |
| Bordoloi, Unmesh D. | 2010 |
Design Space Exploration of Instruction Set Customizable MPSoCs for Multimedia Applications | Unmesh D. Bordoloi, Huynh Phung Huynh, Tulika Mitra, Samarjit Chakraborty | MP-SoC Programming | |
| Bruschi, Francesco | 2010 |
Designing and Validating Access Policies to Reconfigurable Resources in Multiprocessor Systems on Chip | Fabio Arlati, Francesco Bruschi, Donatella Sciuto | Special Session on Multicore Architectures for Embedded Systems | |
| Cabarcas, Felipe | 2010 |
Interleaving Granularity on High Bandwidth Memory Architecture for CMPs | Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex Ramirez | Micro-Architecture | |
| Carro, Luigi | 2010 |
Monitor-Adapter Coupling for NOC Performance Tuning | Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Kastensmidt, Altamiro Susin, Marcio Kreutz | Network-On-Chip Interconnects | |
| Carro, Luigi | 2010 |
Introduction to the Special Session on Multicore Architectures for Embedded Systems | Luigi Carro, Stephan Wong | Special Session on Multicore Architectures for Embedded Systems | |
| Chakraborty, Samarjit | 2010 |
Design Space Exploration of Instruction Set Customizable MPSoCs for Multimedia Applications | Unmesh D. Bordoloi, Huynh Phung Huynh, Tulika Mitra, Samarjit Chakraborty | MP-SoC Programming | |
| Chen, Sao-Jie | 2010 |
ARAL-CR: An Adaptive Reasoning and Learning Cognitive Radio Platform |
Sao-Jie Chen, Pao-Ann Hsiung, Chu Yu, Mao-Hsu Yen, Sakir Sezer, Michael Schulte, Yu-Hen Hu | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Chun, Joon Hwa | 2010 |
CORDIC-Based LMMSE Equalizer for Software Defined Radio | Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael Schulte, John Glossner | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Ciobanu, Catalin | 2010 |
A Polymorphic Register File for Matrix Operations | Catalin Ciobanu, Georgi Kuzmanov, Georgi N. Gaydadjiev, Alex Ramirez | Micro-Architecture | |
| Concatto, Caroline | 2010 |
Monitor-Adapter Coupling for NOC Performance Tuning | Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Kastensmidt, Altamiro Susin, Marcio Kreutz | Network-On-Chip Interconnects | |
| Cornero, Marco | 2010 |
CLI-Based Compilation Flows for the C Language | Erven Rohou, Andrea C. Ornstein, Marco Cornero | MP-SoC Programming | |
| Corporaal, Henk | 2010 |
Fast Huffman Decoding by Exploiting Data Level Parallelism | Tim Drijvers, Carlos Alba Pinto, Henk Corporaal, Bart Mesman | Image and Video Processing | |
| Corporaal, Henk | 2010 |
Compile-time GPU Memory Access Optimizations | Gert-Jan van den Braak, Bart Mesman, Henk Corporaal | Compiler Techniques | |
| Dave, Dhara | 2010 |
ImpBench Revisited: An Extended Characterization of Implant-Processor Benchmarks | Christos Strydis, Dhara Dave, Georgi N. Gaydadjiev | Profiling and Analysis | |
| de la Lama, Carlos S. | 2010 |
OpenCL-based Design Methodology for Application-Specific Processors | Pekka Jääskeläinen, Carlos S. de la Lama, Pablo Huerta, Jarmo Takala | Compiler Techniques | |
| de Windt, Jason | 2010 |
On-chip Network Interfaces supporting automatic burst write creation, posted writes and read prefetch | Radu Stefan, Jason de Windt, Kees Goossens | Network-On-Chip Interconnects | |
| Declerck, Jeroen | 2010 |
SDR Platform for 802.11n and 3-GPP LTE | Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Dejonghe, Antoine | 2010 |
SDR Platform for 802.11n and 3-GPP LTE | Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Drijvers, Tim | 2010 |
Fast Huffman Decoding by Exploiting Data Level Parallelism | Tim Drijvers, Carlos Alba Pinto, Henk Corporaal, Bart Mesman | Image and Video Processing | |
| Dutta, Avinaba | 2010 |
Enhancements for Variable N-point Streaming FFT/IFFT on REDEFINE, a Runtime Reconfigurable Architecture | N.Thambi Prashank, M. Prasadarao, Avinaba Dutta, Keshavan Varadarajan, Mythri Alle, S.K. Nandy | Network-On-Chip Interconnects | |
| El Mrabti, Amin | 2010 |
Design Environment for the Support of Configurable Network Interfaces in NoC-based Platforms | Amin El Mrabti, Frederic Rousseau, Frederic Petrot, Jerome Martin, Romain Lemaire, Emmanuel Vaumorin | Network Processing | |
| Etsion, Yoav | 2010 |
Interleaving Granularity on High Bandwidth Memory Architecture for CMPs | Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex Ramirez | Micro-Architecture | |
| Evripidou, Paraskevas | 2010 |
Programming Multi-core Architectures Using Data-Flow Techniques | Samer Arandi, Paraskevas Evripidou | MP-SoC Programming | |
| Fakhraie, Sied Mehdi | 2010 |
Energy-Aware Design Space Exploration of RegisterFile for Extensible Processors | Amir Yazdanbakhsh, Mehdi Kamal, Mostafa E. Salehi, Hamid Noori, Sied Mehdi Fakhraie | Design Space Exploration | |
| Falcao, Gabriel | 2010 |
Embedded Multicore Architectures for LDPC Decoding | Gabriel Falcao, Leonel Sousa, Vitor Silva | Special Session on Multicore Architectures for Embedded Systems | |
| Fenacci, Damon | 2010 |
Empirical Evaluation of Data Transformations for Network Infrastructure Applications | Damon Fenacci, Bjorn Franke | Network Processing | |
| Fettweis, Gerhard | 2010 |
Power Aware Heterogeneous MPSoC with Dynamic Task Scheduling and Increased Data Locality for Multiple Applications | Oliver Arnold, Gerhard Fettweis | System-Level Design | |
| Fettweis, Gerhard | 2010 |
Code Generation for a Novel STA Architecture by Using Post-Processing Backend | Xiaoyan Jia, Gerhard Fettweis | Compiler Techniques | |
| Flatt, Holger | 2010 |
Real-Time Stereo Vision System using Semi-Global Matching Disparity Estimation: Architecture and FPGA-Implementation | Christian Banz, Sebastian Hesselbarth, Holger Flatt, Holger Blume, Peter Pirsch | Image and Video Processing | |
| Franke, Bjorn | 2010 |
Cycle-Accurate Performance Modelling in an Ultra-Fast Just-In-Time Dynamic Binary Translation Instruction Set Simulator | Igor Bohm, Bjorn Franke, Nigel Topham | Simulation and Modeling | |
| Franke, Bjorn | 2010 |
Empirical Evaluation of Data Transformations for Network Infrastructure Applications | Damon Fenacci, Bjorn Franke | Network Processing | |
| Gaydadjiev, Georgi N. | 2010 |
ImpBench Revisited: An Extended Characterization of Implant-Processor Benchmarks | Christos Strydis, Dhara Dave, Georgi N. Gaydadjiev | Profiling and Analysis | |
| Gaydadjiev, Georgi N. | 2010 |
A Polymorphic Register File for Matrix Operations | Catalin Ciobanu, Georgi Kuzmanov, Georgi N. Gaydadjiev, Alex Ramirez | Micro-Architecture | |
| Gerstlauer, Andreas | 2010 |
A System-Level Synthesis Approach from Formal Application Models to Generic Bus-Based MPSoCs | Jens Gladigau, Andreas Gerstlauer, Christian Haubelt, Martin Streubuhr, Jürgen Teich | System-Level Design | |
| Gladigau, Jens | 2010 |
A System-Level Synthesis Approach from Formal Application Models to Generic Bus-Based MPSoCs | Jens Gladigau, Andreas Gerstlauer, Christian Haubelt, Martin Streubuhr, Jürgen Teich | System-Level Design | |
| Glossner, John | 2010 |
Introduction to the Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | John Glossner | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Glossner, John | 2010 |
CORDIC-Based LMMSE Equalizer for Software Defined Radio | Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael Schulte, John Glossner | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Goehringer, Diana | 2010 |
Message Passing Interface Support for the Runtime Adaptive Multi-Processor System-on-Chip RAMPSoC | Diana Goehringer, Michael Hubner, Laure Hugot-Derville, Jürgen Becker | Special Session on Multicore Architectures for Embedded Systems | |
| Goossens, Kees | 2010 |
On-chip Network Interfaces supporting automatic burst write creation, posted writes and read prefetch | Radu Stefan, Jason de Windt, Kees Goossens | Network-On-Chip Interconnects | |
| Gracia-Perez, Daniel | 2010 |
Transparent Sampling | Taj Muhammad Khan, Daniel Gracia-Perez, Olivier Temam | Simulation and Modeling | |
| Haubelt, Christian | 2010 |
A System-Level Synthesis Approach from Formal Application Models to Generic Bus-Based MPSoCs | Jens Gladigau, Andreas Gerstlauer, Christian Haubelt, Martin Streubuhr, Jürgen Teich | System-Level Design | |
| Hesselbarth, Sebastian | 2010 |
Real-Time Stereo Vision System using Semi-Global Matching Disparity Estimation: Architecture and FPGA-Implementation | Christian Banz, Sebastian Hesselbarth, Holger Flatt, Holger Blume, Peter Pirsch | Image and Video Processing | |
| Hicks, Michael A. | 2010 |
Towards Scalable I/O on a Many-core Architecture | Michael A. Hicks, Hicks Michiel, W. van Tol, Chris R. Jesshope | Special Session on Multicore Architectures for Embedded Systems | |
| Hildenbrand, Dietmar | 2010 |
Accelerating High-Level Engineering Computations by Automatic Compilation of Geometric Algebra to Hardware Accelerators | Jens Huthmann, Peter Muller, Florian Stock, Dietmar Hildenbrand, Andreas Koch | Compiler Techniques | |
| Hollevoet, Lieven | 2010 |
SDR Platform for 802.11n and 3-GPP LTE | Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Hormigo, Javier | 2010 |
CORDIC-Based LMMSE Equalizer for Software Defined Radio | Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael Schulte, John Glossner | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Hsiung, Pao-Ann | 2010 |
ARAL-CR: An Adaptive Reasoning and Learning Cognitive Radio Platform |
Sao-Jie Chen, Pao-Ann Hsiung, Chu Yu, Mao-Hsu Yen, Sakir Sezer, Michael Schulte, Yu-Hen Hu | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Hu, Yu-Hen | 2010 |
ARAL-CR: An Adaptive Reasoning and Learning Cognitive Radio Platform |
Sao-Jie Chen, Pao-Ann Hsiung, Chu Yu, Mao-Hsu Yen, Sakir Sezer, Michael Schulte, Yu-Hen Hu | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Hubner, Michael | 2010 |
Message Passing Interface Support for the Runtime Adaptive Multi-Processor System-on-Chip RAMPSoC | Diana Goehringer, Michael Hubner, Laure Hugot-Derville, Jürgen Becker | Special Session on Multicore Architectures for Embedded Systems | |
| Huerta, Pablo | 2010 |
OpenCL-based Design Methodology for Application-Specific Processors | Pekka Jääskeläinen, Carlos S. de la Lama, Pablo Huerta, Jarmo Takala | Compiler Techniques | |
| Hugot-Derville, Laure | 2010 |
Message Passing Interface Support for the Runtime Adaptive Multi-Processor System-on-Chip RAMPSoC | Diana Goehringer, Michael Hubner, Laure Hugot-Derville, Jürgen Becker | Special Session on Multicore Architectures for Embedded Systems | |
| Huthmann, Jens | 2010 |
Accelerating High-Level Engineering Computations by Automatic Compilation of Geometric Algebra to Hardware Accelerators | Jens Huthmann, Peter Muller, Florian Stock, Dietmar Hildenbrand, Andreas Koch | Compiler Techniques | |
| Huynh, Huynh Phung | 2010 |
Design Space Exploration of Instruction Set Customizable MPSoCs for Multimedia Applications | Unmesh D. Bordoloi, Huynh Phung Huynh, Tulika Mitra, Samarjit Chakraborty | MP-SoC Programming | |
| Iancu, Daniel | 2010 |
CORDIC-Based LMMSE Equalizer for Software Defined Radio | Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael Schulte, John Glossner | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Jääskeläinen, Pekka | 2010 |
OpenCL-based Design Methodology for Application-Specific Processors | Pekka Jääskeläinen, Carlos S. de la Lama, Pablo Huerta, Jarmo Takala | Compiler Techniques | |
| Janhunen, Janne | 2010 |
A GPU Implementation for two MIMO–OFDM Detectors | Teemu Nylanden, Janne Janhunen, Olli Silven, Markku Juntti | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Jesshope, Chris R. | 2010 |
Towards Scalable I/O on a Many-core Architecture | Michael A. Hicks, Hicks Michiel, W. van Tol, Chris R. Jesshope | Special Session on Multicore Architectures for Embedded Systems | |
| Jia, Xiaoyan | 2010 |
Code Generation for a Novel STA Architecture by Using Post-Processing Backend | Xiaoyan Jia, Gerhard Fettweis | Compiler Techniques | |
| Juntti, Markku | 2010 |
A GPU Implementation for two MIMO–OFDM Detectors | Teemu Nylanden, Janne Janhunen, Olli Silven, Markku Juntti | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Kamal, Mehdi | 2010 |
Energy-Aware Design Space Exploration of RegisterFile for Extensible Processors | Amir Yazdanbakhsh, Mehdi Kamal, Mostafa E. Salehi, Hamid Noori, Sied Mehdi Fakhraie | Design Space Exploration | |
| Karlström, Per | 2010 |
Automatic Port and Bus Sizing in NoGAP | Per Karlström, Wenbiao Zhou, Dake Liu | Micro-Architecture | |
| Kastensmidt, Fernanda | 2010 |
Monitor-Adapter Coupling for NOC Performance Tuning | Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Kastensmidt, Altamiro Susin, Marcio Kreutz | Network-On-Chip Interconnects | |
| Kee, Hojin | 2010 |
Efficient Static Buffering to Guarantee Throughput-Optimal FPGA Implementation of Synchronous Dataflow Graphs | Hojin Kee, Shuvra S. Bhattacharyya, Jacob Kornerup | Profiling and Analysis | |
| Khan, Taj Muhammad | 2010 |
Transparent Sampling | Taj Muhammad Khan, Daniel Gracia-Perez, Olivier Temam | Simulation and Modeling | |
| Koch, Andreas | 2010 |
Accelerating High-Level Engineering Computations by Automatic Compilation of Geometric Algebra to Hardware Accelerators | Jens Huthmann, Peter Muller, Florian Stock, Dietmar Hildenbrand, Andreas Koch | Compiler Techniques | |
| Kologeski, Anelise | 2010 |
Monitor-Adapter Coupling for NOC Performance Tuning | Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Kastensmidt, Altamiro Susin, Marcio Kreutz | Network-On-Chip Interconnects | |
| Kornerup, Jacob | 2010 |
Efficient Static Buffering to Guarantee Throughput-Optimal FPGA Implementation of Synchronous Dataflow Graphs | Hojin Kee, Shuvra S. Bhattacharyya, Jacob Kornerup | Profiling and Analysis | |
| Kreutz, Marcio | 2010 |
Monitor-Adapter Coupling for NOC Performance Tuning | Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Kastensmidt, Altamiro Susin, Marcio Kreutz | Network-On-Chip Interconnects | |
| Kuzmanov, Georgi | 2010 |
An Efficient Realization of Forward Integer Transform in H.264/AVC Intra-frame Encoder | Muhammad Nadeem, Stephan Wong, Georgi Kuzmanov | Image and Video Processing | |
| Kuzmanov, Georgi | 2010 |
A Polymorphic Register File for Matrix Operations | Catalin Ciobanu, Georgi Kuzmanov, Georgi N. Gaydadjiev, Alex Ramirez | Micro-Architecture | |
| Lemaire, Romain | 2010 |
Design Environment for the Support of Configurable Network Interfaces in NoC-based Platforms | Amin El Mrabti, Frederic Rousseau, Frederic Petrot, Jerome Martin, Romain Lemaire, Emmanuel Vaumorin | Network Processing | |
| Liu, Dake | 2010 |
Automatic Port and Bus Sizing in NoGAP | Per Karlström, Wenbiao Zhou, Dake Liu | Micro-Architecture | |
| Ludovici, Daniele | 2010 |
A Library of Dual-Clock FIFOs for Cost-Effective and Flexible MPSoCs Design | Alessandro Strano, Daniele Ludovici, Davide Bertozzi | Simulation and Modeling | |
| Marref, Amine | 2010 |
Compositional Timing Analysis | Amine Marref | Profiling and Analysis | |
| Marshall, Alan | 2010 |
Design of a Flexible High-speed FPGA-based Flow Monitor for Next Generation Networks | John McGlone, Roger Woods, Alan Marshall, Michaela Blott | Network Processing | |
| Martin, Jerome | 2010 |
Design Environment for the Support of Configurable Network Interfaces in NoC-based Platforms | Amin El Mrabti, Frederic Rousseau, Frederic Petrot, Jerome Martin, Romain Lemaire, Emmanuel Vaumorin | Network Processing | |
| Matos, Debora | 2010 |
Monitor-Adapter Coupling for NOC Performance Tuning | Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Kastensmidt, Altamiro Susin, Marcio Kreutz | Network-On-Chip Interconnects | |
| Mayer, Ulrich | 2010 |
A Fully Programmable FSM-based Processing Engine for Gigabytes/s Header Parsing | Konstantin Septinus, Peter Pirsch, Holger Blume, Ulrich Mayer | Network Processing | |
| McGlone, John | 2010 |
Design of a Flexible High-speed FPGA-based Flow Monitor for Next Generation Networks | John McGlone, Roger Woods, Alan Marshall, Michaela Blott | Network Processing | |
| Mesman, Bart | 2010 |
Fast Huffman Decoding by Exploiting Data Level Parallelism | Tim Drijvers, Carlos Alba Pinto, Henk Corporaal, Bart Mesman | Image and Video Processing | |
| Mesman, Bart | 2010 |
Compile-time GPU Memory Access Optimizations | Gert-Jan van den Braak, Bart Mesman, Henk Corporaal | Compiler Techniques | |
| Michiel, Hicks | 2010 |
Towards Scalable I/O on a Many-core Architecture | Michael A. Hicks, Hicks Michiel, W. van Tol, Chris R. Jesshope | Special Session on Multicore Architectures for Embedded Systems | |
| Mitra, Tulika | 2010 |
Design Space Exploration of Instruction Set Customizable MPSoCs for Multimedia Applications | Unmesh D. Bordoloi, Huynh Phung Huynh, Tulika Mitra, Samarjit Chakraborty | MP-SoC Programming | |
| Mudge, Trevor | 2010 |
Technologies for Reducing Power | Trevor Mudge | SAMOS X - Keynote | 2010-IC-01 |
| Muller, Peter | 2010 |
Accelerating High-Level Engineering Computations by Automatic Compilation of Geometric Algebra to Hardware Accelerators | Jens Huthmann, Peter Muller, Florian Stock, Dietmar Hildenbrand, Andreas Koch | Compiler Techniques | |
| Nadeem, Muhammad | 2010 |
An Efficient Realization of Forward Integer Transform in H.264/AVC Intra-frame Encoder | Muhammad Nadeem, Stephan Wong, Georgi Kuzmanov | Image and Video Processing | |
| Nadezhkin, Dmitry | 2010 |
Identifying Communication Models in Process Networks derived from Weakly Dynamic Programs | Dmitry Nadezhkin, Todor Stefanov | Special Session on Multicore Architectures for Embedded Systems | |
| Naessens, Frederik | 2010 |
SDR Platform for 802.11n and 3-GPP LTE | Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Nandy, S.K. | 2010 |
Enhancements for Variable N-point Streaming FFT/IFFT on REDEFINE, a Runtime Reconfigurable Architecture | N.Thambi Prashank, M. Prasadarao, Avinaba Dutta, Keshavan Varadarajan, Mythri Alle, S.K. Nandy | Network-On-Chip Interconnects | |
| Nandy, S.K. | 2010 |
Design Space Exploration of Systolic Realization of QR Factorization on a Runtime Reconfigurable Platform | Prasenjit Biswas, Keshavan Varadarajan, Mythri Alle, S.K. Nandy | Design Space Exploration | |
| Negi, Anurag | 2010 |
LV*: A Low Complexity Lazy Versioning HTM Infrastructure | Anurag Negi, M. M. Waliullah, Per Stenstrom | Micro-Architecture | |
| Noori, Hamid | 2010 |
Energy-Aware Design Space Exploration of RegisterFile for Extensible Processors | Amir Yazdanbakhsh, Mehdi Kamal, Mostafa E. Salehi, Hamid Noori, Sied Mehdi Fakhraie | Design Space Exploration | |
| Nylanden, Teemu | 2010 |
A GPU Implementation for two MIMO–OFDM Detectors | Teemu Nylanden, Janne Janhunen, Olli Silven, Markku Juntti | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Ornstein, Andrea C. | 2010 |
CLI-Based Compilation Flows for the C Language | Erven Rohou, Andrea C. Ornstein, Marco Cornero | MP-SoC Programming | |
| Pekmestzi, Kiamal | 2010 |
Custom Multi-Threaded Dynamic Memory Management for Multiprocessor System-on-Chip Platforms | Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris, Kiamal Pekmestzi | System-Level Design | |
| Petrot, Frederic | 2010 |
Design Environment for the Support of Configurable Network Interfaces in NoC-based Platforms | Amin El Mrabti, Frederic Rousseau, Frederic Petrot, Jerome Martin, Romain Lemaire, Emmanuel Vaumorin | Network Processing | |
| Pimentel, Andy D. | 2010 |
A Trace-based Scenario Database for High-level Simulation of Multimedia MP-SoCs | Peter van Stralen, Andy D. Pimentel | Simulation and Modeling | |
| Pinto, Carlos Alba | 2010 |
Fast Huffman Decoding by Exploiting Data Level Parallelism | Tim Drijvers, Carlos Alba Pinto, Henk Corporaal, Bart Mesman | Image and Video Processing | |
| Pirsch, Peter | 2010 |
A Fully Programmable FSM-based Processing Engine for Gigabytes/s Header Parsing | Konstantin Septinus, Peter Pirsch, Holger Blume, Ulrich Mayer | Network Processing | |
| Pirsch, Peter | 2010 |
Real-Time Stereo Vision System using Semi-Global Matching Disparity Estimation: Architecture and FPGA-Implementation | Christian Banz, Sebastian Hesselbarth, Holger Flatt, Holger Blume, Peter Pirsch | Image and Video Processing | |
| Prasadarao, M. | 2010 |
Enhancements for Variable N-point Streaming FFT/IFFT on REDEFINE, a Runtime Reconfigurable Architecture | N.Thambi Prashank, M. Prasadarao, Avinaba Dutta, Keshavan Varadarajan, Mythri Alle, S.K. Nandy | Network-On-Chip Interconnects | |
| Prashank, N.Thambi | 2010 |
Enhancements for Variable N-point Streaming FFT/IFFT on REDEFINE, a Runtime Reconfigurable Architecture | N.Thambi Prashank, M. Prasadarao, Avinaba Dutta, Keshavan Varadarajan, Mythri Alle, S.K. Nandy | Network-On-Chip Interconnects | |
| Raghavan, Praveen | 2010 |
SDR Platform for 802.11n and 3-GPP LTE | Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Ramirez, Alex | 2010 |
A Polymorphic Register File for Matrix Operations | Catalin Ciobanu, Georgi Kuzmanov, Georgi N. Gaydadjiev, Alex Ramirez | Micro-Architecture | |
| Ramirez, Alex | 2010 |
Interleaving Granularity on High Bandwidth Memory Architecture for CMPs | Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex Ramirez | Micro-Architecture | |
| Rico, Alejandro | 2010 |
Interleaving Granularity on High Bandwidth Memory Architecture for CMPs | Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex Ramirez | Micro-Architecture | |
| Rintaluoma, Tero | 2010 |
SIMD Performance in Software Based Mobile Video Coding | Tero Rintaluoma, Olli Silven | Image and Video Processing | |
| Rohou, Erven | 2010 |
CLI-Based Compilation Flows for the C Language | Erven Rohou, Andrea C. Ornstein, Marco Cornero | MP-SoC Programming | |
| Rousseau, Frederic | 2010 |
Design Environment for the Support of Configurable Network Interfaces in NoC-based Platforms | Amin El Mrabti, Frederic Rousseau, Frederic Petrot, Jerome Martin, Romain Lemaire, Emmanuel Vaumorin | Network Processing | |
| Salehi, Mostafa E. | 2010 |
Energy-Aware Design Space Exploration of RegisterFile for Extensible Processors | Amir Yazdanbakhsh, Mehdi Kamal, Mostafa E. Salehi, Hamid Noori, Sied Mehdi Fakhraie | Design Space Exploration | |
| Schröder, Hartmut | 2010 |
On the Scalability of SIMD Processing for Software Defined Radio Algorithms | Peter Westermann, Hartmut Schröder | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Schulte, Michael | 2010 |
CORDIC-Based LMMSE Equalizer for Software Defined Radio | Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael Schulte, John Glossner | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Schulte, Michael | 2010 |
ARAL-CR: An Adaptive Reasoning and Learning Cognitive Radio Platform |
Sao-Jie Chen, Pao-Ann Hsiung, Chu Yu, Mao-Hsu Yen, Sakir Sezer, Michael Schulte, Yu-Hen Hu | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Sciuto, Donatella | 2010 |
Designing and Validating Access Policies to Reconfigurable Resources in Multiprocessor Systems on Chip | Fabio Arlati, Francesco Bruschi, Donatella Sciuto | Special Session on Multicore Architectures for Embedded Systems | |
| Senthilvelan, Murugappan | 2010 |
CORDIC-Based LMMSE Equalizer for Software Defined Radio | Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael Schulte, John Glossner | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Septinus, Konstantin | 2010 |
A Fully Programmable FSM-based Processing Engine for Gigabytes/s Header Parsing | Konstantin Septinus, Peter Pirsch, Holger Blume, Ulrich Mayer | Network Processing | |
| Sezer, Sakir | 2010 |
ARAL-CR: An Adaptive Reasoning and Learning Cognitive Radio Platform |
Sao-Jie Chen, Pao-Ann Hsiung, Chu Yu, Mao-Hsu Yen, Sakir Sezer, Michael Schulte, Yu-Hen Hu | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Silva, Vitor | 2010 |
Embedded Multicore Architectures for LDPC Decoding | Gabriel Falcao, Leonel Sousa, Vitor Silva | Special Session on Multicore Architectures for Embedded Systems | |
| Silven, Olli | 2010 |
SIMD Performance in Software Based Mobile Video Coding | Tero Rintaluoma, Olli Silven | Image and Video Processing | |
| Silven, Olli | 2010 |
A GPU Implementation for two MIMO–OFDM Detectors | Teemu Nylanden, Janne Janhunen, Olli Silven, Markku Juntti | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Sima, Mihai | 2010 |
CORDIC-Based LMMSE Equalizer for Software Defined Radio | Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael Schulte, John Glossner | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Soudris, Dimitrios | 2010 |
Custom Multi-Threaded Dynamic Memory Management for Multiprocessor System-on-Chip Platforms | Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris, Kiamal Pekmestzi | System-Level Design | |
| Sousa, Leonel | 2010 |
Embedded Multicore Architectures for LDPC Decoding | Gabriel Falcao, Leonel Sousa, Vitor Silva | Special Session on Multicore Architectures for Embedded Systems | |
| Stefan, Radu | 2010 |
On-chip Network Interfaces supporting automatic burst write creation, posted writes and read prefetch | Radu Stefan, Jason de Windt, Kees Goossens | Network-On-Chip Interconnects | |
| Stefanov, Todor | 2010 |
Identifying Communication Models in Process Networks derived from Weakly Dynamic Programs | Dmitry Nadezhkin, Todor Stefanov | Special Session on Multicore Architectures for Embedded Systems | |
| Stenstrom, Per | 2010 |
LV*: A Low Complexity Lazy Versioning HTM Infrastructure | Anurag Negi, M. M. Waliullah, Per Stenstrom | Micro-Architecture | |
| Stock, Florian | 2010 |
Accelerating High-Level Engineering Computations by Automatic Compilation of Geometric Algebra to Hardware Accelerators | Jens Huthmann, Peter Muller, Florian Stock, Dietmar Hildenbrand, Andreas Koch | Compiler Techniques | |
| Strano, Alessandro | 2010 |
A Library of Dual-Clock FIFOs for Cost-Effective and Flexible MPSoCs Design | Alessandro Strano, Daniele Ludovici, Davide Bertozzi | Simulation and Modeling | |
| Streubuhr, Martin | 2010 |
A System-Level Synthesis Approach from Formal Application Models to Generic Bus-Based MPSoCs | Jens Gladigau, Andreas Gerstlauer, Christian Haubelt, Martin Streubuhr, Jürgen Teich | System-Level Design | |
| Strydis, Christos | 2010 |
ImpBench Revisited: An Extended Characterization of Implant-Processor Benchmarks | Christos Strydis, Dhara Dave, Georgi N. Gaydadjiev | Profiling and Analysis | |
| Susin, Altamiro | 2010 |
Monitor-Adapter Coupling for NOC Performance Tuning | Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Kastensmidt, Altamiro Susin, Marcio Kreutz | Network-On-Chip Interconnects | |
| Takala, Jarmo | 2010 |
OpenCL-based Design Methodology for Application-Specific Processors | Pekka Jääskeläinen, Carlos S. de la Lama, Pablo Huerta, Jarmo Takala | Compiler Techniques | |
| Teich, Jürgen | 2010 |
A System-Level Synthesis Approach from Formal Application Models to Generic Bus-Based MPSoCs | Jens Gladigau, Andreas Gerstlauer, Christian Haubelt, Martin Streubuhr, Jürgen Teich | System-Level Design | |
| Temam, Olivier | 2010 |
Transparent Sampling | Taj Muhammad Khan, Daniel Gracia-Perez, Olivier Temam | Simulation and Modeling | |
| Topham, Nigel | 2010 |
Cycle-Accurate Performance Modelling in an Ultra-Fast Just-In-Time Dynamic Binary Translation Instruction Set Simulator | Igor Bohm, Bjorn Franke, Nigel Topham | Simulation and Modeling | |
| Topham, Nigel | 2010 |
Exploring the Unified Design-Space of Custom-Instruction Selection and Resource Sharing | Marcela Zuluaga, Nigel Topham | Design Space Exploration | |
| van den Braak, Gert-Jan | 2010 |
Compile-time GPU Memory Access Optimizations | Gert-Jan van den Braak, Bart Mesman, Henk Corporaal | Compiler Techniques | |
| Van der Perre, Liesbet | 2010 |
SDR Platform for 802.11n and 3-GPP LTE | Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| van Stralen, Peter | 2010 |
A Trace-based Scenario Database for High-level Simulation of Multimedia MP-SoCs | Peter van Stralen, Andy D. Pimentel | Simulation and Modeling | |
| van Tol, W. | 2010 |
Towards Scalable I/O on a Many-core Architecture | Michael A. Hicks, Hicks Michiel, W. van Tol, Chris R. Jesshope | Special Session on Multicore Architectures for Embedded Systems | |
| Vander Aa, Tom | 2010 |
SDR Platform for 802.11n and 3-GPP LTE | Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Varadarajan, Keshavan | 2010 |
Enhancements for Variable N-point Streaming FFT/IFFT on REDEFINE, a Runtime Reconfigurable Architecture | N.Thambi Prashank, M. Prasadarao, Avinaba Dutta, Keshavan Varadarajan, Mythri Alle, S.K. Nandy | Network-On-Chip Interconnects | |
| Varadarajan, Keshavan | 2010 |
Design Space Exploration of Systolic Realization of QR Factorization on a Runtime Reconfigurable Platform | Prasenjit Biswas, Keshavan Varadarajan, Mythri Alle, S.K. Nandy | Design Space Exploration | |
| Vaumorin, Emmanuel | 2010 |
Design Environment for the Support of Configurable Network Interfaces in NoC-based Platforms | Amin El Mrabti, Frederic Rousseau, Frederic Petrot, Jerome Martin, Romain Lemaire, Emmanuel Vaumorin | Network Processing | |
| Waliullah, M. M. | 2010 |
LV*: A Low Complexity Lazy Versioning HTM Infrastructure | Anurag Negi, M. M. Waliullah, Per Stenstrom | Micro-Architecture | |
| Westermann, Peter | 2010 |
On the Scalability of SIMD Processing for Software Defined Radio Algorithms | Peter Westermann, Hartmut Schröder | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Wong, Stephan | 2010 |
An Efficient Realization of Forward Integer Transform in H.264/AVC Intra-frame Encoder | Muhammad Nadeem, Stephan Wong, Georgi Kuzmanov | Image and Video Processing | |
| Wong, Stephan | 2010 |
Introduction to the Special Session on Multicore Architectures for Embedded Systems | Luigi Carro, Stephan Wong | Special Session on Multicore Architectures for Embedded Systems | |
| Woods, Roger | 2010 |
Design of a Flexible High-speed FPGA-based Flow Monitor for Next Generation Networks | John McGlone, Roger Woods, Alan Marshall, Michaela Blott | Network Processing | |
| Xydis, Sotirios | 2010 |
Custom Multi-Threaded Dynamic Memory Management for Multiprocessor System-on-Chip Platforms | Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris, Kiamal Pekmestzi | System-Level Design | |
| Yazdanbakhsh, Amir | 2010 |
Energy-Aware Design Space Exploration of RegisterFile for Extensible Processors | Amir Yazdanbakhsh, Mehdi Kamal, Mostafa E. Salehi, Hamid Noori, Sied Mehdi Fakhraie | Design Space Exploration | |
| Yen, Mao-Hsu | 2010 |
ARAL-CR: An Adaptive Reasoning and Learning Cognitive Radio Platform |
Sao-Jie Chen, Pao-Ann Hsiung, Chu Yu, Mao-Hsu Yen, Sakir Sezer, Michael Schulte, Yu-Hen Hu | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Ykman-Couvreur, Ch. | 2010 |
Exploration Framework for Run-Time Resource Management of Embedded Multi-Core Platforms | Ch. Ykman-Couvreur | Special Session on Multicore Architectures for Embedded Systems | |
| Yu, Chu | 2010 |
ARAL-CR: An Adaptive Reasoning and Learning Cognitive Radio Platform |
Sao-Jie Chen, Pao-Ann Hsiung, Chu Yu, Mao-Hsu Yen, Sakir Sezer, Michael Schulte, Yu-Hen Hu | Special Session on Software Defined Radio (SDR) and Cognitive Radio (CR) | |
| Zhou, Wenbiao | 2010 |
Automatic Port and Bus Sizing in NoGAP | Per Karlström, Wenbiao Zhou, Dake Liu | Micro-Architecture | |
| Zuluaga, Marcela | 2010 |
Exploring the Unified Design-Space of Custom-Instruction Selection and Resource Sharing | Marcela Zuluaga, Nigel Topham | Design Space Exploration | |
| Adeva, Esther P. | 2011 |
Scalable ASIP Implementation and Parallelization of a MIMO Sphere Detector | Esther P. Adeva, Bjorn Mennenga, Gerhard Fettweis | Memory and Communication Strategies | |
| Al-Dujaily, Ra’ed | 2011 |
On-Chip Dynamic Programming Networks Using 3D-TSV Integration | Ra’ed Al-Dujaily, Terrence Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alex Yakovlev, Chi-Sang Poon | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Almer, Oscar | 2011 |
Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation | Oscar Almer, Igor Bohm, Tobias Edler von Koch, Bjorn Franke, Stephen Kyle, Volker Seeker | Simulation and Modeling | |
| Alvanos, Michail | 2011 |
Task-based Parallel H.264 Video Encoding for Explicit Communication Architectures | Michail Alvanos, George Tzenakis, Dimitrios S. Nikolopoulos, Angelos Bilas | Image and Video Processing | |
| Arnold, Oliver | 2011 |
On the Impact of Dynamic Task Scheduling in Heterogeneous MPSoCs | Oliver Arnold, Gerhard Fettweis | Multicore Programming | |
| Asher, Yosi Ben | 2011 |
Optimizing Wait-States in the Synthesis of Memory References with Unpredictable Latencies | Yosi Ben Asher, Ron Meldiner, Nadav Rotem | Memory and Communication Strategies | |
| Auguin, Michel | 2011 |
A Performance Estimation Flow for Embedded Systems with Mixed Software/Hardware Modeling | Joffrey Kriegel, Alain Pegatoquet, Michel Auguin, Florian Broekaert | Simulation and Modeling | |
| Banz, Christian | 2011 |
A Hardware Accelerated Configurable ASIP Architecture for Embedded Real-Time Video-Based Driver Assistance Applications | Gregor Schewior, Holger Flatt, Carsten Dolar, Christian Banz, Holger Blume | Image and Video Processing | |
| Basten, Twan | 2011 |
Integrated Model-Driven Design-Space Exploration for Embedded Systems | Nikola Trcka, Martijn Hendriks, Twan Basten, Marc Geilen, Lou Somers | SPECIAL SESSION 2: What's next for ESL | |
| Basten, Twan | 2011 |
Scenario-Aware Dataflow: Modeling, Analysis and Implementation of Dynamic Applications | Sander Stuijk, Marc Geilen, Bart Theelen, Twan Basten | SPECIAL SESSION 3: Adaptive Systems | |
| Becker, Jürgen | 2011 |
Architecture Design Space Exploration of Run-Time Scalable Issue-Width Processors | Ralf Koenig, Timo Stripf, Jan Heisswolf, Jürgen Becker | Design Space Exploration | |
| Becker, Jürgen | 2011 |
A Novel ADL-based Compiler-Centric Software Framework for Reconfigurable Mixed-ISA Processors | Timo Stripf, Ralf Koenig, Jürgen Becker | Simulation and Modeling | |
| Becker, Jürgen | 2011 |
Heterogeneous and Runtime Parameterizable Star-Wheels Network-on-Chip | Diana Goehringer, Oliver Oey, Michael Hubner, Jürgen Becker | SPECIAL SESSION 3: Adaptive Systems | |
| Bekooij, Marco J.G. | 2011 |
Mapping of Modal Applications given Throughput and Latency Constraints | Stefan J. Geuns, Joost P.H.M. Hausmans, Marco J.G. Bekooij | SPECIAL SESSION 3: Adaptive Systems | |
| Bertels, Koen | 2011 |
High Level Quantitative Hardware Prediction Modeling using Statistical methods | Roel Meeuws, Carlo Galuzzi, Koen Bertels | Simulation and Modeling | |
| Bhattacharyya, Shuvra S. | 2011 |
Methods for Design and Implementation of Dynamic Signal Processing Systems | Shuvra S. Bhattacharyya | SAMOS XI - Keynote | 2011-IC-01 |
| Bilas, Angelos | 2011 |
Task-based Parallel H.264 Video Encoding for Explicit Communication Architectures | Michail Alvanos, George Tzenakis, Dimitrios S. Nikolopoulos, Angelos Bilas | Image and Video Processing | |
| Blume, Holger | 2011 |
A Hardware Accelerated Configurable ASIP Architecture for Embedded Real-Time Video-Based Driver Assistance Applications | Gregor Schewior, Holger Flatt, Carsten Dolar, Christian Banz, Holger Blume | Image and Video Processing | |
| Blume, Holger | 2011 |
Using SDRAMs for two-dimensional accesses of long 2n × 2m-point FFTs and transposing | Stefan Langemeyer, Peter Pirsch, Holger Blume | Memory and Communication Strategies | |
| Bohm, Igor | 2011 |
Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation | Oscar Almer, Igor Bohm, Tobias Edler von Koch, Bjorn Franke, Stephen Kyle, Volker Seeker | Simulation and Modeling | |
| Borodin, Demid | 2011 |
Functional Unit Sharing Between Stacked Processors in 3D Integrated Systems | Demid Borodin, Winston Siauw, Sorin Dan Cotofana | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Broekaert, Florian | 2011 |
A Performance Estimation Flow for Embedded Systems with Mixed Software/Hardware Modeling | Joffrey Kriegel, Alain Pegatoquet, Michel Auguin, Florian Broekaert | Simulation and Modeling | |
| Bruschi, Francesco | 2011 |
On-Chip Network Resource Management Design and Validation | Francesco Bruschi, Antonio Miele, Vincenzo Rana | Memory and Communication Strategies | |
| Cabarcas, Felipe | 2011 |
Breaking the Bandwidth Wall in Chip Multiprocessors | Augusto Vega, Felipe Cabarcas, Alex Ramirez, Mateo Valero | Memory and Communication Strategies | |
| Cahill, Kurtis D. | 2011 |
ADL-Based Specification of Implementation Styles for Functional Simulators | David A. Penry, Kurtis D. Cahill | Simulation and Modeling | |
| Cancare, Fabio | 2011 |
Dedicated Hardware Accelerators for the Epistatic Analysis of Human Genetic Data | Fabio Cancare, Alessandro Marin, Donatella Sciuto | Accelerators | |
| Castrillon, Jeronimo | 2011 |
Trends in Embedded Software Synthesis | Jeronimo Castrillon, Weihua Sheng, Rainer Leupers | SPECIAL SESSION 2: What's next for ESL | |
| Chang, Daniel W. | 2011 |
Analyzing the Performance and Energy Impact of 3D Memory Integration on Embedded DSPs | Daniel W. Chang, Nam S. Kim, Michael Schulte | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Corporaal, Henk | 2011 |
Skeleton-based Automatic Parallelization of Image Processing Algorithms for GPUs | Cedric Nugteren, Henk Corporaal, Bart Mesman | Multicore Programming | |
| Corporaal, Henk | 2011 |
Distributed Resource Management for Concurrent Execution of Multimedia Applications on MPSoC Platforms | Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal | Accelerators | |
| Corporaal, Henk | 2011 |
MOVE-Pro: a Low Power and High Code Density TTA Architecture | Yifan He, Dongrui She, Bart Mesman, Henk Corporaal | Memory and Communication Strategies | |
| Cotofana, Sorin Dan | 2011 |
Functional Unit Sharing Between Stacked Processors in 3D Integrated Systems | Demid Borodin, Winston Siauw, Sorin Dan Cotofana | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Davis, W. Rhett | 2011 |
3D Specific Systems Design and CAD | Paul D. Franzon, Thor Thorolfsson, W. Rhett Davis, Samson Melamed | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| de la Lama, Carlos S. | 2011 |
TCEMC: A Co-Design Flow for Application-Specific Multicores | Pekka Jääskeläinen, Erno Salminen, Carlos S. de la Lama, Jarmo Takala, Jose Ignacio Martinez | Design Space Exploration | |
| Diamantopoulos, Dionisios | 2011 |
Thermal optimization for micro-architectures through selective block replication | Dionisios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris | Energy-Aware and Low-Power Designs | |
| Dias, Tiago | 2011 |
High Throughput and Scalable Architecture for Unified Transform Coding in Embedded H.264/AVC Video Coding Systems | Tiago Dias, Sebastian Lopez, Nuno Roma, Leonel Sousa | Image and Video Processing | |
| Dolar, Carsten | 2011 |
A Hardware Accelerated Configurable ASIP Architecture for Embedded Real-Time Video-Based Driver Assistance Applications | Gregor Schewior, Holger Flatt, Carsten Dolar, Christian Banz, Holger Blume | Image and Video Processing | |
| Ernst, Rolf | 2011 |
Admission Control and Self-Configuration in the EPOC Framework | Steffen Stein, Moritz Neukirchner, Rolf Ernst | SPECIAL SESSION 3: Adaptive Systems | |
| Fahmy, Sherif | 2011 |
On STM Concurrency Control for Multicore Embedded Real-Time Software | Sherif Fahmy, Binoy Ravindran | Multicore Programming | |
| Fettweis, Gerhard | 2011 |
On the Impact of Dynamic Task Scheduling in Heterogeneous MPSoCs | Oliver Arnold, Gerhard Fettweis | Multicore Programming | |
| Fettweis, Gerhard | 2011 |
Scalable ASIP Implementation and Parallelization of a MIMO Sphere Detector | Esther P. Adeva, Bjorn Mennenga, Gerhard Fettweis | Memory and Communication Strategies | |
| Flatt, Holger | 2011 |
A Hardware Accelerated Configurable ASIP Architecture for Embedded Real-Time Video-Based Driver Assistance Applications | Gregor Schewior, Holger Flatt, Carsten Dolar, Christian Banz, Holger Blume | Image and Video Processing | |
| Franke, Bjorn | 2011 |
Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation | Oscar Almer, Igor Bohm, Tobias Edler von Koch, Bjorn Franke, Stephen Kyle, Volker Seeker | Simulation and Modeling | |
| Franzon, Paul D. | 2011 |
3D Specific Systems Design and CAD | Paul D. Franzon, Thor Thorolfsson, W. Rhett Davis, Samson Melamed | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Galuzzi, Carlo | 2011 |
High Level Quantitative Hardware Prediction Modeling using Statistical methods | Roel Meeuws, Carlo Galuzzi, Koen Bertels | Simulation and Modeling | |
| Gaydadjiev, Georgi N. | 2011 |
Vector Processor Customization for FFT | Bogdan Spinean, Georgi Kuzmanov, Georgi N. Gaydadjiev | Accelerators | |
| Geilen, Marc | 2011 |
Integrated Model-Driven Design-Space Exploration for Embedded Systems | Nikola Trcka, Martijn Hendriks, Twan Basten, Marc Geilen, Lou Somers | SPECIAL SESSION 2: What's next for ESL | |
| Geilen, Marc | 2011 |
Scenario-Aware Dataflow: Modeling, Analysis and Implementation of Dynamic Applications | Sander Stuijk, Marc Geilen, Bart Theelen, Twan Basten | SPECIAL SESSION 3: Adaptive Systems | |
| Geuns, Stefan J. | 2011 |
Mapping of Modal Applications given Throughput and Latency Constraints | Stefan J. Geuns, Joost P.H.M. Hausmans, Marco J.G. Bekooij | SPECIAL SESSION 3: Adaptive Systems | |
| Goehringer, Diana | 2011 |
Heterogeneous and Runtime Parameterizable Star-Wheels Network-on-Chip | Diana Goehringer, Oliver Oey, Michael Hubner, Jürgen Becker | SPECIAL SESSION 3: Adaptive Systems | |
| Goossens, Kees | 2011 |
Composable Power Management with Energy and Power Budgets per Application | Andrew Nelson, Anca M. Molnos, Kees Goossens | SPECIAL SESSION 3: Adaptive Systems | |
| Gruttner, Kim | 2011 |
Challenges of Multi- and Many-Core Architectures for Electronic System-Level Design | Kim Gruttner, Philipp A. Hartmann, Wolfgang Nebel | SPECIAL SESSION 2: What's next for ESL | |
| Guzma, Vladimír | 2011 |
Instruction Buffer with Limited Control Flow and Loop Nest Support | Vladimír Guzma, Teemu Pitkänen, Jarmo Takala | Memory and Communication Strategies | |
| Ha, Soonhoi | 2011 |
Software Synthesis in the ESL Methodology for Multicore Embedded Systems | Soonhoi Ha, Hyunok Oh | SPECIAL SESSION 2: What's next for ESL | |
| Hämäläinen, Timo D. | 2011 |
Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor | Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen | Memory and Communication Strategies | |
| Hännikäinen, Marko | 2011 |
Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor | Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen | Memory and Communication Strategies | |
| Hannuksela, Jari | 2011 |
FPGA Based Application Specific Processing for Sensor Nodes | Teemu Nylanden, Janne Janhunen, Jari Hannuksela, Olli Silven | Accelerators | |
| Hartmann, Philipp A. | 2011 |
Challenges of Multi- and Many-Core Architectures for Electronic System-Level Design | Kim Gruttner, Philipp A. Hartmann, Wolfgang Nebel | SPECIAL SESSION 2: What's next for ESL | |
| Haubelt, Christian | 2011 |
Calibration and Validation of Software Performance Models for Pedestrian Detection Systems | Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Otto Lohlein, Jürgen Teich | Simulation and Modeling | |
| Haubelt, Christian | 2011 |
Introduction to the Special Session on "What's next for ESL" | Christian Haubelt | SPECIAL SESSION 2: What's next for ESL | |
| Hausmans, Joost P.H.M. | 2011 |
Mapping of Modal Applications given Throughput and Latency Constraints | Stefan J. Geuns, Joost P.H.M. Hausmans, Marco J.G. Bekooij | SPECIAL SESSION 3: Adaptive Systems | |
| He, Yifan | 2011 |
MOVE-Pro: a Low Power and High Code Density TTA Architecture | Yifan He, Dongrui She, Bart Mesman, Henk Corporaal | Memory and Communication Strategies | |
| Heisswolf, Jan | 2011 |
Architecture Design Space Exploration of Run-Time Scalable Issue-Width Processors | Ralf Koenig, Timo Stripf, Jan Heisswolf, Jürgen Becker | Design Space Exploration | |
| Hendriks, Martijn | 2011 |
Integrated Model-Driven Design-Space Exploration for Embedded Systems | Nikola Trcka, Martijn Hendriks, Twan Basten, Marc Geilen, Lou Somers | SPECIAL SESSION 2: What's next for ESL | |
| Herkersdorf, Andreas | 2011 |
Accelerating Collective Communication in Message Passing on Manycore System-on-Chip | Stefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf | Multicore Programming | |
| Holmbacka, Simon | 2011 |
Power Proportional Characteristics of an Energy Manager for Web Clusters | Simon Holmbacka, Sebastien Lafond, Johan Lilius | Energy-Aware and Low-Power Designs | |
| Hubner, Michael | 2011 |
Heterogeneous and Runtime Parameterizable Star-Wheels Network-on-Chip | Diana Goehringer, Oliver Oey, Michael Hubner, Jürgen Becker | SPECIAL SESSION 3: Adaptive Systems | |
| Jääskeläinen, Pekka | 2011 |
TCEMC: A Co-Design Flow for Application-Specific Multicores | Pekka Jääskeläinen, Erno Salminen, Carlos S. de la Lama, Jarmo Takala, Jose Ignacio Martinez | Design Space Exploration | |
| Janhunen, Janne | 2011 |
FPGA Based Application Specific Processing for Sensor Nodes | Teemu Nylanden, Janne Janhunen, Jari Hannuksela, Olli Silven | Accelerators | |
| Jones, Timothy M. | 2011 |
Smart Cache: A Self Adaptive Cache Architecture for Energy Efficiency | Karthik T. Sundararajan, Timothy M. Jones, Nigel Topham | Energy-Aware and Low-Power Designs | |
| Kiesel, Rainer | 2011 |
Calibration and Validation of Software Performance Models for Pedestrian Detection Systems | Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Otto Lohlein, Jürgen Teich | Simulation and Modeling | |
| Kim, Nam S. | 2011 |
Analyzing the Performance and Energy Impact of 3D Memory Integration on Embedded DSPs | Daniel W. Chang, Nam S. Kim, Michael Schulte | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Koenig, Ralf | 2011 |
Architecture Design Space Exploration of Run-Time Scalable Issue-Width Processors | Ralf Koenig, Timo Stripf, Jan Heisswolf, Jürgen Becker | Design Space Exploration | |
| Koenig, Ralf | 2011 |
A Novel ADL-based Compiler-Centric Software Framework for Reconfigurable Mixed-ISA Processors | Timo Stripf, Ralf Koenig, Jürgen Becker | Simulation and Modeling | |
| Kokkeler, Andre B.J. | 2011 |
Multi-domain transformational design flow for embedded systems | Kenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, Andre B.J. Kokkeler, Gerard J. M. Smit | Design Space Exploration | |
| Kokkeler, Andre B.J. | 2011 |
Adaptive resource allocation for streaming applications | Timon D. ter Braak, Hermen A. Toersche, Andre B.J. Kokkeler, Gerard J. M. Smit | SPECIAL SESSION 3: Adaptive Systems | |
| Kriegel, Joffrey | 2011 |
A Performance Estimation Flow for Embedded Systems with Mixed Software/Hardware Modeling | Joffrey Kriegel, Alain Pegatoquet, Michel Auguin, Florian Broekaert | Simulation and Modeling | |
| Kumar, Akash | 2011 |
Distributed Resource Management for Concurrent Execution of Multimedia Applications on MPSoC Platforms | Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal | Accelerators | |
| Kuper, Jan | 2011 |
Multi-domain transformational design flow for embedded systems | Kenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, Andre B.J. Kokkeler, Gerard J. M. Smit | Design Space Exploration | |
| Kuzmanov, Georgi | 2011 |
Vector Processor Customization for FFT | Bogdan Spinean, Georgi Kuzmanov, Georgi N. Gaydadjiev | Accelerators | |
| Kyle, Stephen | 2011 |
Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation | Oscar Almer, Igor Bohm, Tobias Edler von Koch, Bjorn Franke, Stephen Kyle, Volker Seeker | Simulation and Modeling | |
| Lafond, Sebastien | 2011 |
Power Proportional Characteristics of an Energy Manager for Web Clusters | Simon Holmbacka, Sebastien Lafond, Johan Lilius | Energy-Aware and Low-Power Designs | |
| Lam, Kai-Pui | 2011 |
On-Chip Dynamic Programming Networks Using 3D-TSV Integration | Ra’ed Al-Dujaily, Terrence Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alex Yakovlev, Chi-Sang Poon | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Langemeyer, Stefan | 2011 |
Using SDRAMs for two-dimensional accesses of long 2n × 2m-point FFTs and transposing | Stefan Langemeyer, Peter Pirsch, Holger Blume | Memory and Communication Strategies | |
| Le Masle, Adrien | 2011 |
Parametrized Hardware Architectures for the Lucas Primality Test | Adrien Le Masle, Wayne Luk, Csaba Andras Moritz | Accelerators | |
| Leupers, Rainer | 2011 |
Trends in Embedded Software Synthesis | Jeronimo Castrillon, Weihua Sheng, Rainer Leupers | SPECIAL SESSION 2: What's next for ESL | |
| Lilius, Johan | 2011 |
Power Proportional Characteristics of an Energy Manager for Web Clusters | Simon Holmbacka, Sebastien Lafond, Johan Lilius | Energy-Aware and Low-Power Designs | |
| Liu, Qiang | 2011 |
Power Adaptive Computing System Design in Energy Harvesting Environment | Qiang Liu, Terrence Mak, Junwen Luo, Wayne Luk, Alex Yakovlev | Energy-Aware and Low-Power Designs | |
| Lohlein, Otto | 2011 |
Calibration and Validation of Software Performance Models for Pedestrian Detection Systems | Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Otto Lohlein, Jürgen Teich | Simulation and Modeling | |
| Lopez, Sebastian | 2011 |
High Throughput and Scalable Architecture for Unified Transform Coding in Embedded H.264/AVC Video Coding Systems | Tiago Dias, Sebastian Lopez, Nuno Roma, Leonel Sousa | Image and Video Processing | |
| Lu, Kun | 2011 |
Removal of Unnecessary Context Switches from the SystemC Simulation Kernel for Fast VP Simulation | Kun Lu, Daniel Muller-Gritschneder, Ulf Schlichtmann | Simulation and Modeling | |
| Luk, Wayne | 2011 |
Power Adaptive Computing System Design in Energy Harvesting Environment | Qiang Liu, Terrence Mak, Junwen Luo, Wayne Luk, Alex Yakovlev | Energy-Aware and Low-Power Designs | |
| Luk, Wayne | 2011 |
Parametrized Hardware Architectures for the Lucas Primality Test | Adrien Le Masle, Wayne Luk, Csaba Andras Moritz | Accelerators | |
| Luo, Junwen | 2011 |
Power Adaptive Computing System Design in Energy Harvesting Environment | Qiang Liu, Terrence Mak, Junwen Luo, Wayne Luk, Alex Yakovlev | Energy-Aware and Low-Power Designs | |
| Mak, Terrence | 2011 |
Power Adaptive Computing System Design in Energy Harvesting Environment | Qiang Liu, Terrence Mak, Junwen Luo, Wayne Luk, Alex Yakovlev | Energy-Aware and Low-Power Designs | |
| Mak, Terrence | 2011 |
On-Chip Dynamic Programming Networks Using 3D-TSV Integration | Ra’ed Al-Dujaily, Terrence Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alex Yakovlev, Chi-Sang Poon | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Marin, Alessandro | 2011 |
Dedicated Hardware Accelerators for the Epistatic Analysis of Human Genetic Data | Fabio Cancare, Alessandro Marin, Donatella Sciuto | Accelerators | |
| Marref, Amine | 2011 |
Fully-Automatic Derivation of Exact Program-Flow Constraints for a TighterWorst-Case Execution-Time Analysis | Amine Marref | Simulation and Modeling | |
| Martinez, Jose Ignacio | 2011 |
TCEMC: A Co-Design Flow for Application-Specific Multicores | Pekka Jääskeläinen, Erno Salminen, Carlos S. de la Lama, Jarmo Takala, Jose Ignacio Martinez | Design Space Exploration | |
| Matilainen, Lauri | 2011 |
Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor | Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen | Memory and Communication Strategies | |
| McAllister, John | 2011 |
A Kernel Interleaved Scheduling Method for Streaming Applications on Soft-core Vector Processors | Chengwei Zheng, John McAllister, Yun Wu | Memory and Communication Strategies | |
| Meeuws, Roel | 2011 |
High Level Quantitative Hardware Prediction Modeling using Statistical methods | Roel Meeuws, Carlo Galuzzi, Koen Bertels | Simulation and Modeling | |
| Melamed, Samson | 2011 |
3D Specific Systems Design and CAD | Paul D. Franzon, Thor Thorolfsson, W. Rhett Davis, Samson Melamed | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Meldiner, Ron | 2011 |
Optimizing Wait-States in the Synthesis of Memory References with Unpredictable Latencies | Yosi Ben Asher, Ron Meldiner, Nadav Rotem | Memory and Communication Strategies | |
| Meng, Yicong | 2011 |
On-Chip Dynamic Programming Networks Using 3D-TSV Integration | Ra’ed Al-Dujaily, Terrence Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alex Yakovlev, Chi-Sang Poon | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Mennenga, Bjorn | 2011 |
Scalable ASIP Implementation and Parallelization of a MIMO Sphere Detector | Esther P. Adeva, Bjorn Mennenga, Gerhard Fettweis | Memory and Communication Strategies | |
| Mesman, Bart | 2011 |
Skeleton-based Automatic Parallelization of Image Processing Algorithms for GPUs | Cedric Nugteren, Henk Corporaal, Bart Mesman | Multicore Programming | |
| Mesman, Bart | 2011 |
Distributed Resource Management for Concurrent Execution of Multimedia Applications on MPSoC Platforms | Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal | Accelerators | |
| Mesman, Bart | 2011 |
MOVE-Pro: a Low Power and High Code Density TTA Architecture | Yifan He, Dongrui She, Bart Mesman, Henk Corporaal | Memory and Communication Strategies | |
| Meyer, Marcel | 2011 |
Accelerating Collective Communication in Message Passing on Manycore System-on-Chip | Stefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf | Multicore Programming | |
| Miele, Antonio | 2011 |
On-Chip Network Resource Management Design and Validation | Francesco Bruschi, Antonio Miele, Vincenzo Rana | Memory and Communication Strategies | |
| Molnos, Anca M. | 2011 |
Composable Power Management with Energy and Power Budgets per Application | Andrew Nelson, Anca M. Molnos, Kees Goossens | SPECIAL SESSION 3: Adaptive Systems | |
| Moritz, Csaba Andras | 2011 |
Parametrized Hardware Architectures for the Lucas Primality Test | Adrien Le Masle, Wayne Luk, Csaba Andras Moritz | Accelerators | |
| Muller-Gritschneder, Daniel | 2011 |
Removal of Unnecessary Context Switches from the SystemC Simulation Kernel for Fast VP Simulation | Kun Lu, Daniel Muller-Gritschneder, Ulf Schlichtmann | Simulation and Modeling | |
| Nebel, Wolfgang | 2011 |
Challenges of Multi- and Many-Core Architectures for Electronic System-Level Design | Kim Gruttner, Philipp A. Hartmann, Wolfgang Nebel | SPECIAL SESSION 2: What's next for ESL | |
| Nelson, Andrew | 2011 |
Composable Power Management with Energy and Power Budgets per Application | Andrew Nelson, Anca M. Molnos, Kees Goossens | SPECIAL SESSION 3: Adaptive Systems | |
| Neukirchner, Moritz | 2011 |
Admission Control and Self-Configuration in the EPOC Framework | Steffen Stein, Moritz Neukirchner, Rolf Ernst | SPECIAL SESSION 3: Adaptive Systems | |
| Nikolopoulos, Dimitrios S. | 2011 |
Task-based Parallel H.264 Video Encoding for Explicit Communication Architectures | Michail Alvanos, George Tzenakis, Dimitrios S. Nikolopoulos, Angelos Bilas | Image and Video Processing | |
| Nugteren, Cedric | 2011 |
Skeleton-based Automatic Parallelization of Image Processing Algorithms for GPUs | Cedric Nugteren, Henk Corporaal, Bart Mesman | Multicore Programming | |
| Nylanden, Teemu | 2011 |
FPGA Based Application Specific Processing for Sensor Nodes | Teemu Nylanden, Janne Janhunen, Jari Hannuksela, Olli Silven | Accelerators | |
| Oey, Oliver | 2011 |
Heterogeneous and Runtime Parameterizable Star-Wheels Network-on-Chip | Diana Goehringer, Oliver Oey, Michael Hubner, Jürgen Becker | SPECIAL SESSION 3: Adaptive Systems | |
| Oh, Hyunok | 2011 |
Software Synthesis in the ESL Methodology for Multicore Embedded Systems | Soonhoi Ha, Hyunok Oh | SPECIAL SESSION 2: What's next for ESL | |
| Pegatoquet, Alain | 2011 |
A Performance Estimation Flow for Embedded Systems with Mixed Software/Hardware Modeling | Joffrey Kriegel, Alain Pegatoquet, Michel Auguin, Florian Broekaert | Simulation and Modeling | |
| Penry, David A. | 2011 |
ADL-Based Specification of Implementation Styles for Functional Simulators | David A. Penry, Kurtis D. Cahill | Simulation and Modeling | |
| Pimentel, Andy D. | 2011 |
Design Metrics and Visualization Techniques for Analyzing the Performance of MOEAs in DSE | Toktam Taghavi, Andy D. Pimentel | Design Space Exploration | |
| Pirsch, Peter | 2011 |
Using SDRAMs for two-dimensional accesses of long 2n × 2m-point FFTs and transposing | Stefan Langemeyer, Peter Pirsch, Holger Blume | Memory and Communication Strategies | |
| Pitkänen, Teemu | 2011 |
Instruction Buffer with Limited Control Flow and Loop Nest Support | Vladimír Guzma, Teemu Pitkänen, Jarmo Takala | Memory and Communication Strategies | |
| Poon, Chi-Sang | 2011 |
On-Chip Dynamic Programming Networks Using 3D-TSV Integration | Ra’ed Al-Dujaily, Terrence Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alex Yakovlev, Chi-Sang Poon | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Ramirez, Alex | 2011 |
Supercomputing: Past, Present, and a possible future | Alex Ramirez | SAMOS XI - Keynote | 2011-IC-02 |
| Ramirez, Alex | 2011 |
Breaking the Bandwidth Wall in Chip Multiprocessors | Augusto Vega, Felipe Cabarcas, Alex Ramirez, Mateo Valero | Memory and Communication Strategies | |
| Rana, Vincenzo | 2011 |
On-Chip Network Resource Management Design and Validation | Francesco Bruschi, Antonio Miele, Vincenzo Rana | Memory and Communication Strategies | |
| Ravindran, Binoy | 2011 |
On STM Concurrency Control for Multicore Embedded Real-Time Software | Sherif Fahmy, Binoy Ravindran | Multicore Programming | |
| Roma, Nuno | 2011 |
High Throughput and Scalable Architecture for Unified Transform Coding in Embedded H.264/AVC Video Coding Systems | Tiago Dias, Sebastian Lopez, Nuno Roma, Leonel Sousa | Image and Video Processing | |
| Rotem, Nadav | 2011 |
Optimizing Wait-States in the Synthesis of Memory References with Unpredictable Latencies | Yosi Ben Asher, Ron Meldiner, Nadav Rotem | Memory and Communication Strategies | |
| Rovers, Kenneth C. | 2011 |
Multi-domain transformational design flow for embedded systems | Kenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, Andre B.J. Kokkeler, Gerard J. M. Smit | Design Space Exploration | |
| Salminen, Erno | 2011 |
TCEMC: A Co-Design Flow for Application-Specific Multicores | Pekka Jääskeläinen, Erno Salminen, Carlos S. de la Lama, Jarmo Takala, Jose Ignacio Martinez | Design Space Exploration | |
| Salminen, Erno | 2011 |
Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor | Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen | Memory and Communication Strategies | |
| Schewior, Gregor | 2011 |
A Hardware Accelerated Configurable ASIP Architecture for Embedded Real-Time Video-Based Driver Assistance Applications | Gregor Schewior, Holger Flatt, Carsten Dolar, Christian Banz, Holger Blume | Image and Video Processing | |
| Schlichtmann, Ulf | 2011 |
Removal of Unnecessary Context Switches from the SystemC Simulation Kernel for Fast VP Simulation | Kun Lu, Daniel Muller-Gritschneder, Ulf Schlichtmann | Simulation and Modeling | |
| Schulte, Michael | 2011 |
Analyzing the Performance and Energy Impact of 3D Memory Integration on Embedded DSPs | Daniel W. Chang, Nam S. Kim, Michael Schulte | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Sciuto, Donatella | 2011 |
Dedicated Hardware Accelerators for the Epistatic Analysis of Human Genetic Data | Fabio Cancare, Alessandro Marin, Donatella Sciuto | Accelerators | |
| Seeker, Volker | 2011 |
Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation | Oscar Almer, Igor Bohm, Tobias Edler von Koch, Bjorn Franke, Stephen Kyle, Volker Seeker | Simulation and Modeling | |
| Shabbir, Ahsan | 2011 |
Distributed Resource Management for Concurrent Execution of Multimedia Applications on MPSoC Platforms | Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal | Accelerators | |
| She, Dongrui | 2011 |
MOVE-Pro: a Low Power and High Code Density TTA Architecture | Yifan He, Dongrui She, Bart Mesman, Henk Corporaal | Memory and Communication Strategies | |
| Sheng, Weihua | 2011 |
Trends in Embedded Software Synthesis | Jeronimo Castrillon, Weihua Sheng, Rainer Leupers | SPECIAL SESSION 2: What's next for ESL | |
| Siauw, Winston | 2011 |
Functional Unit Sharing Between Stacked Processors in 3D Integrated Systems | Demid Borodin, Winston Siauw, Sorin Dan Cotofana | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Silven, Olli | 2011 |
FPGA Based Application Specific Processing for Sensor Nodes | Teemu Nylanden, Janne Janhunen, Jari Hannuksela, Olli Silven | Accelerators | |
| Siozios, Kostas | 2011 |
Thermal optimization for micro-architectures through selective block replication | Dionisios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris | Energy-Aware and Low-Power Designs | |
| Smit, Gerard J. M. | 2011 |
Multi-domain transformational design flow for embedded systems | Kenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, Andre B.J. Kokkeler, Gerard J. M. Smit | Design Space Exploration | |
| Smit, Gerard J. M. | 2011 |
Introduction to the Special Session on "Adaptive Systems" | Gerard J. M. Smit | SPECIAL SESSION 3: Adaptive Systems | |
| Smit, Gerard J. M. | 2011 |
Adaptive resource allocation for streaming applications | Timon D. ter Braak, Hermen A. Toersche, Andre B.J. Kokkeler, Gerard J. M. Smit | SPECIAL SESSION 3: Adaptive Systems | |
| Somers, Lou | 2011 |
Integrated Model-Driven Design-Space Exploration for Embedded Systems | Nikola Trcka, Martijn Hendriks, Twan Basten, Marc Geilen, Lou Somers | SPECIAL SESSION 2: What's next for ESL | |
| Soudris, Dimitrios | 2011 |
Thermal optimization for micro-architectures through selective block replication | Dionisios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris | Energy-Aware and Low-Power Designs | |
| Sousa, Leonel | 2011 |
High Throughput and Scalable Architecture for Unified Transform Coding in Embedded H.264/AVC Video Coding Systems | Tiago Dias, Sebastian Lopez, Nuno Roma, Leonel Sousa | Image and Video Processing | |
| Spinean, Bogdan | 2011 |
Vector Processor Customization for FFT | Bogdan Spinean, Georgi Kuzmanov, Georgi N. Gaydadjiev | Accelerators | |
| Stein, Steffen | 2011 |
Admission Control and Self-Configuration in the EPOC Framework | Steffen Stein, Moritz Neukirchner, Rolf Ernst | SPECIAL SESSION 3: Adaptive Systems | |
| Streubuhr, Martin | 2011 |
Calibration and Validation of Software Performance Models for Pedestrian Detection Systems | Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Otto Lohlein, Jürgen Teich | Simulation and Modeling | |
| Stripf, Timo | 2011 |
Architecture Design Space Exploration of Run-Time Scalable Issue-Width Processors | Ralf Koenig, Timo Stripf, Jan Heisswolf, Jürgen Becker | Design Space Exploration | |
| Stripf, Timo | 2011 |
A Novel ADL-based Compiler-Centric Software Framework for Reconfigurable Mixed-ISA Processors | Timo Stripf, Ralf Koenig, Jürgen Becker | Simulation and Modeling | |
| Stuijk, Sander | 2011 |
Scenario-Aware Dataflow: Modeling, Analysis and Implementation of Dynamic Applications | Sander Stuijk, Marc Geilen, Bart Theelen, Twan Basten | SPECIAL SESSION 3: Adaptive Systems | |
| Sundararajan, Karthik T. | 2011 |
Smart Cache: A Self Adaptive Cache Architecture for Energy Efficiency | Karthik T. Sundararajan, Timothy M. Jones, Nigel Topham | Energy-Aware and Low-Power Designs | |
| Taghavi, Toktam | 2011 |
Design Metrics and Visualization Techniques for Analyzing the Performance of MOEAs in DSE | Toktam Taghavi, Andy D. Pimentel | Design Space Exploration | |
| Takala, Jarmo | 2011 |
TCEMC: A Co-Design Flow for Application-Specific Multicores | Pekka Jääskeläinen, Erno Salminen, Carlos S. de la Lama, Jarmo Takala, Jose Ignacio Martinez | Design Space Exploration | |
| Takala, Jarmo | 2011 |
Instruction Buffer with Limited Control Flow and Loop Nest Support | Vladimír Guzma, Teemu Pitkänen, Jarmo Takala | Memory and Communication Strategies | |
| Teich, Jürgen | 2011 |
Calibration and Validation of Software Performance Models for Pedestrian Detection Systems | Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Otto Lohlein, Jürgen Teich | Simulation and Modeling | |
| ter Braak, Timon D. | 2011 |
Adaptive resource allocation for streaming applications | Timon D. ter Braak, Hermen A. Toersche, Andre B.J. Kokkeler, Gerard J. M. Smit | SPECIAL SESSION 3: Adaptive Systems | |
| Theelen, Bart | 2011 |
Scenario-Aware Dataflow: Modeling, Analysis and Implementation of Dynamic Applications | Sander Stuijk, Marc Geilen, Bart Theelen, Twan Basten | SPECIAL SESSION 3: Adaptive Systems | |
| Thorolfsson, Thor | 2011 |
3D Specific Systems Design and CAD | Paul D. Franzon, Thor Thorolfsson, W. Rhett Davis, Samson Melamed | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Toersche, Hermen A. | 2011 |
Adaptive resource allocation for streaming applications | Timon D. ter Braak, Hermen A. Toersche, Andre B.J. Kokkeler, Gerard J. M. Smit | SPECIAL SESSION 3: Adaptive Systems | |
| Topham, Nigel | 2011 |
Smart Cache: A Self Adaptive Cache Architecture for Energy Efficiency | Karthik T. Sundararajan, Timothy M. Jones, Nigel Topham | Energy-Aware and Low-Power Designs | |
| Trcka, Nikola | 2011 |
Integrated Model-Driven Design-Space Exploration for Embedded Systems | Nikola Trcka, Martijn Hendriks, Twan Basten, Marc Geilen, Lou Somers | SPECIAL SESSION 2: What's next for ESL | |
| Tzenakis, George | 2011 |
Task-based Parallel H.264 Video Encoding for Explicit Communication Architectures | Michail Alvanos, George Tzenakis, Dimitrios S. Nikolopoulos, Angelos Bilas | Image and Video Processing | |
| Valero, Mateo | 2011 |
Breaking the Bandwidth Wall in Chip Multiprocessors | Augusto Vega, Felipe Cabarcas, Alex Ramirez, Mateo Valero | Memory and Communication Strategies | |
| van de Burgwal, Marcel D. | 2011 |
Multi-domain transformational design flow for embedded systems | Kenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, Andre B.J. Kokkeler, Gerard J. M. Smit | Design Space Exploration | |
| Vega, Augusto | 2011 |
Breaking the Bandwidth Wall in Chip Multiprocessors | Augusto Vega, Felipe Cabarcas, Alex Ramirez, Mateo Valero | Memory and Communication Strategies | |
| von Koch, Tobias Edler | 2011 |
Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation | Oscar Almer, Igor Bohm, Tobias Edler von Koch, Bjorn Franke, Stephen Kyle, Volker Seeker | Simulation and Modeling | |
| Wallentowitz, Stefan | 2011 |
Accelerating Collective Communication in Message Passing on Manycore System-on-Chip | Stefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf | Multicore Programming | |
| Wild, Thomas | 2011 |
Accelerating Collective Communication in Message Passing on Manycore System-on-Chip | Stefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf | Multicore Programming | |
| Wu, Yun | 2011 |
A Kernel Interleaved Scheduling Method for Streaming Applications on Soft-core Vector Processors | Chengwei Zheng, John McAllister, Yun Wu | Memory and Communication Strategies | |
| Xydis, Sotirios | 2011 |
Thermal optimization for micro-architectures through selective block replication | Dionisios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris | Energy-Aware and Low-Power Designs | |
| Yakovlev, Alex | 2011 |
Power Adaptive Computing System Design in Energy Harvesting Environment | Qiang Liu, Terrence Mak, Junwen Luo, Wayne Luk, Alex Yakovlev | Energy-Aware and Low-Power Designs | |
| Yakovlev, Alex | 2011 |
On-Chip Dynamic Programming Networks Using 3D-TSV Integration | Ra’ed Al-Dujaily, Terrence Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alex Yakovlev, Chi-Sang Poon | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Zhang, Tong | 2011 |
Introduction to the Special Session on "3D Chips: Challenges and Opportunities" | Tong Zhang | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Zheng, Chengwei | 2011 |
A Kernel Interleaved Scheduling Method for Streaming Applications on Soft-core Vector Processors | Chengwei Zheng, John McAllister, Yun Wu | Memory and Communication Strategies | |
| Zhou, Kuan | 2011 |
On-Chip Dynamic Programming Networks Using 3D-TSV Integration | Ra’ed Al-Dujaily, Terrence Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alex Yakovlev, Chi-Sang Poon | SPECIAL SESSION 1: 3D Chips: Challenges and Opportunities | |
| Aboulhamid, El Mostapha | 2012 |
System Modeling and Multicore Simulation Using Transactions | Amine Anane, El Mostapha Aboulhamid, Yvon Savaria | Embedded Simulation | |
| Alefragis, Panayiotis | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Alfaro, Francisco J. | 2012 |
OSR-Lite: Fast and Deadlock-Free NoC Reconfiguration Framework | Alessandro Strano, Davide Bertozzi, Francisco Trivino, Jose L. Sanchez, Francisco J. Alfaro, Jose Flich | Memory & Comms. Strategies | |
| Almeida, Gabriel Marchesan | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Anane, Amine | 2012 |
System Modeling and Multicore Simulation Using Transactions | Amine Anane, El Mostapha Aboulhamid, Yvon Savaria | Embedded Simulation | |
| Andersch, Michael | 2012 |
Using OpenMP Superscalar for Parallelization of Embedded and Consumer Applications | Michael Andersch, Chi Ching Chi, Ben Juurlink | Design Space Exploration | |
| Anjam, Fakhar | 2012 |
Simultaneous Reconfiguration of Issue-width and Instruction Cache for a VLIW Processor | Fakhar Anjam, Stephan Wong, Luigi Carro, Gabriel L. Nazar, Mateus B. Rutzig | Embedded Processor Design | |
| Annaswamy, Anuradha | 2012 |
Challenges in Automotive Cyber-physical Systems Design | Dip Goswami, Reinhard Schneider, Alejandro Masrur, Martin Lukasiewycz, Samarjit Chakraborty, Harald Voit, Anuradha Annaswamy | Special Session on Aspects Of Cyber-Physical Systems | |
| Aridhi, Slaheddine | 2012 |
Memory Bounds for the Distributed Execution of a Hierarchical Synchronous Data-Flow Graph | Karol Desnos, Maxime Pelcat, Jean-Francois Nezan, Slaheddine Aridhi | Dataflow Analysis | |
| Arora, Manish | 2012 |
Efficient System Design using the Statistical Analysis of Architectural Bottlenecks Methodology | Manish Arora, Feng Wang, Bob Rychlik, Dean M. Tullsen | ESL Tools & Methods | |
| Ascheid, Gerd | 2012 |
Just-in-Time Verification in ADL-based Processor Design | Dominik Auras, Andreas Minwegen, Uwe Deidersen, Stefan Scurmans, Gerd Ascheid, Rainer Leupers | Design Space Exploration | |
| Ascheid, Gerd | 2012 |
Throughput Driven Transformations of Synchronous Data Flows for Mapping to Heterogeneous MPSoCs | Anastasia Stulova, Rainer Leupers, Gerd Ascheid | Dataflow Application Synthesis | |
| Ascheid, Gerd | 2012 |
An FPGA-Accelerated Testbed for Hardware Component Development in MIMO Wireless Communication Systems | Filippo Borlenghi, Dominik Auras, Ernst Martin Witte, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Athanasiou, George S. | 2012 |
A Template-based Methodology for Efficient Microprocessor and FPGA Accelerator Co-Design | Angeliki Kritikakou, Francky Catthoor, George S. Athanasiou, Vasilios Kelefouras, Costas Goutis | Design Space Exploration | |
| Auras, Dominik | 2012 |
Just-in-Time Verification in ADL-based Processor Design | Dominik Auras, Andreas Minwegen, Uwe Deidersen, Stefan Scurmans, Gerd Ascheid, Rainer Leupers | Design Space Exploration | |
| Auras, Dominik | 2012 |
An FPGA-Accelerated Testbed for Hardware Component Development in MIMO Wireless Communication Systems | Filippo Borlenghi, Dominik Auras, Ernst Martin Witte, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Bartzas, Alexandros | 2012 |
Adaptive dynamic memory allocators by estimating application workloads | Ioannis Koutras, Alexandros Bartzas, Dimitrios Soudris | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Basten, Twan | 2012 |
Predictable Dynamic Embedded Data Processing | Marc Geilen, Sander Stuijk, Twan Basten | Special Session on Aspects Of Cyber-Physical Systems | |
| Baudisch, Daniel | 2012 |
Out-Of-Order Execution of Synchronous Data-Flow Networks | Daniel Baudisch, Jens Brandt, Klaus Schneider | Dataflow Analysis | |
| Bayrak, Ali Galip | 2012 |
Counting Stream Registers: An Efficient and Effective Snoop Filter Architecture | Aanjhan Ranganathan, Ali Galip Bayrak, Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo Ienne | Domain-Specific Architectures | |
| Becker, Jürgen | 2012 |
Adaptive Processor Architecture | Michael Hubner, Diana Goehringer, Carsten Tradowky, Joerg Henkel, Jürgen Becker | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Becker, Jürgen | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Becker, Jürgen | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Bekooij, Marco J.G. | 2012 |
An Efficient Asymmetric Distributed Lock for Embedded Multiprocessor Systems | Jochem H. Rutgers, Marco J.G. Bekooij, Gerard J. M. Smit | Embedded Processor Design | |
| Ben-Itzhak, Yaniv | 2012 |
HNOCS: Modular Open-Source Simulator for Heterogeneous NoCs | Yaniv Ben-Itzhak, Eitan Zahavi, Israel Cidon, Avinoam Kolodny | Embedded Simulation | |
| Benini, Luca | 2012 |
A Tightly-Coupled Multi-Core Cluster with Shared-Memory HW Accelerators | Masoud Dehyadegari, Andrea Marongiu, Mohammad Reza Kakoee, Luca Benini, Siamak Mohammadi, Naser Yazdani | Memory & Comms. Strategies | |
| Bertozzi, Davide | 2012 |
OSR-Lite: Fast and Deadlock-Free NoC Reconfiguration Framework | Alessandro Strano, Davide Bertozzi, Francisco Trivino, Jose L. Sanchez, Francisco J. Alfaro, Jose Flich | Memory & Comms. Strategies | |
| Bhattacharyya, Shuvra S. | 2012 |
Instrumentation Techniques for Cyber-Physical Systems Using the Targeted Dataflow Interchange Format | Shuvra S. Bhattacharyya | Special Session on Aspects Of Cyber-Physical Systems | |
| Blume, Holger | 2012 |
Introduction to the Special Session on FPGA-based Emulation of Hardware Architectures | Holger Blume | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Bodin, Bruno | 2012 |
K-Periodic Schedules for Evaluating the Maximum Throughput of a Synchronous Dataflow Graph | Bruno Bodin, Alix Munier-Kordon, Benoit Dupont de Dinechin | Dataflow Analysis | |
| Bonetto, Alessandra | 2012 |
TaBit: a Framework for Task Graph to Bitstream Generation | Alessandra Bonetto, Andrea Cazzaniga, Gianluca C. Durelli, Christian Pilato, Donatella Sciuto, Marco D. Santambrogio | ESL Tools & Methods | |
| Borlenghi, Filippo | 2012 |
An FPGA-Accelerated Testbed for Hardware Component Development in MIMO Wireless Communication Systems | Filippo Borlenghi, Dominik Auras, Ernst Martin Witte, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Boutellier, Jani | 2012 |
Reconfigurable Miniature Sensor Nodes for Condition Monitoring | Teemu Nylanden, Jani Boutellier, Karri Nikunen, Jari Hannuksela, Olli Silven | Domain-Specific Architectures | |
| Brandstatter, Siegfried | 2012 |
An Application-Specific Network-on-Chip for Control Architectures in RF Transceivers | Siegfried Brandstatter, Mario Huemer | Memory & Comms. Strategies | |
| Brandt, Jens | 2012 |
Out-Of-Order Execution of Synchronous Data-Flow Networks | Daniel Baudisch, Jens Brandt, Klaus Schneider | Dataflow Analysis | |
| Brisk, Philip | 2012 |
Counting Stream Registers: An Efficient and Effective Snoop Filter Architecture | Aanjhan Ranganathan, Ali Galip Bayrak, Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo Ienne | Domain-Specific Architectures | |
| Broenink, Jan F. | 2012 |
Model-Driven Robot-Software Design using integrated Models and Co-Simulation | Jan F. Broenink, Yunyun Ni | Special Session on Aspects Of Cyber-Physical Systems | |
| Cardoso, João M. P. | 2012 |
Hardware/Software Specialization Through Aspects: The LARA Approach | João M. P. Cardoso, Tiago Carvalho, Joao Teixeira, Pedro C. Diniz, Fernando Goncalves, Zlatko Petrov | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Carro, Luigi | 2012 |
Simultaneous Reconfiguration of Issue-width and Instruction Cache for a VLIW Processor | Fakhar Anjam, Stephan Wong, Luigi Carro, Gabriel L. Nazar, Mateus B. Rutzig | Embedded Processor Design | |
| Carvalho, Tiago | 2012 |
Hardware/Software Specialization Through Aspects: The LARA Approach | João M. P. Cardoso, Tiago Carvalho, Joao Teixeira, Pedro C. Diniz, Fernando Goncalves, Zlatko Petrov | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Catthoor, Francky | 2012 |
A Template-based Methodology for Efficient Microprocessor and FPGA Accelerator Co-Design | Angeliki Kritikakou, Francky Catthoor, George S. Athanasiou, Vasilios Kelefouras, Costas Goutis | Design Space Exploration | |
| Cazzaniga, Andrea | 2012 |
TaBit: a Framework for Task Graph to Bitstream Generation | Alessandra Bonetto, Andrea Cazzaniga, Gianluca C. Durelli, Christian Pilato, Donatella Sciuto, Marco D. Santambrogio | ESL Tools & Methods | |
| Chakraborty, Samarjit | 2012 |
Challenges in Automotive Cyber-physical Systems Design | Dip Goswami, Reinhard Schneider, Alejandro Masrur, Martin Lukasiewycz, Samarjit Chakraborty, Harald Voit, Anuradha Annaswamy | Special Session on Aspects Of Cyber-Physical Systems | |
| Chana, Anne-Marie | 2012 |
Efficient Hardware Implementation of Data-Flow Parallel Embedded Systems | Patrice Quinton, Anne-Marie Chana, Steven Derrien | Special Session on Aspects Of Cyber-Physical Systems | |
| Chang, Chen | 2012 |
BEE technology overview | Joseph Rothman, Chen Chang | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Charbon, Edoardo | 2012 |
Counting Stream Registers: An Efficient and Effective Snoop Filter Architecture | Aanjhan Ranganathan, Ali Galip Bayrak, Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo Ienne | Domain-Specific Architectures | |
| Chi, Chi Ching | 2012 |
Using OpenMP Superscalar for Parallelization of Embedded and Consumer Applications | Michael Andersch, Chi Ching Chi, Ben Juurlink | Design Space Exploration | |
| Cidon, Israel | 2012 |
HNOCS: Modular Open-Source Simulator for Heterogeneous NoCs | Yaniv Ben-Itzhak, Eitan Zahavi, Israel Cidon, Avinoam Kolodny | Embedded Simulation | |
| Corvino, Rosilde | 2012 |
Design Space Exploration in Application-Specific Hardware Synthesis for Multiple Communicating Nested Loops | Rosilde Corvino, Abdoulaye Gamatie, Marc Geilen, Lech Jozwiak | Dataflow Application Synthesis | |
| Daneshtalab, Masoud | 2012 |
Adaptive Reinforcement Learning Method for Networks-on-Chip | Fahimeh Farahnakian, Masoumeh Ebrahimi, Masoud Daneshtalab, Juha Plosila, Pasi Liljeberg | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Datsios, Chrysovalantis | 2012 |
A Framework for Efficient Cache Resizing | Georgios Keramidas, Chrysovalantis Datsios, Stefanos Kaxiras | Memory & Comms. Strategies | |
| de Dinechin, Benoit Dupont | 2012 |
K-Periodic Schedules for Evaluating the Maximum Throughput of a Synchronous Dataflow Graph | Bruno Bodin, Alix Munier-Kordon, Benoit Dupont de Dinechin | Dataflow Analysis | |
| Dehyadegari, Masoud | 2012 |
A Tightly-Coupled Multi-Core Cluster with Shared-Memory HW Accelerators | Masoud Dehyadegari, Andrea Marongiu, Mohammad Reza Kakoee, Luca Benini, Siamak Mohammadi, Naser Yazdani | Memory & Comms. Strategies | |
| Deidersen, Uwe | 2012 |
Just-in-Time Verification in ADL-based Processor Design | Dominik Auras, Andreas Minwegen, Uwe Deidersen, Stefan Scurmans, Gerd Ascheid, Rainer Leupers | Design Space Exploration | |
| Deprettere, Ed F. | 2012 |
Introduction to the Special Session on Aspects Of Cyber-Physical Systems | Ed Deprettere | Special Session on Aspects Of Cyber-Physical Systems | |
| Derrien, Steven | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Derrien, Steven | 2012 |
Efficient Hardware Implementation of Data-Flow Parallel Embedded Systems | Patrice Quinton, Anne-Marie Chana, Steven Derrien | Special Session on Aspects Of Cyber-Physical Systems | |
| Desnos, Karol | 2012 |
Memory Bounds for the Distributed Execution of a Hierarchical Synchronous Data-Flow Graph | Karol Desnos, Maxime Pelcat, Jean-Francois Nezan, Slaheddine Aridhi | Dataflow Analysis | |
| Dimitroulakos, Grigoris | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Diniz, Pedro C. | 2012 |
Introduction to the Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | Diana Goehringer, Pedro Diniz | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Diniz, Pedro C. | 2012 |
Hardware/Software Specialization Through Aspects: The LARA Approach | João M. P. Cardoso, Tiago Carvalho, Joao Teixeira, Pedro C. Diniz, Fernando Goncalves, Zlatko Petrov | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Durelli, Gianluca C. | 2012 |
TaBit: a Framework for Task Graph to Bitstream Generation | Alessandra Bonetto, Andrea Cazzaniga, Gianluca C. Durelli, Christian Pilato, Donatella Sciuto, Marco D. Santambrogio | ESL Tools & Methods | |
| Ebrahimi, Masoumeh | 2012 |
Adaptive Reinforcement Learning Method for Networks-on-Chip | Fahimeh Farahnakian, Masoumeh Ebrahimi, Masoud Daneshtalab, Juha Plosila, Pasi Liljeberg | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Engel, Michael | 2012 |
Efficient Computing in Cyber-Physical Systems | Peter Marwedel, Michael Engel | Special Session on Aspects Of Cyber-Physical Systems | |
| Farahnakian, Fahimeh | 2012 |
Adaptive Reinforcement Learning Method for Networks-on-Chip | Fahimeh Farahnakian, Masoumeh Ebrahimi, Masoud Daneshtalab, Juha Plosila, Pasi Liljeberg | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Flich, Jose | 2012 |
OSR-Lite: Fast and Deadlock-Free NoC Reconfiguration Framework | Alessandro Strano, Davide Bertozzi, Francisco Trivino, Jose L. Sanchez, Francisco J. Alfaro, Jose Flich | Memory & Comms. Strategies | |
| Gamatie, Abdoulaye | 2012 |
Design Space Exploration in Application-Specific Hardware Synthesis for Multiple Communicating Nested Loops | Rosilde Corvino, Abdoulaye Gamatie, Marc Geilen, Lech Jozwiak | Dataflow Application Synthesis | |
| Gaydadjiev, Georgi N. | 2012 |
Architecture-Level Fault-Tolerance for Biomedical Implants | Robert M. Seepers, Christos Strydis, Georgi N. Gaydadjiev | Domain-Specific Architectures | |
| Geilen, Marc | 2012 |
Design Space Exploration in Application-Specific Hardware Synthesis for Multiple Communicating Nested Loops | Rosilde Corvino, Abdoulaye Gamatie, Marc Geilen, Lech Jozwiak | Dataflow Application Synthesis | |
| Geilen, Marc | 2012 |
Predictable Dynamic Embedded Data Processing | Marc Geilen, Sander Stuijk, Twan Basten | Special Session on Aspects Of Cyber-Physical Systems | |
| Glass, Michael | 2012 |
A Co-simulation Approach for System-Level Analysis of Embedded Control Systems | Michael Glass, Jürgen Teich, Liyuan Zhang | Special Session on Aspects Of Cyber-Physical Systems | |
| Goehringer, Diana | 2012 |
Introduction to the Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | Diana Goehringer, Pedro Diniz | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Goehringer, Diana | 2012 |
Adaptive Processor Architecture | Michael Hubner, Diana Goehringer, Carsten Tradowky, Joerg Henkel, Jüurgen Becker | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Goehringer, Diana | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Gogos, Christos | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Goncalves, Fernando | 2012 |
Hardware/Software Specialization Through Aspects: The LARA Approach | João M. P. Cardoso, Tiago Carvalho, Joao Teixeira, Pedro C. Diniz, Fernando Goncalves, Zlatko Petrov | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Goossens, Kees | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Goswami, Dip | 2012 |
Challenges in Automotive Cyber-physical Systems Design | Dip Goswami, Reinhard Schneider, Alejandro Masrur, Martin Lukasiewycz, Samarjit Chakraborty, Harald Voit, Anuradha Annaswamy | Special Session on Aspects Of Cyber-Physical Systems | |
| Goulas, George | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Goutis, Costas | 2012 |
A Template-based Methodology for Efficient Microprocessor and FPGA Accelerator Co-Design | Angeliki Kritikakou, Francky Catthoor, George S. Athanasiou, Vasilios Kelefouras, Costas Goutis | Design Space Exploration | |
| Hamalainen, Timo D. | 2012 |
System-on-Chip deployment with MCAPI abstraction and IP-XACT metadata | Lauri Matilainen, Lasse Lehtonen, Joni-Matti Maatta, Erno Salminen, Timo D. Hamalainen | ESL Tools & Methods | |
| Hannuksela, Jari | 2012 |
Reconfigurable Miniature Sensor Nodes for Condition Monitoring | Teemu Nylanden, Jani Boutellier, Karri Nikunen, Jari Hannuksela, Olli Silven | Domain-Specific Architectures | |
| Haubelt, Christian | 2012 |
Virtual Prototyping for Efficient Multi-Core ECU Development of Driver Assistance Systems | Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Anestis Terzis, Jürgen Teich | Embedded Simulation | |
| Henkel, Joerg | 2012 |
Adaptive Processor Architecture | Michael Hubner, Diana Goehringer, Carsten Tradowky, Joerg Henkel, Jürgen Becker | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Herkersdorf, Andreas | 2012 |
Multicore Enablement for Cyber Physical Systems | Andreas Herkersdorf | Special Session on Aspects Of Cyber-Physical Systems | |
| Hubner, Michael | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Hubner, Michael | 2012 |
Adaptive Processor Architecture | Michael Hubner, Diana Goehringer, Carsten Tradowky, Joerg Henkel, Jürgen Becker | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Hubner, Michael | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Huemer, Mario | 2012 |
An Application-Specific Network-on-Chip for Control Architectures in RF Transceivers | Siegfried Brandstatter, Mario Huemer | Memory & Comms. Strategies | |
| Ienne, Paolo | 2012 |
Counting Stream Registers: An Efficient and Effective Snoop Filter Architecture | Aanjhan Ranganathan, Ali Galip Bayrak, Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo Ienne | Domain-Specific Architectures | |
| Jozwiak, Lech | 2012 |
Design Space Exploration in Application-Specific Hardware Synthesis for Multiple Communicating Nested Loops | Rosilde Corvino, Abdoulaye Gamatie, Marc Geilen, Lech Jozwiak | Dataflow Application Synthesis | |
| Juurlink, Ben | 2012 |
Using OpenMP Superscalar for Parallelization of Embedded and Consumer Applications | Michael Andersch, Chi Ching Chi, Ben Juurlink | Design Space Exploration | |
| Kakoee, Mohammad Reza | 2012 |
A Tightly-Coupled Multi-Core Cluster with Shared-Memory HW Accelerators | Masoud Dehyadegari, Andrea Marongiu, Mohammad Reza Kakoee, Luca Benini, Siamak Mohammadi, Naser Yazdani | Memory & Comms. Strategies | |
| Kanistras, Nikolaos | 2012 |
An FPGA-based Prototyping Method for Verification, Characterization and Optimization of LDPC Error Correction Systems | Panagiotis Sakellariou, Ioannis Tsatsaragkos, Nikolaos Kanistras, Ahmed Mahdi, Vassilis Paliouras | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Kavvadias, Nikolaos | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Kaxiras, Stefanos | 2012 |
A Framework for Efficient Cache Resizing | Georgios Keramidas, Chrysovalantis Datsios, Stefanos Kaxiras | Memory & Comms. Strategies | |
| Kelefouras, Vasilios | 2012 |
A Template-based Methodology for Efficient Microprocessor and FPGA Accelerator Co-Design | Angeliki Kritikakou, Francky Catthoor, George S. Athanasiou, Vasilios Kelefouras, Costas Goutis | Design Space Exploration | |
| Kempf, Torsten | 2012 |
An FPGA-Accelerated Testbed for Hardware Component Development in MIMO Wireless Communication Systems | Filippo Borlenghi, Dominik Auras, Ernst Martin Witte, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Keramidas, Georgios | 2012 |
A Framework for Efficient Cache Resizing | Georgios Keramidas, Chrysovalantis Datsios, Stefanos Kaxiras | Memory & Comms. Strategies | |
| Kiesel, Rainer | 2012 |
Virtual Prototyping for Efficient Multi-Core ECU Development of Driver Assistance Systems | Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Anestis Terzis, Jürgen Teich | Embedded Simulation | |
| Kluter, Theo | 2012 |
Counting Stream Registers: An Efficient and Effective Snoop Filter Architecture | Aanjhan Ranganathan, Ali Galip Bayrak, Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo Ienne | Domain-Specific Architectures | |
| Koedam, Martijn | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Kolodny, Avinoam | 2012 |
HNOCS: Modular Open-Source Simulator for Heterogeneous NoCs | Yaniv Ben-Itzhak, Eitan Zahavi, Israel Cidon, Avinoam Kolodny | Embedded Simulation | |
| Korb, Matthias | 2012 |
A Quantitative Analysis of Fixed-Point LDPC-Decoder Implementations using Hardware-Accelerated HDL Emulations | Matthias Korb, Tobias G. Noll | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Koutras, Ioannis | 2012 |
Adaptive dynamic memory allocators by estimating application workloads | Ioannis Koutras, Alexandros Bartzas, Dimitrios Soudris | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Kritharidis, Dimitrios | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Kritikakou, Angeliki | 2012 |
A Template-based Methodology for Efficient Microprocessor and FPGA Accelerator Co-Design | Angeliki Kritikakou, Francky Catthoor, George S. Athanasiou, Vasilios Kelefouras, Costas Goutis | Design Space Exploration | |
| Lehtonen, Lasse | 2012 |
System-on-Chip deployment with MCAPI abstraction and IP-XACT metadata | Lauri Matilainen, Lasse Lehtonen, Joni-Matti Maatta, Erno Salminen, Timo D. Hamalainen | ESL Tools & Methods | |
| Lemaire, Romain | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Lemonnier, Fabrice | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Leupers, Rainer | 2012 |
Just-in-Time Verification in ADL-based Processor Design | Dominik Auras, Andreas Minwegen, Uwe Deidersen, Stefan Scurmans, Gerd Ascheid, Rainer Leupers | Design Space Exploration | |
| Leupers, Rainer | 2012 |
Throughput Driven Transformations of Synchronous Data Flows for Mapping to Heterogeneous MPSoCs | Anastasia Stulova, Rainer Leupers, Gerd Ascheid | Dataflow Application Synthesis | |
| Leupers, Rainer | 2012 |
An FPGA-Accelerated Testbed for Hardware Component Development in MIMO Wireless Communication Systems | Filippo Borlenghi, Dominik Auras, Ernst Martin Witte, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Liljeberg, Pasi | 2012 |
Adaptive Reinforcement Learning Method for Networks-on-Chip | Fahimeh Farahnakian, Masoumeh Ebrahimi, Masoud Daneshtalab, Juha Plosila, Pasi Liljeberg | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Lukasiewycz, Martin | 2012 |
Challenges in Automotive Cyber-physical Systems Design | Dip Goswami, Reinhard Schneider, Alejandro Masrur, Martin Lukasiewycz, Samarjit Chakraborty, Harald Voit, Anuradha Annaswamy | Special Session on Aspects Of Cyber-Physical Systems | |
| Maatta, Joni-Matti | 2012 |
System-on-Chip deployment with MCAPI abstraction and IP-XACT metadata | Lauri Matilainen, Lasse Lehtonen, Joni-Matti Maatta, Erno Salminen, Timo D. Hamalainen | ESL Tools & Methods | |
| Mahdi, Ahmed | 2012 |
An FPGA-based Prototyping Method for Verification, Characterization and Optimization of LDPC Error Correction Systems | Panagiotis Sakellariou, Ioannis Tsatsaragkos, Nikolaos Kanistras, Ahmed Mahdi, Vassilis Paliouras | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Marongiu, Andrea | 2012 |
A Tightly-Coupled Multi-Core Cluster with Shared-Memory HW Accelerators | Masoud Dehyadegari, Andrea Marongiu, Mohammad Reza Kakoee, Luca Benini, Siamak Mohammadi, Naser Yazdani | Memory & Comms. Strategies | |
| Marwedel, Peter | 2012 |
Efficient Computing in Cyber-Physical Systems | Peter Marwedel, Michael Engel | Special Session on Aspects Of Cyber-Physical Systems | |
| Masrur, Alejandro | 2012 |
Challenges in Automotive Cyber-physical Systems Design | Dip Goswami, Reinhard Schneider, Alejandro Masrur, Martin Lukasiewycz, Samarjit Chakraborty, Harald Voit, Anuradha Annaswamy | Special Session on Aspects Of Cyber-Physical Systems | |
| Masselos, Kostas | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Matilainen, Lauri | 2012 |
System-on-Chip deployment with MCAPI abstraction and IP-XACT metadata | Lauri Matilainen, Lasse Lehtonen, Joni-Matti Maatta, Erno Salminen, Timo D. Hamalainen | ESL Tools & Methods | |
| May, David | 2012 |
An FPGA-based Probability-aware Fault Simulator | David May, Walter Stechele | Special Session on FPGA-based Emulation of Hardware Architectures | |
| McAllister, John | 2012 |
Automatic FPGA Synthesis of Memory Intensive C-based Kernels | Matthew Milford, John McAllister | Dataflow Application Synthesis | |
| Meloni, Paolo | 2012 |
Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems | Paolo Meloni, Sebastiano Pomata, Luigi Raffo, Roberta Piscitelli, Andy D. Pimentel | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Menard, Daniel | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Meyr, Heinrich | 2012 |
An FPGA-Accelerated Testbed for Hardware Component Development in MIMO Wireless Communication Systems | Filippo Borlenghi, Dominik Auras, Ernst Martin Witte, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Michaud, Pierre | 2012 |
BADCO : Behavioral Application-Dependent Superscalar Core Model | Ricardo A. Velasquez, Pierre Michaud, Andre Seznec | Embedded Simulation | |
| Milford, Matthew | 2012 |
Automatic FPGA Synthesis of Memory Intensive C-based Kernels | Matthew Milford, John McAllister | Dataflow Application Synthesis | |
| Millet, Philippe | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Minwegen, Andreas | 2012 |
Just-in-Time Verification in ADL-based Processor Design | Dominik Auras, Andreas Minwegen, Uwe Deidersen, Stefan Scurmans, Gerd Ascheid, Rainer Leupers | Design Space Exploration | |
| Mitas, Nikolaos | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Mohammadi, Siamak | 2012 |
A Tightly-Coupled Multi-Core Cluster with Shared-Memory HW Accelerators | Masoud Dehyadegari, Andrea Marongiu, Mohammad Reza Kakoee, Luca Benini, Siamak Mohammadi, Naser Yazdani | Memory & Comms. Strategies | |
| Morgan, Marc-Nicolas | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Munier-Kordon, Alix | 2012 |
K-Periodic Schedules for Evaluating the Maximum Throughput of a Synchronous Dataflow Graph | Bruno Bodin, Alix Munier-Kordon, Benoit Dupont de Dinechin | Dataflow Analysis | |
| Nazar, Gabriel L. | 2012 |
Simultaneous Reconfiguration of Issue-width and Instruction Cache for a VLIW Processor | Fakhar Anjam, Stephan Wong, Luigi Carro, Gabriel L. Nazar, Mateus B. Rutzig | Embedded Processor Design | |
| Nezan, Jean-Francois | 2012 |
Memory Bounds for the Distributed Execution of a Hierarchical Synchronous Data-Flow Graph | Karol Desnos, Maxime Pelcat, Jean-Francois Nezan, Slaheddine Aridhi | Dataflow Analysis | |
| Ni, Yunyun | 2012 |
Model-Driven Robot-Software Design using integrated Models and Co-Simulation | Jan F. Broenink, Yunyun Ni | Special Session on Aspects Of Cyber-Physical Systems | |
| Nikunen, Karri | 2012 |
Reconfigurable Miniature Sensor Nodes for Condition Monitoring | Teemu Nylanden, Jani Boutellier, Karri Nikunen, Jari Hannuksela, Olli Silven | Domain-Specific Architectures | |
| Noll, Tobias G. | 2012 |
A Quantitative Analysis of Fixed-Point LDPC-Decoder Implementations using Hardware-Accelerated HDL Emulations | Matthias Korb, Tobias G. Noll | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Nylanden, Teemu | 2012 |
Reconfigurable Miniature Sensor Nodes for Condition Monitoring | Teemu Nylanden, Jani Boutellier, Karri Nikunen, Jari Hannuksela, Olli Silven | Domain-Specific Architectures | |
| Oey, Oliver | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Paliouras, Vassilis | 2012 |
An FPGA-based Prototyping Method for Verification, Characterization and Optimization of LDPC Error Correction Systems | Panagiotis Sakellariou, Ioannis Tsatsaragkos, Nikolaos Kanistras, Ahmed Mahdi, Vassilis Paliouras | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Pelcat, Maxime | 2012 |
Memory Bounds for the Distributed Execution of a Hierarchical Synchronous Data-Flow Graph | Karol Desnos, Maxime Pelcat, Jean-Francois Nezan, Slaheddine Aridhi | Dataflow Analysis | |
| Petrov, Zlatko | 2012 |
Hardware/Software Specialization Through Aspects: The LARA Approach | João M. P. Cardoso, Tiago Carvalho, Joao Teixeira, Pedro C. Diniz, Fernando Goncalves, Zlatko Petrov | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Piguet, Christian | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Pilato, Christian | 2012 |
TaBit: a Framework for Task Graph to Bitstream Generation | Alessandra Bonetto, Andrea Cazzaniga, Gianluca C. Durelli, Christian Pilato, Donatella Sciuto, Marco D. Santambrogio | ESL Tools & Methods | |
| Pillement, Sebastien | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Pimentel, Andy D. | 2012 |
Interleaving Methods for Hybrid System-level MPSoC Design Space Exploration | Roberta Piscitelli, Andy D. Pimentel | Design Space Exploration | |
| Pimentel, Andy D. | 2012 |
Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems | Paolo Meloni, Sebastiano Pomata, Luigi Raffo, Roberta Piscitelli, Andy D. Pimentel | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Piscitelli, Roberta | 2012 |
Interleaving Methods for Hybrid System-level MPSoC Design Space Exploration | Roberta Piscitelli, Andy D. Pimentel | Design Space Exploration | |
| Piscitelli, Roberta | 2012 |
Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems | Paolo Meloni, Sebastiano Pomata, Luigi Raffo, Roberta Piscitelli, Andy D. Pimentel | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Plosila, Juha | 2012 |
Adaptive Reinforcement Learning Method for Networks-on-Chip | Fahimeh Farahnakian, Masoumeh Ebrahimi, Masoud Daneshtalab, Juha Plosila, Pasi Liljeberg | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Pomata, Sebastiano | 2012 |
Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems | Paolo Meloni, Sebastiano Pomata, Luigi Raffo, Roberta Piscitelli, Andy D. Pimentel | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Pratas, Frederico | 2012 |
Energy Efficient Stream-based Configurable Architecture for Embedded Platforms | Frederico Pratas, Pedro Tomas, Pedro Trancoso, Leonel Sousa | Embedded Processor Design | |
| Quinton, Patrice | 2012 |
Efficient Hardware Implementation of Data-Flow Parallel Embedded Systems | Patrice Quinton, Anne-Marie Chana, Steven Derrien | Special Session on Aspects Of Cyber-Physical Systems | |
| Raffo, Luigi | 2012 |
Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems | Paolo Meloni, Sebastiano Pomata, Luigi Raffo, Roberta Piscitelli, Andy D. Pimentel | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Ranganathan, Aanjhan | 2012 |
Counting Stream Registers: An Efficient and Effective Snoop Filter Architecture | Aanjhan Ranganathan, Ali Galip Bayrak, Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo Ienne | Domain-Specific Architectures | |
| Rauwerda, Gerard | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Rothman, Joseph | 2012 |
BEE technology overview | Joseph Rothman, Chen Chang | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Rutgers, Jochem H. | 2012 |
An Efficient Asymmetric Distributed Lock for Embedded Multiprocessor Systems | Jochem H. Rutgers, Marco J.G. Bekooij, Gerard J. M. Smit | Embedded Processor Design | |
| Rutzig, Mateus B. | 2012 |
Simultaneous Reconfiguration of Issue-width and Instruction Cache for a VLIW Processor | Fakhar Anjam, Stephan Wong, Luigi Carro, Gabriel L. Nazar, Mateus B. Rutzig | Embedded Processor Design | |
| Rychlik, Bob | 2012 |
Efficient System Design using the Statistical Analysis of Architectural Bottlenecks Methodology | Manish Arora, Feng Wang, Bob Rychlik, Dean M. Tullsen | ESL Tools & Methods | |
| Sakellariou, Panagiotis | 2012 |
An FPGA-based Prototyping Method for Verification, Characterization and Optimization of LDPC Error Correction Systems | Panagiotis Sakellariou, Ioannis Tsatsaragkos, Nikolaos Kanistras, Ahmed Mahdi, Vassilis Paliouras | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Salminen, Erno | 2012 |
System-on-Chip deployment with MCAPI abstraction and IP-XACT metadata | Lauri Matilainen, Lasse Lehtonen, Joni-Matti Maatta, Erno Salminen, Timo D. Hamalainen | ESL Tools & Methods | |
| Sanchez, Jose L. | 2012 |
OSR-Lite: Fast and Deadlock-Free NoC Reconfiguration Framework | Alessandro Strano, Davide Bertozzi, Francisco Trivino, Jose L. Sanchez, Francisco J. Alfaro, Jose Flich | Memory & Comms. Strategies | |
| Santambrogio, Marco D. | 2012 |
TaBit: a Framework for Task Graph to Bitstream Generation | Alessandra Bonetto, Andrea Cazzaniga, Gianluca C. Durelli, Christian Pilato, Donatella Sciuto, Marco D. Santambrogio | ESL Tools & Methods | |
| Savaria, Yvon | 2012 |
System Modeling and Multicore Simulation Using Transactions | Amine Anane, El Mostapha Aboulhamid, Yvon Savaria | Embedded Simulation | |
| Schneider, Klaus | 2012 |
Out-Of-Order Execution of Synchronous Data-Flow Networks | Daniel Baudisch, Jens Brandt, Klaus Schneider | Dataflow Analysis | |
| Schneider, Reinhard | 2012 |
Challenges in Automotive Cyber-physical Systems Design | Dip Goswami, Reinhard Schneider, Alejandro Masrur, Martin Lukasiewycz, Samarjit Chakraborty, Harald Voit, Anuradha Annaswamy | Special Session on Aspects Of Cyber-Physical Systems | |
| Schoeberl, Martin | 2012 |
Is Time Predictability Quantifiable? | Martin Schoeberl | Special Session on Aspects Of Cyber-Physical Systems | |
| Sciuto, Donatella | 2012 |
TaBit: a Framework for Task Graph to Bitstream Generation | Alessandra Bonetto, Andrea Cazzaniga, Gianluca C. Durelli, Christian Pilato, Donatella Sciuto, Marco D. Santambrogio | ESL Tools & Methods | |
| Scurmans, Stefan | 2012 |
Just-in-Time Verification in ADL-based Processor Design | Dominik Auras, Andreas Minwegen, Uwe Deidersen, Stefan Scurmans, Gerd Ascheid, Rainer Leupers | Design Space Exploration | |
| Seepers, Robert M. | 2012 |
Architecture-Level Fault-Tolerance for Biomedical Implants | Robert M. Seepers, Christos Strydis, Georgi N. Gaydadjiev | Domain-Specific Architectures | |
| Sentieys, Olivier | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Sentieys, Olivier | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Seznec, Andre | 2012 |
BADCO : Behavioral Application-Dependent Superscalar Core Model | Ricardo A. Velasquez, Pierre Michaud, Andre Seznec | Embedded Simulation | |
| Sifakis, Joseph | 2012 |
Rigorous Design of Cyber-physical Systems | Joseph Sifakis | Special Session on Aspects Of Cyber-Physical Systems | |
| Silven, Olli | 2012 |
Reconfigurable Miniature Sensor Nodes for Condition Monitoring | Teemu Nylanden, Jani Boutellier, Karri Nikunen, Jari Hannuksela, Olli Silven | Domain-Specific Architectures | |
| Sinha, Shubhendu | 2012 |
Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures | Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hubner, Jürgen Becker, Sebastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Smit, Gerard J. M. | 2012 |
An Efficient Asymmetric Distributed Lock for Embedded Multiprocessor Systems | Jochem H. Rutgers, Marco J.G. Bekooij, Gerard J. M. Smit | Embedded Processor Design | |
| Soudris, Dimitrios | 2012 |
Adaptive dynamic memory allocators by estimating application workloads | Ioannis Koutras, Alexandros Bartzas, Dimitrios Soudris | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Sousa, Leonel | 2012 |
Energy Efficient Stream-based Configurable Architecture for Embedded Platforms | Frederico Pratas, Pedro Tomas, Pedro Trancoso, Leonel Sousa | Embedded Processor Design | |
| Stechele, Walter | 2012 |
An FPGA-based Probability-aware Fault Simulator | David May, Walter Stechele | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Strano, Alessandro | 2012 |
OSR-Lite: Fast and Deadlock-Free NoC Reconfiguration Framework | Alessandro Strano, Davide Bertozzi, Francisco Trivino, Jose L. Sanchez, Francisco J. Alfaro, Jose Flich | Memory & Comms. Strategies | |
| Streubuhr, Martin | 2012 |
Virtual Prototyping for Efficient Multi-Core ECU Development of Driver Assistance Systems | Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Anestis Terzis, Jürgen Teich | Embedded Simulation | |
| Stripf, Timo | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Strydis, Christos | 2012 |
Architecture-Level Fault-Tolerance for Biomedical Implants | Robert M. Seepers, Christos Strydis, Georgi N. Gaydadjiev | Domain-Specific Architectures | |
| Stuijk, Sander | 2012 |
Predictable Dynamic Embedded Data Processing | Marc Geilen, Sander Stuijk, Twan Basten | Special Session on Aspects Of Cyber-Physical Systems | |
| Stulova, Anastasia | 2012 |
Throughput Driven Transformations of Synchronous Data Flows for Mapping to Heterogeneous MPSoCs | Anastasia Stulova, Rainer Leupers, Gerd Ascheid | Dataflow Application Synthesis | |
| Sunesen, Kim | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Teich, Jürgen | 2012 |
Virtual Prototyping for Efficient Multi-Core ECU Development of Driver Assistance Systems | Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Anestis Terzis, Jürgen Teich | Embedded Simulation | |
| Teich, Jürgen | 2012 |
A Co-simulation Approach for System-Level Analysis of Embedded Control Systems | Michael Glass, Jürgen Teich, Liyuan Zhang | Special Session on Aspects Of Cyber-Physical Systems | |
| Teixeira, Joao | 2012 |
Hardware/Software Specialization Through Aspects: The LARA Approach | João M. P. Cardoso, Tiago Carvalho, Joao Teixeira, Pedro C. Diniz, Fernando Goncalves, Zlatko Petrov | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Terzis, Anestis | 2012 |
Virtual Prototyping for Efficient Multi-Core ECU Development of Driver Assistance Systems | Rainer Kiesel, Martin Streubuhr, Christian Haubelt, Anestis Terzis, Jürgen Teich | Embedded Simulation | |
| Tomas, Pedro | 2012 |
Energy Efficient Stream-based Configurable Architecture for Embedded Platforms | Frederico Pratas, Pedro Tomas, Pedro Trancoso, Leonel Sousa | Embedded Processor Design | |
| Tradowky, Carsten | 2012 |
Adaptive Processor Architecture | Michael Hubner, Diana Goehringer, Carsten Tradowky, Joerg Henkel, Jürgen Becker | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Trancoso, Pedro | 2012 |
Energy Efficient Stream-based Configurable Architecture for Embedded Platforms | Frederico Pratas, Pedro Tomas, Pedro Trancoso, Leonel Sousa | Embedded Processor Design | |
| Trivino, Francisco | 2012 |
OSR-Lite: Fast and Deadlock-Free NoC Reconfiguration Framework | Alessandro Strano, Davide Bertozzi, Francisco Trivino, Jose L. Sanchez, Francisco J. Alfaro, Jose Flich | Memory & Comms. Strategies | |
| Tsatsaragkos, Ioannis | 2012 |
An FPGA-based Prototyping Method for Verification, Characterization and Optimization of LDPC Error Correction Systems | Panagiotis Sakellariou, Ioannis Tsatsaragkos, Nikolaos Kanistras, Ahmed Mahdi, Vassilis Paliouras | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Tullsen, Dean M. | 2012 |
Efficient System Design using the Statistical Analysis of Architectural Bottlenecks Methodology | Manish Arora, Feng Wang, Bob Rychlik, Dean M. Tullsen | ESL Tools & Methods | |
| Valouxis, Christos | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Velasquez, Ricardo A. | 2012 |
BADCO : Behavioral Application-Dependent Superscalar Core Model | Ricardo A. Velasquez, Pierre Michaud, Andre Seznec | Embedded Simulation | |
| Voit, Harald | 2012 |
Challenges in Automotive Cyber-physical Systems Design | Dip Goswami, Reinhard Schneider, Alejandro Masrur, Martin Lukasiewycz, Samarjit Chakraborty, Harald Voit, Anuradha Annaswamy | Special Session on Aspects Of Cyber-Physical Systems | |
| Voros, Nikolaos S. | 2012 |
From Scilab to Multicore Embedded Systems: Algorithms and Methodologies | George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Goehringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hubner, Timo Stripf, Oliver Oey, Juergen Becker, Gerard Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas | Special Session on Programming Paradigms for Reconfigurable Multi-Core Embedded Systems | |
| Wang, Feng | 2012 |
Efficient System Design using the Statistical Analysis of Architectural Bottlenecks Methodology | Manish Arora, Feng Wang, Bob Rychlik, Dean M. Tullsen | ESL Tools & Methods | |
| Witte, Ernst Martin | 2012 |
An FPGA-Accelerated Testbed for Hardware Component Development in MIMO Wireless Communication Systems | Filippo Borlenghi, Dominik Auras, Ernst Martin Witte, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr | Special Session on FPGA-based Emulation of Hardware Architectures | |
| Wong, Stephan | 2012 |
Simultaneous Reconfiguration of Issue-width and Instruction Cache for a VLIW Processor | Fakhar Anjam, Stephan Wong, Luigi Carro, Gabriel L. Nazar, Mateus B. Rutzig | Embedded Processor Design | |
| Yazdani, Naser | 2012 |
A Tightly-Coupled Multi-Core Cluster with Shared-Memory HW Accelerators | Masoud Dehyadegari, Andrea Marongiu, Mohammad Reza Kakoee, Luca Benini, Siamak Mohammadi, Naser Yazdani | Memory & Comms. Strategies | |
| Zahavi, Eitan | 2012 |
HNOCS: Modular Open-Source Simulator for Heterogeneous NoCs | Yaniv Ben-Itzhak, Eitan Zahavi, Israel Cidon, Avinoam Kolodny | Embedded Simulation | |
| Zhang, Liyuan | 2012 |
A Co-simulation Approach for System-Level Analysis of Embedded Control Systems | Michael Glass, Jürgen Teich, Liyuan Zhang | Special Session on Aspects Of Cyber-Physical Systems | |
| Goodacre, John | 2012 |
The Homogeneity of Architecture in a Heterogeneous world | John Goodacre | SAMOS XII - Keynote | 2012-IC-K1 |
| Lee, Edward A. | 2012 |
It's About Time | Edward A. Lee | SAMOS XII - Keynote | 2012-IC-K2 |
| Mencer, Oskar | 2012 |
Maximum Performance Computing for Exascale Applications | Oskar Mencer | SAMOS XII - Keynote | 2012-IC-K3 |
| Abellán, José L. | 2013 | ECONO: Express Coherence Notifications for Efficient Cache Coherency in Many-Core CMPs | José L. Abellán, Alberto Ros, Juan Fernández, Manuel E. Acacio | Manycore Architectures | |
| Acacio, Manuel E. | 2013 | ECONO: Express Coherence Notifications for Efficient Cache Coherency in Many-Core CMPs | José L. Abellán, Alberto Ros, Juan Fernández, Manuel E. Acacio | Manycore Architectures | |
| Agathos, Spiros N. | 2013 | Deploying OpenMP on an Embedded Multicore Accelerator | Spiros N. Agathos, Vassilios V. Dimakopoulos, Aggelos Mourelis, Alexandros Papadogiannakis | Modelling, Mapping, and Scheduling | |
| Airoldi, Roberto | 2013 | A Scalable FFT Processor Architecture for OFDM Based Communication Systems | Deepak Revanna, Omer Anjum, Manuele Cucchi, Roberto Airoldi, Jari Nurmi | GPU- and FFT-Architectures | |
| Alexandrescu, Dan | 2013 | Pulse-Length Determination Techniques in the Rectangular Single Event Transient Fault Model | Alireza Rohani, Hans G. Kerkhoff, Enrico Costenaro, Dan Alexandrescu | Fault-Modeling and Test | |
| Anjum, Omer | 2013 | A Scalable FFT Processor Architecture for OFDM Based Communication Systems | Deepak Revanna, Omer Anjum, Manuele Cucchi, Roberto Airoldi, Jari Nurmi | GPU- and FFT-Architectures | |
| Aridhi, Slaheddine | 2013 | PiMM: Parameterized and Interfaced Dataflow Meta-Model for MPSoCs Runtime Reconfiguration | Karol Desnos, Maxime Pelcat, Jean-François Nezan, Shuvra S. Bhattacharyya, Slaheddine Aridhi | Modelling and Design Space Exploration | |
| Arndt, Oliver Jakob | 2013 | Parallel Implementation of Real-Time Semi-Global Matching on Embedded Multi-Core Architectures | Oliver Jakob Arndt, Daniel Becker, Christian Banz, Holger Blume | Modelling and Design Space Exploration | |
| Ascia, Giuseppe | 2013 | NoC Links Energy Reduction through Link Voltage Scaling | Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania | Energy-Awareness and Low Power | |
| Banz, Christian | 2013 | Parallel Implementation of Real-Time Semi-Global Matching on Embedded Multi-Core Architectures | Oliver Jakob Arndt, Daniel Becker, Christian Banz, Holger Blume | Modelling and Design Space Exploration | |
| Bartzas, Alex | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Basu, Ananda | 2013 | Stochastic Modeling and Performance Analysis of Multimedia SoCs | Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty | SOCs and Array Processors | |
| Bates, Daniel | 2013 | Exploiting Tightly-Coupled Cores | Daniel Bates, Alex Bradbury, Andreas Koltes, Robert Mullins | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Bayramoglu, Muhammet Fatih | 2013 | Design of a Unified Transport Triggered Processor for LDPC/Turbo Decoder | Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu, Markku Juntti, Amanullah Ghazi, Olli Silvén | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Becker, Daniel | 2013 | Parallel Implementation of Real-Time Semi-Global Matching on Embedded Multi-Core Architectures | Oliver Jakob Arndt, Daniel Becker, Christian Banz, Holger Blume | Modelling and Design Space Exploration | |
| Bedford Taylor, Michael | 2013 | TimeCube: A Manycore Embedded Processor with Interference-Agnostic Progress Tracking | Anshuman Gupta, Jack Sampson, Michael Bedford Taylor | Manycore Architectures | |
| Benhamou, Pierre-Yves | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Bensalem, Saddek | 2013 | Stochastic Modeling and Performance Analysis of Multimedia SoCs | Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty | SOCs and Array Processors | |
| Bertacco, Valeria | 2013 | Cobra: a Comprehensive Bundle-based Reliable Architecture | Andrea Pellegrini, Valeria Bertacco | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Bhattacharyya, Shuvra S. | 2013 | PiMM: Parameterized and Interfaced Dataflow Meta-Model for MPSoCs Runtime Reconfiguration | Karol Desnos, Maxime Pelcat, Jean-François Nezan, Shuvra S. Bhattacharyya, Slaheddine Aridhi | Modelling and Design Space Exploration | |
| Blume, Holger | 2013 | Parallel Implementation of Real-Time Semi-Global Matching on Embedded Multi-Core Architectures | Oliver Jakob Arndt, Daniel Becker, Christian Banz, Holger Blume | Modelling and Design Space Exploration | |
| Bordoloi, Unmesh D. | 2013 | General Purpose Computing on Low-Power Embedded GPUs: Has It Come of Age? | Arian Maghazeh, Unmesh D. Bordoloi, Petru Eles, Zebo Peng | GPU- and FFT-Architectures | |
| Bouganis, Christos-Savvas | 2013 | An Embedded Hardware-Efficient Architecture for Real-Time Cascade Support Vector Machine Classification | Christos Kyrkou, Theocharis Theocharides, Christos-Savvas Bouganis | Applications on Embedded Architectures | |
| Boutellier, Jani | 2013 | Introduction to the Special Session on: Exposed Data Path Architectures: Recent Advances and Applications | Jani Boutellier, Pekka Jääskeläinen | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Bozga, Marius | 2013 | Stochastic Modeling and Performance Analysis of Multimedia SoCs | Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty | SOCs and Array Processors | |
| Bradbury, Alex | 2013 | Exploiting Tightly-Coupled Cores | Daniel Bates, Alex Bradbury, Andreas Koltes, Robert Mullins | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Bue, Natascha | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Carro, Luigi | 2013 | A Just-In-Time Modulo Scheduling for Virtual Coarse-Grained Reconfigurable Architectures | Ricardo Ferreira, Vinicius Duarte, Waldir Meireles, Monica Pereira, Luigi Carro, Stephan Wong | Modelling, Mapping, and Scheduling | |
| Catania, Vincenzo | 2013 | NoC Links Energy Reduction through Link Voltage Scaling | Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania | Energy-Awareness and Low Power | |
| Chakraborty, Samarjit | 2013 | Stochastic Modeling and Performance Analysis of Multimedia SoCs | Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty | SOCs and Array Processors | |
| Choi, Minsu | 2013 | Workload-Dependent Relative Fault Sensitivity and Error Contribution Factor of GPU Onchip Memory Structures | Ronak Shah, Minsu Choi, Byunghyun Jang | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Ciobanu, Catalin | 2013 | Dataflow Computing with Polymorphic Registers | Catalin Ciobanu, Georgi N. Gaydadjiev, Christian Pilato, Donatella Sciuto | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Corporaal, Henk | 2013 | OpenCL Code Generation for Low Energy Wide SIMD Architectures with Explicit Datapath | Dongrui She, Yifan He, Luc Waeijen, Henk Corporaal | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Corporaal, Henk | 2013 | SIMD Made Explicit | Luc Waeijen, Dongrui She, Henk Corporaal, Yifan He | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Correvon, Marc | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Costenaro, Enrico | 2013 | Pulse-Length Determination Techniques in the Rectangular Single Event Transient Fault Model | Alireza Rohani, Hans G. Kerkhoff, Enrico Costenaro, Dan Alexandrescu | Fault-Modeling and Test | |
| Cristensen, Jan | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Cucchi, Manuele | 2013 | A Scalable FFT Processor Architecture for OFDM Based Communication Systems | Deepak Revanna, Omer Anjum, Manuele Cucchi, Roberto Airoldi, Jari Nurmi | GPU- and FFT-Architectures | |
| Dechev, Damian | 2013 | Concurrent Multi-level Arrays: Wait-free Extensible Hash Maps | Steven Feldman, Pierre LaBorde, Damian Dechev | SOCs and Array Processors | |
| Defour, David | 2013 | GPUburn: A System to Test and Mitigate GPU Hardware Failures | David Defour, Eric Petit | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Dennstedt, Daniel | 2013 | Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture | Holger Flatt, Jürgen Jasperneite, Daniel Dennstedt, Tran Dinh Hung | Applications on Embedded Architectures | |
| Desnos, Karol | 2013 | PiMM: Parameterized and Interfaced Dataflow Meta-Model for MPSoCs Runtime Reconfiguration | Karol Desnos, Maxime Pelcat, Jean-François Nezan, Shuvra S. Bhattacharyya, Slaheddine Aridhi | Modelling and Design Space Exploration | |
| di Francesco, Fabio | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Dimakopoulos, Vassilios V. | 2013 | Deploying OpenMP on an Embedded Multicore Accelerator | Spiros N. Agathos, Vassilios V. Dimakopoulos, Aggelos Mourelis, Alexandros Papadogiannakis | Modelling, Mapping, and Scheduling | |
| Duarte, Vinicius | 2013 | A Just-In-Time Modulo Scheduling for Virtual Coarse-Grained Reconfigurable Architectures | Ricardo Ferreira, Vinicius Duarte, Waldir Meireles, Monica Pereira, Luigi Carro, Stephan Wong | Modelling, Mapping, and Scheduling | |
| Dudnik, Gabriela | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Economakos, George | 2013 | A Process-Based Reconfigurable SystemC Module for Simulation Speedup | Efstathios Sotiriou-Xanthopoulos, Kostas Siozios, George Economakos, Dimitrios Soudris | SystemC and Simulation of Embedded Systems | |
| Eles, Petru | 2013 | General Purpose Computing on Low-Power Embedded GPUs: Has It Come of Age? | Arian Maghazeh, Unmesh D. Bordoloi, Petru Eles, Zebo Peng | GPU- and FFT-Architectures | |
| Evripidou, Paraskevas | 2013 | Verilog-based simulation of hardware support for Data-flow concurrency on Multicore systems | George Matheou, Paraskevas Evripidou | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Feldman, Steven | 2013 | Concurrent Multi-level Arrays: Wait-free Extensible Hash Maps | Steven Feldman, Pierre LaBorde, Damian Dechev | SOCs and Array Processors | |
| Fernández, Juan | 2013 | ECONO: Express Coherence Notifications for Efficient Cache Coherency in Many-Core CMPs | José L. Abellán, Alberto Ros, Juan Fernández, Manuel E. Acacio | Manycore Architectures | |
| Ferrandi, Fabrizio | 2013 | Modeling Pipelined Application with Synchronous Data Flow Graphs | Marco Lattuada, Fabrizio Ferrandi | Modelling and Design Space Exploration | |
| Ferreira, Ricardo | 2013 | A Just-In-Time Modulo Scheduling for Virtual Coarse-Grained Reconfigurable Architectures | Ricardo Ferreira, Vinicius Duarte, Waldir Meireles, Monica Pereira, Luigi Carro, Stephan Wong | Modelling, Mapping, and Scheduling | |
| Flatt, Holger | 2013 | Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture | Holger Flatt, Jürgen Jasperneite, Daniel Dennstedt, Tran Dinh Hung | Applications on Embedded Architectures | |
| Fu, Jian | 2013 | On-demand Thread-level Fault Detection in a Concurrent Programming Environment | Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Fu, Jian | 2013 | MGSim -- A Simulation Environment for Multi-Core Research and Education | Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Irfan Uddin, Chris R. Jesshope | SystemC and Simulation of Embedded Systems | |
| Gangadharan, Deepak | 2013 | Stochastic Modeling and Performance Analysis of Multimedia SoCs | Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty | SOCs and Array Processors | |
| Gao, Yanyan | 2013 | An Effective Model Extraction Method with State Space Compression for Model Checking SystemC TLM Designs | Yanyan Gao, Xi Li | SystemC and Simulation of Embedded Systems | |
| Gaydadjiev, Georgi N. | 2013 | Compiler-Aided Methodology for Low Overhead On-line Testing | Ghazaleh Nazarian, Robert M. Seepers, Christos Strydis, Georgi N. Gaydadjiev | Fault-Modeling and Test | |
| Gaydadjiev, Georgi N. | 2013 | Dataflow Computing with Polymorphic Registers | Catalin Ciobanu, Georgi N. Gaydadjiev, Christian Pilato, Donatella Sciuto | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Gazzara, Giuseppe | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Gelado, Isaac | 2013 | Parallelizing General Histogram Application for CUDA Architectures | Ugljesa Milic, Isaac Gelado, Nikola Puzovic, Alex Ramirez, Milo Tomasevic | GPU- and FFT-Architectures | |
| Ghazi, Amanullah | 2013 | Design of a Unified Transport Triggered Processor for LDPC/Turbo Decoder | Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu, Markku Juntti, Amanullah Ghazi, Olli Silvén | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Gould, Miles | 2013 | High Speed Cycle Approximate Simulation for Cache-Incoherent MPSoCs | Christopher Thompson, Miles Gould, Nigel Topham | SystemC and Simulation of Embedded Systems | |
| Guevorkian, David | 2013 | Low-Power Application-Specific FFT Processor for LTE Applications | Tomasz Patyk, David Guevorkian, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala | GPU- and FFT-Architectures | |
| Gupta, Anshuman | 2013 | TimeCube: A Manycore Embedded Processor with Interference-Agnostic Progress Tracking | Anshuman Gupta, Jack Sampson, Michael Bedford Taylor | Manycore Architectures | |
| Harbin, James | 2013 | Fast Transaction-Level Dynamic Power Consumption Modelling in Priority Preemptive Wormhole Switching Networks On Chip | James Harbin, Leandro Soares Indrusiak | Modelling, Mapping, and Scheduling | |
| Haubelt, Christian | 2013 | Dynamic Task Mapping onto Multi-Core Architectures through Stream Rewriting | Lars Middendorf, Christian Zebelein, Christian Haubelt | Modelling, Mapping, and Scheduling | |
| He, Yifan | 2013 | OpenCL Code Generation for Low Energy Wide SIMD Architectures with Explicit Datapath | Dongrui She, Yifan He, Luc Waeijen, Henk Corporaal | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| He, Yifan | 2013 | SIMD Made Explicit | Luc Waeijen, Dongrui She, Henk Corporaal, Yifan He | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Hemani, Ahmed | 2013 | Energy-Aware-Task-Parallelism for Efficient Dynamic Voltage, and Frequency Scaling, in CGRAs | Syed. M. A. H. Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen | Energy-Awareness and Low Power | |
| Hung, Tran Dinh | 2013 | Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture | Holger Flatt, Jürgen Jasperneite, Daniel Dennstedt, Tran Dinh Hung | Applications on Embedded Architectures | |
| Jääskeläinen, Pekka | 2013 | Low-Power Application-Specific FFT Processor for LTE Applications | Tomasz Patyk, David Guevorkian, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala | GPU- and FFT-Architectures | |
| Jääskeläinen, Pekka | 2013 | Introduction to the Special Session on: Exposed Data Path Architectures: Recent Advances and Applications | Jani Boutellier, Pekka Jääskeläinen | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Jafri, Syed M. A. H. | 2013 | Energy-Aware-Task-Parallelism for Efficient Dynamic Voltage, and Frequency Scaling, in CGRAs | Syed. M. A. H. Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen | Energy-Awareness and Low Power | |
| Jang, Byunghyun | 2013 | Workload-Dependent Relative Fault Sensitivity and Error Contribution Factor of GPU Onchip Memory Structures | Ronak Shah, Minsu Choi, Byunghyun Jang | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Janhunen, Janne | 2013 | Design of a Unified Transport Triggered Processor for LDPC/Turbo Decoder | Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu, Markku Juntti, Amanullah Ghazi, Olli Silvén | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Jasperneite, Jürgen | 2013 | Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture | Holger Flatt, Jürgen Jasperneite, Daniel Dennstedt, Tran Dinh Hung | Applications on Embedded Architectures | |
| Jesshope, Chris R. | 2013 | MGSim -- A Simulation Environment for Multi-Core Research and Education | Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Irfan Uddin, Chris R. Jesshope | SystemC and Simulation of Embedded Systems | |
| Jesshope, Chris R. | 2013 | On-demand Thread-level Fault Detection in a Concurrent Programming Environment | Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Juntti, Markku | 2013 | Design of a Unified Transport Triggered Processor for LDPC/Turbo Decoder | Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu, Markku Juntti, Amanullah Ghazi, Olli Silvén | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Kerkhoff, Hans G. | 2013 | Pulse-Length Determination Techniques in the Rectangular Single Event Transient Fault Model | Alireza Rohani, Hans G. Kerkhoff, Enrico Costenaro, Dan Alexandrescu | Fault-Modeling and Test | |
| Koltes, Andreas | 2013 | Exploiting Tightly-Coupled Cores | Daniel Bates, Alex Bradbury, Andreas Koltes, Robert Mullins | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Kracht, Matthew | 2013 | Abstraction of Polychronous Dataflow Specifications into Mode-Automata | Julien Ouy, Matthew Kracht, Sandeep K. Shukla | Modelling and Design Space Exploration | |
| Kyrkou, Christos | 2013 | An Embedded Hardware-Efficient Architecture for Real-Time Cascade Support Vector Machine Classification | Christos Kyrkou, Theocharis Theocharides, Christos-Savvas Bouganis | Applications on Embedded Architectures | |
| LaBorde, Pierre | 2013 | Concurrent Multi-level Arrays: Wait-free Extensible Hash Maps | Steven Feldman, Pierre LaBorde, Damian Dechev | SOCs and Array Processors | |
| Lankamp, Mike | 2013 | MGSim -- A Simulation Environment for Multi-Core Research and Education | Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Irfan Uddin, Chris R. Jesshope | SystemC and Simulation of Embedded Systems | |
| Larsson-Edefors, Per | 2013 | FlexCore: Implementing an Exposed Datapath Processor | Magnus Själander, Per Larsson-Edefors | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Lattuada, Marco | 2013 | Modeling Pipelined Application with Synchronous Data Flow Graphs | Marco Lattuada, Fabrizio Ferrandi | Modelling and Design Space Exploration | |
| Laurenza, Massimo | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Legay, Axel | 2013 | Stochastic Modeling and Performance Analysis of Multimedia SoCs | Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty | SOCs and Array Processors | |
| Li, Xi | 2013 | An Effective Model Extraction Method with State Space Compression for Model Checking SystemC TLM Designs | Yanyan Gao, Xi Li | SystemC and Simulation of Embedded Systems | |
| Lymperopoulos, Leonidas | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Maghazeh, Arian | 2013 | General Purpose Computing on Low-Power Embedded GPUs: Has It Come of Age? | Arian Maghazeh, Unmesh D. Bordoloi, Petru Eles, Zebo Peng | GPU- and FFT-Architectures | |
| Maheshwari, Mayur | 2013 | Stochastic Modeling and Performance Analysis of Multimedia SoCs | Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty | SOCs and Array Processors | |
| Marcoux, Pierre | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Matheou, George | 2013 | Verilog-based simulation of hardware support for Data-flow concurrency on Multicore systems | George Matheou, Paraskevas Evripidou | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Meireles, Waldir | 2013 | A Just-In-Time Modulo Scheduling for Virtual Coarse-Grained Reconfigurable Architectures | Ricardo Ferreira, Vinicius Duarte, Waldir Meireles, Monica Pereira, Luigi Carro, Stephan Wong | Modelling, Mapping, and Scheduling | |
| Middendorf, Lars | 2013 | Dynamic Task Mapping onto Multi-Core Architectures through Stream Rewriting | Lars Middendorf, Christian Zebelein, Christian Haubelt | Modelling, Mapping, and Scheduling | |
| Milic, Ugljesa | 2013 | Parallelizing General Histogram Application for CUDA Architectures | Ugljesa Milic, Isaac Gelado, Nikola Puzovic, Alex Ramirez, Milo Tomasevic | GPU- and FFT-Architectures | |
| Mineo, Andrea | 2013 | NoC Links Energy Reduction through Link Voltage Scaling | Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania | Energy-Awareness and Low Power | |
| Mourelis, Aggelos | 2013 | Deploying OpenMP on an Embedded Multicore Accelerator | Spiros N. Agathos, Vassilios V. Dimakopoulos, Aggelos Mourelis, Alexandros Papadogiannakis | Modelling, Mapping, and Scheduling | |
| Muller, Marie | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Mullins, Robert | 2013 | Exploiting Tightly-Coupled Cores | Daniel Bates, Alex Bradbury, Andreas Koltes, Robert Mullins | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Navarro, Thierry | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Nazarian, Ghazaleh | 2013 | Compiler-Aided Methodology for Low Overhead On-line Testing | Ghazaleh Nazarian, Robert M. Seepers, Christos Strydis, Georgi N. Gaydadjiev | Fault-Modeling and Test | |
| Nezan, Jean-François | 2013 | PiMM: Parameterized and Interfaced Dataflow Meta-Model for MPSoCs Runtime Reconfiguration | Karol Desnos, Maxime Pelcat, Jean-François Nezan, Shuvra S. Bhattacharyya, Slaheddine Aridhi | Modelling and Design Space Exploration | |
| Nouri, Ayoub | 2013 | Stochastic Modeling and Performance Analysis of Multimedia SoCs | Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty | SOCs and Array Processors | |
| Nurmi, Jari | 2013 | A Scalable FFT Processor Architecture for OFDM Based Communication Systems | Deepak Revanna, Omer Anjum, Manuele Cucchi, Roberto Airoldi, Jari Nurmi | GPU- and FFT-Architectures | |
| Ouy, Julien | 2013 | Abstraction of Polychronous Dataflow Specifications into Mode-Automata | Julien Ouy, Matthew Kracht, Sandeep K. Shukla | Modelling and Design Space Exploration | |
| Paggi, Battistino | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Palesi, Maurizio | 2013 | NoC Links Energy Reduction through Link Voltage Scaling | Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania | Energy-Awareness and Low Power | |
| Papadogiannakis, Alexandros | 2013 | Deploying OpenMP on an Embedded Multicore Accelerator | Spiros N. Agathos, Vassilios V. Dimakopoulos, Aggelos Mourelis, Alexandros Papadogiannakis | Modelling, Mapping, and Scheduling | |
| Patyk, Tomasz | 2013 | Low-Power Application-Specific FFT Processor for LTE Applications | Tomasz Patyk, David Guevorkian, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala | GPU- and FFT-Architectures | |
| Paul, Kolin | 2013 | Energy-Aware-Task-Parallelism for Efficient Dynamic Voltage, and Frequency Scaling, in CGRAs | Syed. M. A. H. Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen | Energy-Awareness and Low Power | |
| Pelcat, Maxime | 2013 | PiMM: Parameterized and Interfaced Dataflow Meta-Model for MPSoCs Runtime Reconfiguration | Karol Desnos, Maxime Pelcat, Jean-François Nezan, Shuvra S. Bhattacharyya, Slaheddine Aridhi | Modelling and Design Space Exploration | |
| Pellegrini, Andrea | 2013 | Cobra: a Comprehensive Bundle-based Reliable Architecture | Andrea Pellegrini, Valeria Bertacco | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Peng, Zebo | 2013 | General Purpose Computing on Low-Power Embedded GPUs: Has It Come of Age? | Arian Maghazeh, Unmesh D. Bordoloi, Petru Eles, Zebo Peng | GPU- and FFT-Architectures | |
| Pereira, Monica | 2013 | A Just-In-Time Modulo Scheduling for Virtual Coarse-Grained Reconfigurable Architectures | Ricardo Ferreira, Vinicius Duarte, Waldir Meireles, Monica Pereira, Luigi Carro, Stephan Wong | Modelling, Mapping, and Scheduling | |
| Petit, Eric | 2013 | GPUburn: A System to Test and Mitigate GPU Hardware Failures | David Defour, Eric Petit | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Pham, Pascale | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Pilato, Christian | 2013 | Dataflow Computing with Polymorphic Registers | Catalin Ciobanu, Georgi N. Gaydadjiev, Christian Pilato, Donatella Sciuto | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Pitkänen, Teemu | 2013 | Low-Power Application-Specific FFT Processor for LTE Applications | Tomasz Patyk, David Guevorkian, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala | GPU- and FFT-Architectures | |
| Plosila, Juha | 2013 | Energy-Aware-Task-Parallelism for Efficient Dynamic Voltage, and Frequency Scaling, in CGRAs | Syed. M. A. H. Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen | Energy-Awareness and Low Power | |
| Pnevmatikatos, Dionisios | 2013 | Efficient Runtime Support for Embedded MPSoCs | Dimitris Theodoropoulos, Polyvios Pratikakis, Dionisios Pnevmatikatos | SOCs and Array Processors | |
| Poss, Raphael | 2013 | MGSim -- A Simulation Environment for Multi-Core Research and Education | Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Irfan Uddin, Chris R. Jesshope | SystemC and Simulation of Embedded Systems | |
| Poss, Raphael | 2013 | On-demand Thread-level Fault Detection in a Concurrent Programming Environment | Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Pratikakis, Polyvios | 2013 | Efficient Runtime Support for Embedded MPSoCs | Dimitris Theodoropoulos, Polyvios Pratikakis, Dionisios Pnevmatikatos | SOCs and Array Processors | |
| Puzovic, Nikola | 2013 | Parallelizing General Histogram Application for CUDA Architectures | Ugljesa Milic, Isaac Gelado, Nikola Puzovic, Alex Ramirez, Milo Tomasevic | GPU- and FFT-Architectures | |
| Raman, Balaji | 2013 | Stochastic Modeling and Performance Analysis of Multimedia SoCs | Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty | SOCs and Array Processors | |
| Ramirez, Alex | 2013 | Parallelizing General Histogram Application for CUDA Architectures | Ugljesa Milic, Isaac Gelado, Nikola Puzovic, Alex Ramirez, Milo Tomasevic | GPU- and FFT-Architectures | |
| Raptopoulos, Andreas | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Revanna, Deepak | 2013 | A Scalable FFT Processor Architecture for OFDM Based Communication Systems | Deepak Revanna, Omer Anjum, Manuele Cucchi, Roberto Airoldi, Jari Nurmi | GPU- and FFT-Architectures | |
| Rintaluoma, Tero | 2013 | Lightweight Resource Estimation Model to Extend Battery Life in Video Playback | Tero Rintaluoma, Olli Silvén | Energy-Awareness and Low Power | |
| Rohani, Alireza | 2013 | Pulse-Length Determination Techniques in the Rectangular Single Event Transient Fault Model | Alireza Rohani, Hans G. Kerkhoff, Enrico Costenaro, Dan Alexandrescu | Fault-Modeling and Test | |
| Romanelli, Marco | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Ros, Alberto | 2013 | ECONO: Express Coherence Notifications for Efficient Cache Coherency in Many-Core CMPs | José L. Abellán, Alberto Ros, Juan Fernández, Manuel E. Acacio | Manycore Architectures | |
| Salvo, Pietro | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Sampson, Jack | 2013 | TimeCube: A Manycore Embedded Processor with Interference-Agnostic Progress Tracking | Anshuman Gupta, Jack Sampson, Michael Bedford Taylor | Manycore Architectures | |
| Saxby, Carl | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Sciuto, Donatella | 2013 | Dataflow Computing with Polymorphic Registers | Catalin Ciobanu, Georgi N. Gaydadjiev, Christian Pilato, Donatella Sciuto | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Seepers, Robert M. | 2013 | Compiler-Aided Methodology for Low Overhead On-line Testing | Ghazaleh Nazarian, Robert M. Seepers, Christos Strydis, Georgi N. Gaydadjiev | Fault-Modeling and Test | |
| Shah, Ronak | 2013 | Workload-Dependent Relative Fault Sensitivity and Error Contribution Factor of GPU Onchip Memory Structures | Ronak Shah, Minsu Choi, Byunghyun Jang | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Shahabuddin, Shahriar | 2013 | Design of a Unified Transport Triggered Processor for LDPC/Turbo Decoder | Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu, Markku Juntti, Amanullah Ghazi, Olli Silvén | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| She, Dongrui | 2013 | OpenCL Code Generation for Low Energy Wide SIMD Architectures with Explicit Datapath | Dongrui She, Yifan He, Luc Waeijen, Henk Corporaal | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| She, Dongrui | 2013 | SIMD Made Explicit | Luc Waeijen, Dongrui She, Henk Corporaal, Yifan He | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Shukla, Sandeep K. | 2013 | Abstraction of Polychronous Dataflow Specifications into Mode-Automata | Julien Ouy, Matthew Kracht, Sandeep K. Shukla | Modelling and Design Space Exploration | |
| Silvén, Olli | 2013 | Lightweight Resource Estimation Model to Extend Battery Life in Video Playback | Tero Rintaluoma, Olli Silvén | Energy-Awareness and Low Power | |
| Silvén, Olli | 2013 | Design of a Unified Transport Triggered Processor for LDPC/Turbo Decoder | Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu, Markku Juntti, Amanullah Ghazi, Olli Silvén | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Siozios, Kostas | 2013 | A Process-Based Reconfigurable SystemC Module for Simulation Speedup | Efstathios Sotiriou-Xanthopoulos, Kostas Siozios, George Economakos, Dimitrios Soudris | SystemC and Simulation of Embedded Systems | |
| Själander, Magnus | 2013 | FlexCore: Implementing an Exposed Datapath Processor | Magnus Själander, Per Larsson-Edefors | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Soares Indrusiak, Leandro | 2013 | Fast Transaction-Level Dynamic Power Consumption Modelling in Priority Preemptive Wormhole Switching Networks On Chip | James Harbin, Leandro Soares Indrusiak | Modelling, Mapping, and Scheduling | |
| Sotiriou-Xanthopoulos, Efstathios | 2013 | A Process-Based Reconfigurable SystemC Module for Simulation Speedup | Efstathios Sotiriou-Xanthopoulos, Kostas Siozios, George Economakos, Dimitrios Soudris | SystemC and Simulation of Embedded Systems | |
| Soudris, Dimitrios | 2013 | A Process-Based Reconfigurable SystemC Module for Simulation Speedup | Efstathios Sotiriou-Xanthopoulos, Kostas Siozios, George Economakos, Dimitrios Soudris | SystemC and Simulation of Embedded Systems | |
| Soudris, Dimitrios | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Sourdis, Ioannis | 2013 | Introduction to the Special Session on: Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | Ioannis Sourdis | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Sourdis, Ioannis | 2013 | on-Demand System Reliability: The DeSyRe project | Ioannis Sourdis | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Spasic, Jelena | 2013 | An Accurate Energy Model for Streaming Applications Mapped on MPSoC Platforms | Jelena Spasic, Todor Stefanov | Modelling, Mapping, and Scheduling | |
| Stefanov, Todor | 2013 | An Accurate Energy Model for Streaming Applications Mapped on MPSoC Platforms | Jelena Spasic, Todor Stefanov | Modelling, Mapping, and Scheduling | |
| Strydis, Christos | 2013 | Compiler-Aided Methodology for Low Overhead On-line Testing | Ghazaleh Nazarian, Robert M. Seepers, Christos Strydis, Georgi N. Gaydadjiev | Fault-Modeling and Test | |
| Tajammul, Muhammad Adeel | 2013 | Energy-Aware-Task-Parallelism for Efficient Dynamic Voltage, and Frequency Scaling, in CGRAs | Syed. M. A. H. Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen | Energy-Awareness and Low Power | |
| Takala, Jarmo | 2013 | Low-Power Application-Specific FFT Processor for LTE Applications | Tomasz Patyk, David Guevorkian, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala | GPU- and FFT-Architectures | |
| Tenhunen, Hannu | 2013 | Energy-Aware-Task-Parallelism for Efficient Dynamic Voltage, and Frequency Scaling, in CGRAs | Syed. M. A. H. Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen | Energy-Awareness and Low Power | |
| Texier, Isabelle | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Theocharides, Theocharis | 2013 | An Embedded Hardware-Efficient Architecture for Real-Time Cascade Support Vector Machine Classification | Christos Kyrkou, Theocharis Theocharides, Christos-Savvas Bouganis | Applications on Embedded Architectures | |
| Theodoropoulos, Dimitris | 2013 | Efficient Runtime Support for Embedded MPSoCs | Dimitris Theodoropoulos, Polyvios Pratikakis, Dionisios Pnevmatikatos | SOCs and Array Processors | |
| Thompson, Christopher | 2013 | High Speed Cycle Approximate Simulation for Cache-Incoherent MPSoCs | Christopher Thompson, Miles Gould, Nigel Topham | SystemC and Simulation of Embedded Systems | |
| Tomasevic, Milo | 2013 | Parallelizing General Histogram Application for CUDA Architectures | Ugljesa Milic, Isaac Gelado, Nikola Puzovic, Alex Ramirez, Milo Tomasevic | GPU- and FFT-Architectures | |
| Topham, Nigel | 2013 | High Speed Cycle Approximate Simulation for Cache-Incoherent MPSoCs | Christopher Thompson, Miles Gould, Nigel Topham | SystemC and Simulation of Embedded Systems | |
| Uddin, Irfan | 2013 | MGSim -- A Simulation Environment for Multi-Core Research and Education | Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Irfan Uddin, Chris R. Jesshope | SystemC and Simulation of Embedded Systems | |
| Voirin, Guy | 2013 | SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy | Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos | Applications on Embedded Architectures | |
| Waeijen, Luc | 2013 | SIMD Made Explicit | Luc Waeijen, Dongrui She, Henk Corporaal, Yifan He | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Waeijen, Luc | 2013 | OpenCL Code Generation for Low Energy Wide SIMD Architectures with Explicit Datapath | Dongrui She, Yifan He, Luc Waeijen, Henk Corporaal | Special Session on Exposed Data Path Architectures: Recent Advances and Applications | |
| Wong, Stephan | 2013 | A Just-In-Time Modulo Scheduling for Virtual Coarse-Grained Reconfigurable Architectures | Ricardo Ferreira, Vinicius Duarte, Waldir Meireles, Monica Pereira, Luigi Carro, Stephan Wong | Modelling, Mapping, and Scheduling | |
| Yang, Qiang | 2013 | MGSim -- A Simulation Environment for Multi-Core Research and Education | Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Irfan Uddin, Chris R. Jesshope | SystemC and Simulation of Embedded Systems | |
| Yang, Qiang | 2013 | On-demand Thread-level Fault Detection in a Concurrent Programming Environment | Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Zebelein, Christian | 2013 | Dynamic Task Mapping onto Multi-Core Architectures through Stream Rewriting | Lars Middendorf, Christian Zebelein, Christian Haubelt | Modelling, Mapping, and Scheduling | |
| Zhang, Chunyuan | 2013 | On-demand Thread-level Fault Detection in a Concurrent Programming Environment | Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang | Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors | |
| Hwu, Wen-mei W. | 2013 | Rethinking Computer Architecture for Throughput Computing | Hwu, Wen-mei W. | SAMOS XIII - Keynote | 2013-IC-K1 |
| Seznec, André | 2013 | Faster unicores are still needed | André Seznec | SAMOS XIII - Keynote | 2013-IC-K3 |
| Vadja, András | 2013 | What cloud computing can teach us about embedded many-core programming? | András Vadja | SAMOS XIII - Keynote | 2013-IC-K2 |
| Accelerators | Cyber-Physical | Hardware | Opportunities | Special |
| Adaptive | Data | Heterogeneous | Optimization | Synchronization |
| Analysis | Dataflow | Implementation | Paradigms | Synthesis |
| Application | Defined | Instruction | Parallel | System |
| Architecture | Dependable | Interconnects | Path | Techniques |
| Array | Design | Keynote | Platforms | Technology |
| Beachnote | Design | Low-Power | Power | Test |
| Caches | Domain-Specific | Manycore | Processing | Tools |
| Cell | Embedded | Mapping | Processor | Video |
| Challenges | Emulation | Mastering | Profiling | VLSI |
| Chip | Energy | Memory | Programming | Wireless |
| Cognitive | ESL | Methods | Radio | |
| Communication | Evaluation | Micro-Architecture | Reconfigurable | |
| Compiler | Exploration | Modelling | Scheduling | |
| Components | Fault-Modeling | Models | SDR | |
| Computer | Fault-Tolerant | Multi-Core | Sensor | |
| Computing | FFT-Architectures | Multi-processor | Session | |
| Cores | FPGA-based | Multimedia | Simultation | |
| Cryptography | Frontiers | Multiprocessor | SoC | |
| Customization | Future | Network | Software |