SAMOS 2001
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Table of Contents SAMOS Conference 2013

Hartwig Jeschke and Olli Silvén Eds.

IEEE Catalog Number: CFP1352A-USB
ISBN: 978-1-4799-0102-9

DOI: 10.1109/SAMOS.2013.6621090--10.1109/SAMOS.2013.6621143

Front matter Author Index Search

Springer

 

Keynotes

 

 

 

Rethinking Computer Architecture for Throughput Computing
PAGES

i

2013-IC-K1

Wen-mei W. Hwu
 
What cloud computing can teach us about embedded many-core programming?
PAGES

ii

2013-IC-K2

András Vajda
 
Faster Unicores are Still Needed
PAGES

iii

2013-IC-K3

André Seznec
 

GPU- and FFT-Architectures

 

 

 

 
General Purpose Computing on Low-Power Embedded GPUs: Has It Come of Age?
PAGES
1 -- 10
 
Arian Maghazeh, Unmesh D. Bordoloi, Petru Eles, and Zebo Peng
 
 
Parallelizing General Histogram Application for CUDA Architectures
PAGES
11 -- 18
 
Ugljesa Milic, Isaac Gelado, Nikola Puzovic, Alex Ramirez, and Milo Tomasevic
 
A Scalable FFT Processor Architecture for OFDM Based Communication Systems
PAGES
19 -- 27
 
Deepak Revanna, Omer Anjum, Manuele Cucchi, Roberto Airoldi, and Jari Nurmi
 
Low-Power Application-Specific FFT Processor for LTE Applications
PAGES
28 -- 32
 
Tomasz Patyk, David Guevorkian, Teemu Pitkänen, Pekka Jääskeläinen, and Jarmo Takala
 
 

Modelling and Design Space Exploration

 

 

 

Abstraction of Polychronous Dataflow Specifications into Mode-Automata
PAGES
33 -- 40
 
Julien Ouy, Matthew Kracht, and Sandeep K. Shukla 
 
PiMM: Parameterized and Interfaced Dataflow Meta-Model for MPSoCs Runtime Reconfiguration
PAGES
41 -- 48
 
Karol Desnos, Maxime Pelcat, Jean-François Nezan, Shuvra S. Bhattacharyya, and Slaheddine Aridhi
 
Modeling Pipelined Application with Synchronous Data Flow Graphs
PAGES
49 -- 55
 
Marco Lattuada and Fabrizio Ferrandi
 
Parallel Implementation of Real-Time Semi-Global Matching on Embedded Multi-Core Architectures
PAGES
56 -- 63
 
Oliver Jakob Arndt, Daniel Becker, Christian Banz, and Holger Blume
 
 

SystemC and Simulation of Embedded Systems

 

 

 
An Effective Model Extraction Method with State Space Compression for Model Checking SystemC TLM Designs
PAGES
64 -- 71
 
Yanyan Gao and Xi Li
 
A Process-Based Reconfigurable SystemC Module for Simulation Speedup
PAGES
72 -- 79
 
Efstathios Sotiriou-Xanthopoulos, Kostas Siozios, George Economakos, and Dimitrios Soudris
 
MGSim -- A Simulation Environment for Multi-Core Research and Education
PAGES
80 -- 87
 
Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Irfan Uddin, and Chris R. Jesshope 
 
High Speed Cycle Approximate Simulation for Cache-Incoherent MPSoCs
PAGES
88 -- 95
 
Christopher Thompson, Miles Gould, and Nigel Topham 
 
 

Energy-Awareness and Low Power

 

 

 
Lightweight Resource Estimation Model to Extend Battery Life in Video Playback
PAGES
96 -- 103
 
Tero  Rintaluoma and Olli  Silvén
 
Energy-Aware-Task-Parallelism for Efficient Dynamic Voltage, and Frequency Scaling, in CGRAs
PAGES
104 -- 112
 
Syed. M. A. H. Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, and Hannu Tenhunen 
 
NoC Links Energy Reduction through Link Voltage Scaling
PAGES
113 -- 120
 
Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, and Vincenzo Catania
 

Applications on Embedded Architectures

 

 

 
 
Mapping of PRP/HSR Redundancy Protocols onto a Configurable FPGA/CPU Based Architecture
PAGES
121 -- 128
 
Holger Flatt, Jürgen Jasperneite, Daniel Dennstedt, and Tran Dinh Hung
 
An Embedded Hardware-Efficient Architecture for Real-Time Cascade Support Vector Machine Classification
PAGES
129 -- 136
 
Christos Kyrkou, Theocharis Theocharides, and Christos-Savvas Bouganis
 
SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy
PAGES
137 -- 144
 
Isabelle Texier, Pierre Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alex Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, and Leonidas Lymperopoulos
 

SoCs and Array Processors

 

 

 
 
Stochastic Modeling and Performance Analysis of Multimedia SoCs
PAGES
145 -- 154
 
Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, and Samarjit Chakraborty
 
Concurrent Multi-level Arrays: Wait-free Extensible Hash Maps
PAGES
155 -- 163
 
Steven Feldman, Pierre LaBorde, and Damian Dechev 
 
Efficient Runtime Support for Embedded MPSoCs
PAGES
164 -- 171
 
Dimitris Theodoropoulos, Polyvios Pratikakis, and Dionisios Pnevmatikatos 
 

Modelling, Mapping, and Scheduling

 

 

 
 
 
Fast Transaction-Level Dynamic Power Consumption Modelling in Priority Preemptive Wormhole Switching Networks On Chip
PAGES
172 -- 179
 
James Harbin and Leandro Soares Indrusiak
 
Deploying OpenMP on an Embedded Multicore Accelerator
PAGES
180 -- 187
 
Spiros N. Agathos, Vassilios V. Dimakopoulos, Aggelos Mourelis, and Alexandros Papadogiannakis
 
A Just-In-Time Modulo Scheduling for Virtual Coarse-Grained Reconfigurable Architectures
PAGES
188 -- 195
 
Ricardo Ferreira, Vinicius Duarte, Waldir Meireles, Monica Pereira, Luigi Carro, and Stephan Wong 
 
Dynamic Task Mapping onto Multi-Core Architectures through Stream Rewriting
PAGES
196 -- 204
 
Lars Middendorf, Christian Zebelein, and Christian Haubelt 
 
An Accurate Energy Model for Streaming Applications Mapped on MPSoC Platforms
PAGES
205 -- 212
 
Jelena Spasic and Todor Stefanov
 

Fault-Modeling and Test

 

 

 
 
Pulse-Length Determination Techniques in the Rectangular Single Event Transient Fault Model
PAGES
213 -- 218
 
Alireza Rohani, Hans G. Kerkhoff, Enrico Costenaro, and Dan Alexandrescu
 
Compiler-Aided Methodology for Low Overhead On-line Testing
PAGES
219 -- 226
 
Ghazaleh Nazarian, Robert M. Seepers, Christos Strydis, and Georgi N. Gaydadjiev
 
 

Manycore Architectures

 

 

 
 
 
TimeCube: A Manycore Embedded Processor with Interference-Agnostic Progress Tracking
PAGES
227 -- 236
 
Anshuman Gupta, Jack Sampson, and Michael Bedford Taylor 
 
ECONO: Express Coherence Notifications for Efficient Cache Coherency in Many-Core CMPs
PAGES
237 -- 244
 
José L. Abellán, Alberto Ros, Juan Fernández, and Manuel E. Acacio
 

Special Session on Fault-Tolerant Techniques for Computer Systems, Architectures and Processors

 

 

 

 
Introduction to the Special Session on: Fault-Tolerant Techniques for Computer Systems, Architectures and Processors
PAGES
245 -- 245
Ioannis Sourdis
on-Demand System Reliability: The DeSyRe project
PAGES
246 -- 246
 
Ioannis Sourdis
 
Cobra: a Comprehensive Bundle-based Reliable Architecture
PAGES
247 -- 254
 
Andrea Pellegrini and Valeria Bertacco
 
On-demand Thread-level Fault Detection in a Concurrent Programming Environment
PAGES
255 -- 262
 
Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, and Chunyuan Zhang
 
GPUburn: A System to Test and Mitigate GPU Hardware Failures
PAGES
263 -- 270
 
David Defour and Eric Petit
 
Workload-Dependent Relative Fault Sensitivity and Error Contribution Factor of GPU Onchip Memory Structures
PAGES
271 -- 278
 
Ronak Shah, Minsu Choi, and Byunghyun Jang 
 

Special Session on Exposed Data Path Architectures: Recent Advances and Applications

 

 

 

 
Introduction to the Special Session on: Exposed Data Path Architectures: Recent Advances and Applications
PAGES
279 -- 279
Jani Boutellier and Pekka Jääskeläinen
Verilog-based simulation of hardware support for Data-flow concurrency on Multicore systems
PAGES
280 -- 287
 
George Matheou and Paraskevas Evripidou
 
Design of a Unified Transport Triggered Processor for LDPC/Turbo Decoder
PAGES
288 -- 295
 
Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu, Markku Juntti, Amanullah Ghazi, and Olli  Silvén
 
Exploiting Tightly-Coupled Cores
PAGES
296 -- 305
 
Daniel Bates, Alex Bradbury, Andreas Koltes, and Robert Mullins
 
FlexCore: Implementing an Exposed Datapath Processor
PAGES
306 -- 313
 
Magnus Själander and Per Larsson-Edefors
 
Dataflow Computing with Polymorphic Registers
PAGES
314 -- 321
 
Catalin Ciobanu, Georgi N. Gaydadjiev, Christian Pilato, and Donatella Sciuto
 
OpenCL Code Generation for Low Energy Wide SIMD Architectures with Explicit Datapath
PAGES
322 -- 329
 
Dongrui She, Yifan He, Luc Waeijen, and Henk Corporaal
 
SIMD Made Explicit
PAGES
330 -- 337
 
Luc Waeijen, Dongrui She, Henk Corporaal, and Yifan He