SAMOS 2001
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Table of Contents SAMOS Conference 2006

Georgi Gaydadjiev, John Glossner, Jarmo Takala and Stamatis Vassiliadis Eds.

IEEE Catalog Number: 06EX1297
ISBN: 1-4244-0155-0
Library of Congress: 2006920528

DOI: 10.1109/ICSAMOS.2006.300796--10.1109/ICSAMOS.2006.300827

Front matter Author Index Search

Springer

 

Embedded Processors and Architectures

 

 

 

Parallel Memory Implementation for Arbitrary Stride Accesses

PAGES

1--6

 

Eero Aho, Jarno Vanne, Timo D. Hämäläinen

A Table-Based Application-Specific Prefetch Engine for Object-Oriented Embedded Systems

PAGES

7--13

 

Shaahin Hessabi, M. Modarressi, Maziar Goudarzi, H. Javanhemmat

On the Characterization of Data Cache Vulnerability in High-Performance Embedded Microprocessors

PAGES

14--20

 

Shuai Wang, Jie Hu, Sotirios G. Ziavras

On the Evaluation of Dense Chip-Multiprocessor Architectures

PAGES

21--27

 

Francisco J. Villa, Manuel E. Acacio, Jose M. Garcia

Energy Aware Processors

 

 

 

Reduction of Energy Consumption in Processors by Early Detection and Bypassing of Trivial Operations

PAGES

28--34

 

Md. Mafijul Islam, Per Stenstrom

Modified Hotspot Cache Architecture: A Low Energy Fast Cache for Embedded Processors

PAGES

35--42

 

K. Ali, M. Aboelaze, S. Datta

Static Energy Saving Through Multi-Bank Memory Architecture

PAGES

43--49

 

Sebastien Lafond, Johan Lilius

Area-Aware Optimizations for Resource Constrained Branch Predictors Exploited in Embedded Processors

PAGES

50--55

 

Babak Salamat, Amirali Baniasadi, Kaveh Jokar Deris

Design Space Exploration (1)

 

 

 

Chip Size Estimation for SOC Design Space Exploration

PAGES

56--62

 

Hartwig Jeschke

Profiling Driven Scenario Detection and Prediction for Multimedia Applications

PAGES

63--70

 

Stefan Valentin Gheorghita, Twan Basten, Henk Corporaal

On the Calibration of Abstract Performance Models for System-level Design Space Exploration

PAGES

71--77

 

Andy D. Pimentel, Mark Thompson, Simon Polstra, Cagkan Erbas

Pareto-Based Application Specification for MP-SoC Customized Run-Time Management

PAGES

78--84

 

Ch. Ykman-Couvreur, V. Nollet, Théodore Marescaux, Erik Brockmeyer, Francky Catthoor, Henk Corporaal 

Design Space Exploration (2)

 

 

 

Performance Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path

PAGES

85--92

 

Michalis D. Galanis, G. Dimitroulakos, Costas E. Goutis

Multi-Objective Topology Optimization for Networked Embedded Systems

PAGES

93--98

 

Thilo Streichert, Christian Haubelt, Jürgen Teich

Parameterized Mapping of Algorithms onto Processor Arrays with Sub-Word Parallelism

PAGES

99--106

 

R. Schaffer, R. Merker

Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA

PAGES

107--114

 

Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco Domenico Santambrogio, Donatella Sciuto, Antonino Tumeo 

High Level System Design and Simulation

 

 

 

An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design

PAGES

115--122

 

Giuseppe Ascia, Vincenzo Catania, Alessandro G. di Nuovo, Maurizio Palesi, Davide Patti

Accelerating RTL Simulation by Several Orders of Magnitude Using Clock Suppression

PAGES

123--128

 

H. Muhr, R. Holler

SimGate: Full-System, Cycle-Close Simulation of the Stargate Sensor Network Intermediate Node

PAGES

129--136

 

Y. Wen, S. Gurun, Chohan Navraj, R. Wolski, C. Krintz

Memory-constrained Block Processing Optimization for Synthesis of DSP Software

PAGES

137--143

 

Ming-Yung Ko, Chung-Ching Shen, Shuvra S. Bhattacharyya

System and Network-on-Chip Platforms

 

 

 

Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors

PAGES

144--151

 

Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa

Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications

PAGES

152--159

 

Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf

FLUX Networks: Interconnects on Demand

PAGES

160--167

 

Stamatis Vassiliadis, Ioannis Sourdis

Reconfigurable Processors and Applications of Embedded Systems

 

 

 

On-Chip Communication in Run-Time Assembled Reconfigurable Systems

PAGES

168--176

 

Pete Sedcole, Peter Y.K. Cheung, George A. Constantinides, Wayne Luk

Multi-objective Optimal Controller Synthesis for Heterogeneous Embedded Systems

PAGES

177--184

 

Lech Jozwiak, Dominik Gawlowski, Aleksander Slusarczyk

Throughput optimization via cache partitioning for embedded multiprocessors

PAGES

185--191

 

Anca M. Molnos, Sorin Dan Cotofana, Marc J.M. Heijligers, Jos T. J. van Eijndhoven