SAMOS X : Program (pdf)

NB (Papers for regular and special sessions): Speakers have 20 minutes to give their presentation. After each presentation, there are 5 minutes devoted to questions from the attendees.

Monday July 19, 2010
08:30    - OPENING - Fadi Kurdahi and Jarmo Takala
08:50    - Keynote: Kevin Nowka (AUDITORIUM) -- VLSI System Design for Technology Variability and Operational Uncertainty
Chair: Walid Najjar
09:35    - COFFEE BREAK
09:55-11:35    - *************** AUDITORIUM - SIMULATION AND MODELING ***************
Chair: Roberto Giorgi
09:55-10:15    - AUDITORIUM
   Cycle-Accurate Performance Modelling in an Ultra-Fast Just-In-Time Dynamic Binary Translation Instruction Set Simulator
Igor Böhm,  Björn Franke,  Nigel Topham
University of Edinburgh
10:20-10:40    - AUDITORIUM
   A Trace-based Scenario Database for High-level Simulation of Multimedia MP-SoCs
Peter van Stralen and Andy D. Pimentel
University of Amsterdam
10:45-11:05    - AUDITORIUM
   A Library of Dual-Clock FIFOs for Cost-Effective and Flexible MPSoCs Design
Alessandro Strano1,  Daniele Ludovici2,  Davide Bertozzi1
1University of Ferrara, 2TUDelft
11:10-11:30    - AUDITORIUM
   Transparent Sampling
Taj Khan1,  Daniel Gracia-Pérez2,  Olivier Temam1
1INRIA, France., 2CEA, France.
09:55-11:35    - *************** ROOM A - NETWORK PROCESSING ***************
Chair: Koen Bertels
09:55-10:15    - ROOM A
   A Fully Programmable FSM-based Processing Engine for Gigabytes/s Header Parsing
Konstantin Septinus1,  Ulrich Mayer2,  Peter Pirsch1,  Holger Blume1
1Leiniz University Hannover, 2IBM Germany
10:20-10:40    - ROOM A
   Empirical Evaluation of Data Transformations for Network Infrastructure Applications
Damon Fenacci and Björn Franke
University of Edinburgh
10:45-11:05    - ROOM A
   Design Environment for the Support of Configurable Network Interfaces in NoC-based Platforms
Amin EL MRABTI1,  Frédéric ROUSSEAU1,  Frédéric PETROT1,  Jérôme MARTIN2,  Romain LEMAIRE2,  Emmanuel VAUMORIN3
1TIMA, INPG, UJF, 2CEA, LETI, MINATEC, 3Magillem Design Services
11:10-11:30    - ROOM A
   Design of a Flexible High-speed FPGA-based Flow Monitor for Next Generation Networks
John McGlone1,  Michaela Blott2,  Roger Woods1,  Alan Marshall1
1Queen's University Belfast, 2Xilinx
09:55-11:35    - *************** ROOM B - IMAGE AND VIDEO PROCESSING ***************
Chair: Leonel Sousa
09:55-10:15    - ROOM B
   AN EFFICIENT REALIZATION OF FORWARD INTEGER TRANSFORM IN H.264/AVC INTRA-FRAME ENCODER
Muhammad Nadeem,  Stephan Wong,  Georgi Kuzmanov
TU Delft
10:20-10:40    - ROOM B
   SIMD Performance in Software Based Mobile Video Coding
Tero Rintaluoma1 and Olli Silven2
1On2 Technologies Finland, 2University of Oulu
10:45-11:05    - ROOM B
   Fast Huffman Decoding by Exploiting Data Level Parallelism
Tim Drijvers1,  Carlos Alba Pinto2,  Henk Corporaal1,  Bart Mesman1
1Eindhoven University of Technology, 2Silicon Hive
11:10-11:30    - ROOM B
   Real-Time Stereo Vision System using Semi-Global Matching Disparity Estimation: Architecture and FPGA-Implementation
Christian Banz,  Sebastian Hesselbarth,  Holger Flatt,  Holger Blume,  Peter Pirsch
Institute of Microelectronic Systems, Leibniz Universität Hannover, Hannover (Germany)
11:35-11:55    - COFFEE BREAK
11:55:12:55    - PANEL
Chair: Yale Patt and Trevor Mudge
12:55    - END
Tuesday July 20, 2010
08:30    - Keynote - TAWFIK ARABI (AUDITORIUM) -- VLSI Challenges to more Energy Efficient Devices
Chair: Fadi J. Kurdahi
09:15-10:30    - *************** AUDITORIUM - SYSTEM-LEVEL DESIGN ***************
Chair: Holger Blume
09:15-09:35    - AUDITORIUM
   Custom Multi-Threaded Dynamic Memory Management for Multiprocessor System-on-Chip Platforms
Sotirios Xydis,  Alexandros Bartzas,  Dimitrios Soudris,  Kiamal Pekmestzi
National Technical University of Athens
09:40-10:00    - AUDITORIUM
   Power Aware Heterogeneous MPSoC with Dynamic Task Scheduling and Increased Data Locality for Multiple Applications
Oliver Arnold and Gerhard Fettweis
Technische Universität Dresden
10:05-10:25    - AUDITORIUM
   A System-Level Synthesis Approach from Formal Application Models to Generic Bus-Based MPSoCs
Jens Gladigau1,  Andreas Gerstlauer2,  Christian Haubelt1,  Martin Streubühr1,  Jürgen Teich1
1University of Erlangen-Nuremberg, 2University of Texas at Austin
09:15-10:30    - *************** ROOM A - SDR SPECIAL SESSION ***************
Chair: John Glossner
09:15-09:35    - ROOM A
   A GPU Implementation for two MIMO-OFDM Sphere Detectors
Teemu Nyländen1,  Janne Janhunen2,  Olli Silvén1,  Markku Juntti2
1Information Processing Laboratory, University of Oulu, 2Centre for Wireless Communications, University of Oulu
09:40-10:00    - ROOM A
   CORDIC based LMMSE Equalizer for Software Defined Radio
Murugappan Senthilvelan1,  Mihai Sima2,  Daniel Iancu1,  Michael Schulte3
1Optimum Semiconductor Technologies Inc., 2University of Victoria, 3University of Wisconsin-Madison
10:05-10:25    - ROOM A
   On the Scalability of SIMD Processing for Software Defined Radio Algorithms
Peter Westermann and Hartmut Schröder
Technische Universität Dortmund
09:15-10:30    - *************** ROOM B - PROFILING AND ANALYSIS ***************
Chair: Ed Deprettere
09:15-09:35    - ROOM B
   ImpBench revisited: An extended characterization of implant-processor benchmarks
Christos Strydis,  Dhara Dave,  Georgi Gaydadjiev
Delft University of Technology
09:40-10:00    - ROOM B
   Efficient Static Buffering to Guarantee Throughput-Optimal FPGA Implementation of Synchronous Dataflow Graphs
Hojin Kee1,  Shuvra Bhattacharyya1,  Jacob Kornerup2
1Department of Electrical and Computer Engineering, University of Maryland, 2National Instruments Corp.
10:05-10:25    - ROOM B
   Compositional Timing Analysis
Amine Marref
Malardalen University
10:30-10:50    - COFFEE BREAK
10:50-12:05    - *************** AUDITORIUM - MP-SoC PROGRAMMING ***************
Chair: Shuvra Bhattacharyya
10:50-11:10    - AUDITORIUM
   Programming Multi-core Architectures Using Data-Flow Techniques
Samer Arandi and Paraskevas Evripidou
University of Cyprus
11:15-11:35    - AUDITORIUM
   Compiling the C Language using a CLI-Based Framework for Embedded MPSoCs
Erven Rohou1,  Andrea Ornstein2,  Marco Cornero3
1INRIA, 2STMicroelectronics, 3ST-Ericsson
11:40-12:00    - AUDITORIUM
   Design Space Exploration of Instruction Set Customizable MPSoCs for Multimedia Applications
Unmesh Bordoloi1,  Huynh Phung Huynh2,  Tulika Mitra3,  Samarjit Chakraborty4
1Linkopings Universitet,, 22A*STAR Institute of High Performance Computing, Singapore, 3National University of Singapore, 4TU Munich, Germany
10:50-12:05    - *************** ROOM A - SDR SPECIAL SESSION ***************
Chair: John Glossner
10:50-11:10    - ROOM A
   SDR Platform for 802.11n and 3GPP-LTE
Jeroen Declerck,  Praveen Raghavan,  Frederik Naessens,  Tom Vander Aa,  Lieven Hollevoet,  Antoine Dejonghe,  Liesbet Van der Perre
imec
11:15-11:35    - ROOM A
   ARAL-CR: An Adaptive Reasoning and Learning Cognitive Radio Platform
Sao-Jie Chen1,  Pao-Ann Hsiung2,  Chu Yu3,  Mao-Hsu Yen4,  Sakir Sezer5,  Michael Schulte6,  Yu-Hen Hu6
1National Taiwan Univ., ROC, 2National Chung-Cheng Univ. ROC, 3National Ilan Univ., ROC, 4National Taiwan Ocean Univ., ROC, 5Queen's Universty, Belfast, UK, 6UW Madison, USA
11:40-12:00    - ROOM A
   Diet SODA: A Power-Efficient Processor for Digital Cameras
Sangwon Seo1,  Ronald G. Dreslinski1,  Mark Woh1,  Chaitali Chakrabarti2,  Scott Mahlke1,  Trevor Mudge1
1University of Michigan, 2Arizona State University
10:50-12:05    - *************** ROOM B - NETWORK-ON-CHIP INTERCONNECTS ***************
Chair: John McAllister
10:50-11:10    - ROOM B
   Enhancements for Variable N-point Streaming FFT/IFFT on REDEFINE, a Runtime Reconfigurable Architecture
Thambi Prashank1,  Prasadarao M1,  Keshavan Varadarajan1,  Avinaba Dutta1,  Mythri Alle1,  Nandy S.K1,  Ranjani Narayan2
1Indian Institute of Science, 2Morphing Machines
11:15-11:35    - ROOM B
   On-chip Network Interfaces supporting automatic burst write creation, posted writes and read prefetch
Radu Stefan1,  Jason de Windt1,  Kees Goossens2
1TU Delft, 2TU Eindhoven
11:40-12:00    - ROOM B
   Monitor-Adapter Coupling for NOC Performance Tuning
Débora Matos1,  Caroline Concatto1,  Anelise Kologeski1,  Marcio Kreutz2,  Luigi Carro1,  Fernanda Kastensmidt1,  Altamiro Susin1
1UFRGS, 2UFRN
12:05-12:25    - COFFEE BREAK
12:25-13:55    - PANEL
Chair: Yale Patt and Trevor Mudge
13:55    - END
Wednesday July 21, 2010
08:30-10:10    - *************** AUDITORIUM - COMPILER TECHNIQUES ***************
Chair: Mazen Saghir
08:30-08:50    - AUDITORIUM
   Compile-time GPU Memory Access Optimizations
Gert-Jan van den Braak,  Bart Mesman,  Henk Corporaal
Eindhoven University of Technology
08:55-09:15    - AUDITORIUM
   Code Generation for a Novel STA Architecture by Using Post-Processing Backend
Xiaoyan Jia and Gerhard Fettweis
Technische Universität Dresden
09:20-09:40    - AUDITORIUM
   Accelerating High-Level Engineering Computations by Automatic Compilation of Geometric Algebra to Hardware Accelerators
Jens Huthmann,  Peter Müller,  Florian Stock,  Dietmar Hildenbrand,  Andreas Koch
Technische Universität Darmstadt
09:45-10:05    - AUDITORIUM
   OpenCL-based Design Methodology for Application-Specific Processors
Pekka Jääskeläinen1,  Carlos S. de La Lama2,  Pablo Huerta2,  Jarmo Takala1
1Tampere University of Technology, 2Universidad Rey Juan Carlos
08:30-10:10    - *************** ROOM A - MICRO-ARCHITECTURE ***************
Chair: Nikitas Dimopoulos
08:30-08:50    - ROOM A
   LV*: a low complexity Lazy Versioning HTM infrastructure
ANURAG NEGI,  MM WALIULLAH,  PER STENSTROM
CHALMERS UNIVERSITY OF TECHNOLOGY, SWEDEN
08:55-09:15    - ROOM A
   A Polymorphic Register File for Matrix Operations
Catalin Ciobanu1,  Georgi Kuzmanov1,  Alex Ramirez2,  Georgi Gaydadjiev1
1TU Delft, The Netherlands, 2Polytechnic University of Catalonia, Spain
09:20-09:40    - ROOM A
   Interleaving Granularity on High Bandwidth Memory Architecture for CMPs
Felipe Cabarcas,  Alejandro Rico,  Yoav Etsion,  Alex Ramirez
Barcelona Supercomputing Center
09:45-10:05    - ROOM A
   Automatic Port and Bus Sizing in NoGAP
Per Karlström,  Wenbiao Zhou,  Dake Liu
Linköping university ISY/DA
08:30-10:10    - *************** ROOM B - MULTI-CORE SPECIAL SESSION ***************
Chair: Luigi Carro and Stephan Wong
08:30-08:50    - ROOM B
   Exploration Framework for Run-Time Resource Management of Embedded Multi-Core Platforms
Chantal Ykman-Couvreur
IMEC
08:55-09:15    - ROOM B
   Towards Scalable I/O on a Many-core Architecture
Michael A. Hicks,  Michiel W. van Tol,  Chris R. Jesshope
University of Amsterdam
09:20-09:40    - ROOM B
   Embedded Multicore Architectures for LDPC Decoding
Gabriel Falcao1,  Leonel Sousa2,  Vitor SIlva1
1IT/Universidade de Coimbra, 2INESC-ID/IST, TU Lisbon
09:45-10:05    - ROOM B
   Message Passing Interface Support for the Runtime Adaptive Multi-Processor System-on-Chip RAMPSoC
Diana Goehringer1,  Michael Huebner2,  Laure Hugot-Derville1,  Juergen Becker2
1Fraunhofer IOSB, 2ITIV, Karlsruhe Institute of Technology (KIT)
10:10-10:30    - COFFEE BREAK
10:30-11:45    - *************** AUDITORIUM - DESIGN SPACE EXPLORATION ***************
Chair: Cristina Silvano
10:30-10:50    - AUDITORIUM
   Design space exploration of systolic realization of QR factorization on a runtime reconfigurable platform
Prasenjit Biswas1,  Keshavan Varadarajan1,  Mythri Alle1,  S. K Nandy1,  Ranjani Narayan2
1Indian Institute of Science, 2Morphing Machines India Pvt. Ltd
10:55-11:15    - AUDITORIUM
   Energy-Aware Design Space Exploration of RegisterFile for Extensible Processors
Amir Yazdanbakhsh,  Mehdi Kamal,  Mostafa Salehi,  Hamid Noori,  Sied Mehdi Fakhraie
Silicone Intelligence and VLSI Systems Laboratory, School of Electrical and Computer Engineering, University of Tehran
11:20-11:40    - AUDITORIUM
   Exploring the Unified Design-Space of Custom-Instruction Selection and Resource Sharing
Marcela Zuluaga and Nigel Topham
University of Edinburgh
10:30-11:20    - *************** ROOM B - MULTI-CORE SPECIAL SESSION ***************
Chair: Luigi Carro and Stephan Wong
10:30-10:50    - ROOM B
   Designing and Validating Access Policies to Reconfigurable Resources in Multiprocessor Systems on Chip
Fabio Arlati,  Francesco Bruschi,  Donatella Sciuto
Politecnico di Milano
10:55-11:15    - ROOM B
   Identifying Communication Models in Process Networks derived from Weakly Dynamic Programs
Dmitry Nadezhkin and Todor Stefanov
LIACS, Leiden University
11:45-12:05    - COFFEE BREAK
12:05-13:35    - PANEL
Chair: Yale Patt and Trevor Mudge
13:35    - CLOSING - Georgi Gaydadjiev and John Glossner
13:55    - END OF THE CONFERENCE
EVENING EVENT    - GALA DINNER
Thursday July 22, 2010