Vipes Best Paper Award

VIPES 2016

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Incorporating Rapid Design Assembly into a Virtual Prototyping Environment
 
Ryan Marlow, Consolidated Logic Incorporated (US)
Shenghou Ma, Virginia Polytechnic Institute and State University (US)
Kevin Lee, Virginia Polytechnic Institute and State University (US)
Peter Athanas, Virginia Polytechnic Institute and State University (US)

VIPES 2016

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An OpenCL-based Framework for Rapid Virtual Prototyping of Heterogeneous Architectures
 
Efstathios Sotiriou-Xanthopoulos, National Technical University of Athens (GR)
Leonard Masing, Karlsruhe Institute of Technology (DE)
Kostas Siozios, National Technical University of Athens (GR)
George Economakos, National Technical University of Athens (GR)
Dimitrios Soudris, National Technical University of Athens (GR)
Jurgen Becker, Karlsruhe Institute of Technology (DE)

VIPES 2015

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ESL Power Estimation using Virtual Platforms with Black Box Processor Models
 
Stefan Schurmans, RWTH Aachen University (Germany)
Gereon Onnebrink, RWTH Aachen University (Germany)
Rainer Leupers, RWTH Aachen University (Germany)
Gerd Ascheid, RWTH Aachen University (Germany)
Xiaotao Chen, Huawei Technologies Co., Ltd. (United States)